mac80211: update brcmfmac including missing boardrev workaround
[openwrt.git] / package / kernel / mac80211 / patches / 600-0014-rt2x00-rt2800lib-add-MAC-register-initialization-for.patch
1 From 0094872a5e8e4664c6ea1b2dfa487063d39ae363 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Sun, 24 Mar 2013 19:26:26 +0100
4 Subject: [PATCH] rt2x00: rt2800lib: add MAC register initialization for
5  RT3883
6
7 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
8 ---
9  drivers/net/wireless/ralink/rt2x00/rt2800.h    |   14 ++++++++++++++
10  drivers/net/wireless/ralink/rt2x00/rt2800lib.c |   19 ++++++++++++++++---
11  2 files changed, 30 insertions(+), 3 deletions(-)
12
13 --- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
14 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
15 @@ -1588,6 +1588,20 @@
16  #define TX_PWR_CFG_9_STBC7_CH2         FIELD32(0x00000f00)
17  
18  /*
19 + * TX_TXBF_CFG:
20 + */
21 +#define TX_TXBF_CFG_0                  0x138c
22 +#define TX_TXBF_CFG_1                  0x13a4
23 +#define TX_TXBF_CFG_2                  0x13a8
24 +#define TX_TXBF_CFG_3                  0x13ac
25 +
26 +/*
27 + * TX_FBK_CFG_3S:
28 + */
29 +#define TX_FBK_CFG_3S_0                        0x13c4
30 +#define TX_FBK_CFG_3S_1                        0x13c8
31 +
32 +/*
33   * RX_FILTER_CFG: RX configuration register.
34   */
35  #define RX_FILTER_CFG                  0x1400
36 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
37 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
38 @@ -4982,6 +4982,12 @@ static int rt2800_init_registers(struct
39                         rt2800_register_write(rt2x00dev, TX_SW_CFG2,
40                                               0x00000000);
41                 }
42 +       } else if (rt2x00_rt(rt2x00dev, RT3883)) {
43 +               rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000402);
44 +               rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
45 +               rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00040000);
46 +               rt2800_register_write(rt2x00dev, TX_TXBF_CFG_0, 0x8000fc21);
47 +               rt2800_register_write(rt2x00dev, TX_TXBF_CFG_3, 0x00009c40);
48         } else if (rt2x00_rt(rt2x00dev, RT5390) ||
49                    rt2x00_rt(rt2x00dev, RT5392) ||
50                    rt2x00_rt(rt2x00dev, RT5592)) {
51 @@ -5012,9 +5018,11 @@ static int rt2800_init_registers(struct
52  
53         rt2800_register_read(rt2x00dev, MAX_LEN_CFG, &reg);
54         rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
55 -       if (rt2x00_rt_rev_gte(rt2x00dev, RT2872, REV_RT2872E) ||
56 -           rt2x00_rt(rt2x00dev, RT2883) ||
57 -           rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070E))
58 +       if (rt2x00_rt(rt2x00dev, RT3883))
59 +               rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 3);
60 +       else if (rt2x00_rt_rev_gte(rt2x00dev, RT2872, REV_RT2872E) ||
61 +                rt2x00_rt(rt2x00dev, RT2883) ||
62 +                rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070E))
63                 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
64         else
65                 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1);
66 @@ -5167,6 +5175,11 @@ static int rt2800_init_registers(struct
67         reg = rt2x00_rt(rt2x00dev, RT5592) ? 0x00000082 : 0x00000002;
68         rt2800_register_write(rt2x00dev, TXOP_HLDR_ET, reg);
69  
70 +       if (rt2x00_rt(rt2x00dev, RT3883)) {
71 +               rt2800_register_write(rt2x00dev, TX_FBK_CFG_3S_0, 0x12111008);
72 +               rt2800_register_write(rt2x00dev, TX_FBK_CFG_3S_1, 0x16151413);
73 +       }
74 +
75         rt2800_register_read(rt2x00dev, TX_RTS_CFG, &reg);
76         rt2x00_set_field32(&reg, TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT, 32);
77         rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES,