package/kernel/mac80211/patches/300-pending_work.patch

   1 --- a/drivers/net/wireless/ath/ath10k/mac.c
   2 +++ b/drivers/net/wireless/ath/ath10k/mac.c
   3 @@ -1351,12 +1351,12 @@ static int ath10k_update_channel_list(st
   4                         ch->allow_vht = true;
   5
   6                         ch->allow_ibss =
   7 -                               !(channel->flags & IEEE80211_CHAN_NO_IBSS);
   8 +                               !(channel->flags & IEEE80211_CHAN_NO_IR);
   9
  10                         ch->ht40plus =
  11                                 !(channel->flags & IEEE80211_CHAN_NO_HT40PLUS);
  12
  13 -                       passive = channel->flags & IEEE80211_CHAN_PASSIVE_SCAN;
  14 +                       passive = channel->flags & IEEE80211_CHAN_NO_IR;
  15                         ch->passive = passive;
  16
  17                         ch->freq = channel->center_freq;
  18 --- a/drivers/net/wireless/ath/ath9k/Kconfig
  19 +++ b/drivers/net/wireless/ath/ath9k/Kconfig
  20 @@ -90,7 +90,7 @@ config ATH9K_DFS_CERTIFIED
  21
  22  config ATH9K_TX99
  23         bool "Atheros ath9k TX99 testing support"
  24 -       depends on CFG80211_CERTIFICATION_ONUS
  25 +       depends on ATH9K_DEBUGFS && CFG80211_CERTIFICATION_ONUS
  26         default n
  27         ---help---
  28           Say N. This should only be enabled on systems undergoing
  29 @@ -108,6 +108,14 @@ config ATH9K_TX99
  30           be evaluated to meet the RF exposure limits set forth in the
  31           governmental SAR regulations.
  32
  33 +config ATH9K_WOW
  34 +       bool "Wake on Wireless LAN support (EXPERIMENTAL)"
  35 +       depends on ATH9K && PM
  36 +       default n
  37 +       ---help---
  38 +         This option enables Wake on Wireless LAN support for certain cards.
  39 +         Currently, AR9462 is supported.
  40 +
  41  config ATH9K_LEGACY_RATE_CONTROL
  42         bool "Atheros ath9k rate control"
  43         depends on ATH9K
  44 --- a/drivers/net/wireless/ath/ath9k/Makefile
  45 +++ b/drivers/net/wireless/ath/ath9k/Makefile
  46 @@ -13,9 +13,9 @@ ath9k-$(CPTCFG_ATH9K_PCI) += pci.o
  47  ath9k-$(CPTCFG_ATH9K_AHB) += ahb.o
  48  ath9k-$(CPTCFG_ATH9K_DEBUGFS) += debug.o
  49  ath9k-$(CPTCFG_ATH9K_DFS_DEBUGFS) += dfs_debug.o
  50 -ath9k-$(CPTCFG_ATH9K_DFS_CERTIFIED) += \
  51 -               dfs.o
  52 -ath9k-$(CONFIG_PM_SLEEP) += wow.o
  53 +ath9k-$(CPTCFG_ATH9K_DFS_CERTIFIED) += dfs.o
  54 +ath9k-$(CPTCFG_ATH9K_TX99) += tx99.o
  55 +ath9k-$(CPTCFG_ATH9K_WOW) += wow.o
  56
  57  obj-$(CPTCFG_ATH9K) += ath9k.o
  58
  59 @@ -41,6 +41,8 @@ ath9k_hw-y:=  \
  60                 ar9003_eeprom.o \
  61                 ar9003_paprd.o
  62
  63 +ath9k_hw-$(CPTCFG_ATH9K_WOW) += ar9003_wow.o
  64 +
  65  ath9k_hw-$(CPTCFG_ATH9K_BTCOEX_SUPPORT) += btcoex.o \
  66                                            ar9003_mci.o
  67  obj-$(CPTCFG_ATH9K_HW) += ath9k_hw.o
  68 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
  69 +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
  70 @@ -26,6 +26,7 @@
  71  #include "ar9462_2p0_initvals.h"
  72  #include "ar9462_2p1_initvals.h"
  73  #include "ar9565_1p0_initvals.h"
  74 +#include "ar9565_1p1_initvals.h"
  75
  76  /* General hardware code for the AR9003 hadware family */
  77
  78 @@ -187,17 +188,17 @@ static void ar9003_hw_init_mode_regs(str
  79                 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
  80                                ar9485_1_1_baseband_core_txfir_coeff_japan_2484);
  81
  82 -               /* Load PCIE SERDES settings from INI */
  83 -
  84 -               /* Awake Setting */
  85 -
  86 -               INIT_INI_ARRAY(&ah->iniPcieSerdes,
  87 -                               ar9485_1_1_pcie_phy_clkreq_disable_L1);
  88 -
  89 -               /* Sleep Setting */
  90 -
  91 -               INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
  92 -                               ar9485_1_1_pcie_phy_clkreq_disable_L1);
  93 +               if (ah->config.no_pll_pwrsave) {
  94 +                       INIT_INI_ARRAY(&ah->iniPcieSerdes,
  95 +                                      ar9485_1_1_pcie_phy_clkreq_disable_L1);
  96 +                       INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
  97 +                                      ar9485_1_1_pcie_phy_clkreq_disable_L1);
  98 +               } else {
  99 +                       INIT_INI_ARRAY(&ah->iniPcieSerdes,
 100 +                                      ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1);
 101 +                       INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
 102 +                                      ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1);
 103 +               }
 104         } else if (AR_SREV_9462_21(ah)) {
 105                 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
 106                                ar9462_2p1_mac_core);
 107 @@ -223,6 +224,10 @@ static void ar9003_hw_init_mode_regs(str
 108                                ar9462_2p1_modes_fast_clock);
 109                 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
 110                                ar9462_2p1_baseband_core_txfir_coeff_japan_2484);
 111 +               INIT_INI_ARRAY(&ah->iniPcieSerdes,
 112 +                              ar9462_2p1_pciephy_clkreq_disable_L1);
 113 +               INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
 114 +                              ar9462_2p1_pciephy_clkreq_disable_L1);
 115         } else if (AR_SREV_9462_20(ah)) {
 116
 117                 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core);
 118 @@ -247,18 +252,18 @@ static void ar9003_hw_init_mode_regs(str
 119                                 ar9462_2p0_soc_postamble);
 120
 121                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 122 -                               ar9462_common_rx_gain_table_2p0);
 123 +                               ar9462_2p0_common_rx_gain);
 124
 125                 /* Awake -> Sleep Setting */
 126                 INIT_INI_ARRAY(&ah->iniPcieSerdes,
 127 -                              ar9462_pciephy_clkreq_disable_L1_2p0);
 128 +                              ar9462_2p0_pciephy_clkreq_disable_L1);
 129                 /* Sleep -> Awake Setting */
 130                 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
 131 -                              ar9462_pciephy_clkreq_disable_L1_2p0);
 132 +                              ar9462_2p0_pciephy_clkreq_disable_L1);
 133
 134                 /* Fast clock modal settings */
 135                 INIT_INI_ARRAY(&ah->iniModesFastClock,
 136 -                               ar9462_modes_fast_clock_2p0);
 137 +                               ar9462_2p0_modes_fast_clock);
 138
 139                 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
 140                                ar9462_2p0_baseband_core_txfir_coeff_japan_2484);
 141 @@ -331,6 +336,41 @@ static void ar9003_hw_init_mode_regs(str
 142
 143                 INIT_INI_ARRAY(&ah->iniModesFastClock,
 144                                 ar9580_1p0_modes_fast_clock);
 145 +       } else if (AR_SREV_9565_11_OR_LATER(ah)) {
 146 +               INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
 147 +                              ar9565_1p1_mac_core);
 148 +               INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
 149 +                              ar9565_1p1_mac_postamble);
 150 +
 151 +               INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
 152 +                              ar9565_1p1_baseband_core);
 153 +               INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
 154 +                              ar9565_1p1_baseband_postamble);
 155 +
 156 +               INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
 157 +                              ar9565_1p1_radio_core);
 158 +               INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
 159 +                              ar9565_1p1_radio_postamble);
 160 +
 161 +               INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
 162 +                              ar9565_1p1_soc_preamble);
 163 +               INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
 164 +                              ar9565_1p1_soc_postamble);
 165 +
 166 +               INIT_INI_ARRAY(&ah->iniModesRxGain,
 167 +                              ar9565_1p1_Common_rx_gain_table);
 168 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 169 +                              ar9565_1p1_Modes_lowest_ob_db_tx_gain_table);
 170 +
 171 +               INIT_INI_ARRAY(&ah->iniPcieSerdes,
 172 +                              ar9565_1p1_pciephy_clkreq_disable_L1);
 173 +               INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
 174 +                              ar9565_1p1_pciephy_clkreq_disable_L1);
 175 +
 176 +               INIT_INI_ARRAY(&ah->iniModesFastClock,
 177 +                               ar9565_1p1_modes_fast_clock);
 178 +               INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
 179 +                              ar9565_1p1_baseband_core_txfir_coeff_japan_2484);
 180         } else if (AR_SREV_9565(ah)) {
 181                 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
 182                                ar9565_1p0_mac_core);
 183 @@ -440,7 +480,10 @@ static void ar9003_tx_gain_table_mode0(s
 184                         ar9462_2p1_modes_low_ob_db_tx_gain);
 185         else if (AR_SREV_9462_20(ah))
 186                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 187 -                       ar9462_modes_low_ob_db_tx_gain_table_2p0);
 188 +                       ar9462_2p0_modes_low_ob_db_tx_gain);
 189 +       else if (AR_SREV_9565_11(ah))
 190 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 191 +                              ar9565_1p1_modes_low_ob_db_tx_gain_table);
 192         else if (AR_SREV_9565(ah))
 193                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 194                                ar9565_1p0_modes_low_ob_db_tx_gain_table);
 195 @@ -474,7 +517,10 @@ static void ar9003_tx_gain_table_mode1(s
 196                         ar9462_2p1_modes_high_ob_db_tx_gain);
 197         else if (AR_SREV_9462_20(ah))
 198                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 199 -                       ar9462_modes_high_ob_db_tx_gain_table_2p0);
 200 +                       ar9462_2p0_modes_high_ob_db_tx_gain);
 201 +       else if (AR_SREV_9565_11(ah))
 202 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 203 +                              ar9565_1p1_modes_high_ob_db_tx_gain_table);
 204         else if (AR_SREV_9565(ah))
 205                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 206                                ar9565_1p0_modes_high_ob_db_tx_gain_table);
 207 @@ -500,6 +546,9 @@ static void ar9003_tx_gain_table_mode2(s
 208         else if (AR_SREV_9580(ah))
 209                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 210                         ar9580_1p0_low_ob_db_tx_gain_table);
 211 +       else if (AR_SREV_9565_11(ah))
 212 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 213 +                              ar9565_1p1_modes_low_ob_db_tx_gain_table);
 214         else if (AR_SREV_9565(ah))
 215                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 216                                ar9565_1p0_modes_low_ob_db_tx_gain_table);
 217 @@ -525,6 +574,9 @@ static void ar9003_tx_gain_table_mode3(s
 218         else if (AR_SREV_9580(ah))
 219                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 220                         ar9580_1p0_high_power_tx_gain_table);
 221 +       else if (AR_SREV_9565_11(ah))
 222 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 223 +                              ar9565_1p1_modes_high_power_tx_gain_table);
 224         else if (AR_SREV_9565(ah))
 225                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 226                                ar9565_1p0_modes_high_power_tx_gain_table);
 227 @@ -546,7 +598,7 @@ static void ar9003_tx_gain_table_mode4(s
 228                        ar9462_2p1_modes_mix_ob_db_tx_gain);
 229         else if (AR_SREV_9462_20(ah))
 230                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 231 -                      ar9462_modes_mix_ob_db_tx_gain_table_2p0);
 232 +                      ar9462_2p0_modes_mix_ob_db_tx_gain);
 233         else
 234                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 235                         ar9300Modes_mixed_ob_db_tx_gain_table_2p2);
 236 @@ -581,6 +633,13 @@ static void ar9003_tx_gain_table_mode6(s
 237                         ar9580_1p0_type6_tx_gain_table);
 238  }
 239
 240 +static void ar9003_tx_gain_table_mode7(struct ath_hw *ah)
 241 +{
 242 +       if (AR_SREV_9340(ah))
 243 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 244 +                              ar9340_cus227_tx_gain_table_1p0);
 245 +}
 246 +
 247  typedef void (*ath_txgain_tab)(struct ath_hw *ah);
 248
 249  static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
 250 @@ -593,6 +652,7 @@ static void ar9003_tx_gain_table_apply(s
 251                 ar9003_tx_gain_table_mode4,
 252                 ar9003_tx_gain_table_mode5,
 253                 ar9003_tx_gain_table_mode6,
 254 +               ar9003_tx_gain_table_mode7,
 255         };
 256         int idx = ar9003_hw_get_tx_gain_idx(ah);
 257
 258 @@ -629,7 +689,10 @@ static void ar9003_rx_gain_table_mode0(s
 259                                 ar9462_2p1_common_rx_gain);
 260         else if (AR_SREV_9462_20(ah))
 261                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 262 -                               ar9462_common_rx_gain_table_2p0);
 263 +                               ar9462_2p0_common_rx_gain);
 264 +       else if (AR_SREV_9565_11(ah))
 265 +               INIT_INI_ARRAY(&ah->iniModesRxGain,
 266 +                              ar9565_1p1_Common_rx_gain_table);
 267         else if (AR_SREV_9565(ah))
 268                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 269                                ar9565_1p0_Common_rx_gain_table);
 270 @@ -657,7 +720,7 @@ static void ar9003_rx_gain_table_mode1(s
 271                         ar9462_2p1_common_wo_xlna_rx_gain);
 272         else if (AR_SREV_9462_20(ah))
 273                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 274 -                       ar9462_common_wo_xlna_rx_gain_table_2p0);
 275 +                       ar9462_2p0_common_wo_xlna_rx_gain);
 276         else if (AR_SREV_9550(ah)) {
 277                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 278                         ar955x_1p0_common_wo_xlna_rx_gain_table);
 279 @@ -666,6 +729,9 @@ static void ar9003_rx_gain_table_mode1(s
 280         } else if (AR_SREV_9580(ah))
 281                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 282                         ar9580_1p0_wo_xlna_rx_gain_table);
 283 +       else if (AR_SREV_9565_11(ah))
 284 +               INIT_INI_ARRAY(&ah->iniModesRxGain,
 285 +                              ar9565_1p1_common_wo_xlna_rx_gain_table);
 286         else if (AR_SREV_9565(ah))
 287                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 288                                ar9565_1p0_common_wo_xlna_rx_gain_table);
 289 @@ -687,7 +753,7 @@ static void ar9003_rx_gain_table_mode2(s
 290                                ar9462_2p1_baseband_postamble_5g_xlna);
 291         } else if (AR_SREV_9462_20(ah)) {
 292                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 293 -                              ar9462_common_mixed_rx_gain_table_2p0);
 294 +                              ar9462_2p0_common_mixed_rx_gain);
 295                 INIT_INI_ARRAY(&ah->ini_modes_rxgain_bb_core,
 296                                ar9462_2p0_baseband_core_mix_rxgain);
 297                 INIT_INI_ARRAY(&ah->ini_modes_rxgain_bb_postamble,
 298 @@ -701,12 +767,12 @@ static void ar9003_rx_gain_table_mode3(s
 299  {
 300         if (AR_SREV_9462_21(ah)) {
 301                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 302 -                              ar9462_2p1_common_5g_xlna_only_rx_gain);
 303 +                              ar9462_2p1_common_5g_xlna_only_rxgain);
 304                 INIT_INI_ARRAY(&ah->ini_modes_rxgain_5g_xlna,
 305                                ar9462_2p1_baseband_postamble_5g_xlna);
 306         } else if (AR_SREV_9462_20(ah)) {
 307                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 308 -                              ar9462_2p0_5g_xlna_only_rxgain);
 309 +                              ar9462_2p0_common_5g_xlna_only_rxgain);
 310                 INIT_INI_ARRAY(&ah->ini_modes_rxgain_5g_xlna,
 311                                ar9462_2p0_baseband_postamble_5g_xlna);
 312         }
 313 @@ -750,6 +816,9 @@ static void ar9003_hw_init_mode_gain_reg
 314  static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
 315                                          bool power_off)
 316  {
 317 +       unsigned int i;
 318 +       struct ar5416IniArray *array;
 319 +
 320         /*
 321          * Increase L1 Entry Latency. Some WB222 boards don't have
 322          * this change in eeprom/OTP.
 323 @@ -775,18 +844,13 @@ static void ar9003_hw_configpcipowersave
 324          * Configire PCIE after Ini init. SERDES values now come from ini file
 325          * This enables PCIe low power mode.
 326          */
 327 -       if (ah->config.pcieSerDesWrite) {
 328 -               unsigned int i;
 329 -               struct ar5416IniArray *array;
 330 -
 331 -               array = power_off ? &ah->iniPcieSerdes :
 332 -                                   &ah->iniPcieSerdesLowPower;
 333 -
 334 -               for (i = 0; i < array->ia_rows; i++) {
 335 -                       REG_WRITE(ah,
 336 -                                 INI_RA(array, i, 0),
 337 -                                 INI_RA(array, i, 1));
 338 -               }
 339 +       array = power_off ? &ah->iniPcieSerdes :
 340 +               &ah->iniPcieSerdesLowPower;
 341 +
 342 +       for (i = 0; i < array->ia_rows; i++) {
 343 +               REG_WRITE(ah,
 344 +                         INI_RA(array, i, 0),
 345 +                         INI_RA(array, i, 1));
 346         }
 347  }
 348
 349 --- a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
 350 +++ b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
 351 @@ -1447,4 +1447,106 @@ static const u32 ar9340_1p0_soc_preamble
 352         {0x00007038, 0x000004c2},
 353  };
 354
 355 +static const u32 ar9340_cus227_tx_gain_table_1p0[][5] = {
 356 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 357 +       {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
 358 +       {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
 359 +       {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
 360 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
 361 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
 362 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 363 +       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
 364 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
 365 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
 366 +       {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
 367 +       {0x0000a514, 0x1c000223, 0x1c000223, 0x11000400, 0x11000400},
 368 +       {0x0000a518, 0x21002220, 0x21002220, 0x15000402, 0x15000402},
 369 +       {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404},
 370 +       {0x0000a520, 0x2c022220, 0x2c022220, 0x1b000603, 0x1b000603},
 371 +       {0x0000a524, 0x30022222, 0x30022222, 0x1f000a02, 0x1f000a02},
 372 +       {0x0000a528, 0x35022225, 0x35022225, 0x23000a04, 0x23000a04},
 373 +       {0x0000a52c, 0x3b02222a, 0x3b02222a, 0x26000a20, 0x26000a20},
 374 +       {0x0000a530, 0x3f02222c, 0x3f02222c, 0x2a000e20, 0x2a000e20},
 375 +       {0x0000a534, 0x4202242a, 0x4202242a, 0x2e000e22, 0x2e000e22},
 376 +       {0x0000a538, 0x4702244a, 0x4702244a, 0x31000e24, 0x31000e24},
 377 +       {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x34001640, 0x34001640},
 378 +       {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38001660, 0x38001660},
 379 +       {0x0000a544, 0x5302266c, 0x5302266c, 0x3b001861, 0x3b001861},
 380 +       {0x0000a548, 0x5702286c, 0x5702286c, 0x3e001a81, 0x3e001a81},
 381 +       {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x42001a83, 0x42001a83},
 382 +       {0x0000a550, 0x61024a6c, 0x61024a6c, 0x44001c84, 0x44001c84},
 383 +       {0x0000a554, 0x66026a6c, 0x66026a6c, 0x48001ce3, 0x48001ce3},
 384 +       {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x4c001ce5, 0x4c001ce5},
 385 +       {0x0000a55c, 0x7002708c, 0x7002708c, 0x50001ce9, 0x50001ce9},
 386 +       {0x0000a560, 0x7302b08a, 0x7302b08a, 0x54001ceb, 0x54001ceb},
 387 +       {0x0000a564, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 388 +       {0x0000a568, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 389 +       {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 390 +       {0x0000a570, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 391 +       {0x0000a574, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 392 +       {0x0000a578, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 393 +       {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 394 +       {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
 395 +       {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
 396 +       {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
 397 +       {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
 398 +       {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202},
 399 +       {0x0000a594, 0x1c800223, 0x1c800223, 0x11800400, 0x11800400},
 400 +       {0x0000a598, 0x21820220, 0x21820220, 0x15800402, 0x15800402},
 401 +       {0x0000a59c, 0x27820223, 0x27820223, 0x19800404, 0x19800404},
 402 +       {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800603, 0x1b800603},
 403 +       {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800a02, 0x1f800a02},
 404 +       {0x0000a5a8, 0x34822225, 0x34822225, 0x23800a04, 0x23800a04},
 405 +       {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x26800a20, 0x26800a20},
 406 +       {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2a800e20, 0x2a800e20},
 407 +       {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2e800e22, 0x2e800e22},
 408 +       {0x0000a5b8, 0x4782244a, 0x4782244a, 0x31800e24, 0x31800e24},
 409 +       {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x34801640, 0x34801640},
 410 +       {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38801660, 0x38801660},
 411 +       {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3b801861, 0x3b801861},
 412 +       {0x0000a5c8, 0x5782286c, 0x5782286c, 0x3e801a81, 0x3e801a81},
 413 +       {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x42801a83, 0x42801a83},
 414 +       {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x44801c84, 0x44801c84},
 415 +       {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x48801ce3, 0x48801ce3},
 416 +       {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x4c801ce5, 0x4c801ce5},
 417 +       {0x0000a5dc, 0x7086308c, 0x7086308c, 0x50801ce9, 0x50801ce9},
 418 +       {0x0000a5e0, 0x738a308a, 0x738a308a, 0x54801ceb, 0x54801ceb},
 419 +       {0x0000a5e4, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 420 +       {0x0000a5e8, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 421 +       {0x0000a5ec, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 422 +       {0x0000a5f0, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 423 +       {0x0000a5f4, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 424 +       {0x0000a5f8, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 425 +       {0x0000a5fc, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 426 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 427 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 428 +       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 429 +       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 430 +       {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 431 +       {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
 432 +       {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
 433 +       {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
 434 +       {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
 435 +       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
 436 +       {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
 437 +       {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
 438 +       {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
 439 +       {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
 440 +       {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
 441 +       {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
 442 +       {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
 443 +       {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
 444 +       {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
 445 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
 446 +       {0x00016044, 0x056db2db, 0x056db2db, 0x03b6d2e4, 0x03b6d2e4},
 447 +       {0x00016048, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266},
 448 +       {0x00016280, 0x01000015, 0x01000015, 0x01001015, 0x01001015},
 449 +       {0x00016288, 0x30318000, 0x30318000, 0x00318000, 0x00318000},
 450 +       {0x00016444, 0x056db2db, 0x056db2db, 0x03b6d2e4, 0x03b6d2e4},
 451 +       {0x00016448, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266},
 452 +       {0x0000a3a4, 0x00000011, 0x00000011, 0x00000011, 0x00000011},
 453 +       {0x0000a3a8, 0x3c3c3c3c, 0x3c3c3c3c, 0x3c3c3c3c, 0x3c3c3c3c},
 454 +       {0x0000a3ac, 0x30303030, 0x30303030, 0x30303030, 0x30303030},
 455 +};
 456 +
 457  #endif /* INITVALS_9340_H */
 458 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
 459 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
 460 @@ -459,6 +459,7 @@ void ath_check_ani(struct ath_softc *sc)
 461  int ath_update_survey_stats(struct ath_softc *sc);
 462  void ath_update_survey_nf(struct ath_softc *sc, int channel);
 463  void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
 464 +void ath_ps_full_sleep(unsigned long data);
 465
 466  /**********/
 467  /* BTCOEX */
 468 @@ -570,6 +571,34 @@ static inline void ath_fill_led_pin(stru
 469  }
 470  #endif
 471
 472 +/************************/
 473 +/* Wake on Wireless LAN */
 474 +/************************/
 475 +
 476 +#ifdef CONFIG_ATH9K_WOW
 477 +void ath9k_init_wow(struct ieee80211_hw *hw);
 478 +int ath9k_suspend(struct ieee80211_hw *hw,
 479 +                 struct cfg80211_wowlan *wowlan);
 480 +int ath9k_resume(struct ieee80211_hw *hw);
 481 +void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
 482 +#else
 483 +static inline void ath9k_init_wow(struct ieee80211_hw *hw)
 484 +{
 485 +}
 486 +static inline int ath9k_suspend(struct ieee80211_hw *hw,
 487 +                               struct cfg80211_wowlan *wowlan)
 488 +{
 489 +       return 0;
 490 +}
 491 +static inline int ath9k_resume(struct ieee80211_hw *hw)
 492 +{
 493 +       return 0;
 494 +}
 495 +static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
 496 +{
 497 +}
 498 +#endif /* CONFIG_ATH9K_WOW */
 499 +
 500  /*******************************/
 501  /* Antenna diversity/combining */
 502  /*******************************/
 503 @@ -632,15 +661,16 @@ void ath_ant_comb_scan(struct ath_softc
 504  /* Main driver core */
 505  /********************/
 506
 507 -#define ATH9K_PCI_CUS198      0x0001
 508 -#define ATH9K_PCI_CUS230      0x0002
 509 -#define ATH9K_PCI_CUS217      0x0004
 510 -#define ATH9K_PCI_CUS252      0x0008
 511 -#define ATH9K_PCI_WOW         0x0010
 512 -#define ATH9K_PCI_BT_ANT_DIV  0x0020
 513 -#define ATH9K_PCI_D3_L1_WAR   0x0040
 514 -#define ATH9K_PCI_AR9565_1ANT 0x0080
 515 -#define ATH9K_PCI_AR9565_2ANT 0x0100
 516 +#define ATH9K_PCI_CUS198          0x0001
 517 +#define ATH9K_PCI_CUS230          0x0002
 518 +#define ATH9K_PCI_CUS217          0x0004
 519 +#define ATH9K_PCI_CUS252          0x0008
 520 +#define ATH9K_PCI_WOW             0x0010
 521 +#define ATH9K_PCI_BT_ANT_DIV      0x0020
 522 +#define ATH9K_PCI_D3_L1_WAR       0x0040
 523 +#define ATH9K_PCI_AR9565_1ANT     0x0080
 524 +#define ATH9K_PCI_AR9565_2ANT     0x0100
 525 +#define ATH9K_PCI_NO_PLL_PWRSAVE  0x0200
 526
 527  /*
 528   * Default cache line size, in bytes.
 529 @@ -723,6 +753,7 @@ struct ath_softc {
 530         struct work_struct hw_check_work;
 531         struct work_struct hw_reset_work;
 532         struct completion paprd_complete;
 533 +       wait_queue_head_t tx_wait;
 534
 535         unsigned int hw_busy_count;
 536         unsigned long sc_flags;
 537 @@ -759,6 +790,7 @@ struct ath_softc {
 538         struct delayed_work tx_complete_work;
 539         struct delayed_work hw_pll_work;
 540         struct timer_list rx_poll_timer;
 541 +       struct timer_list sleep_timer;
 542
 543  #ifdef CPTCFG_ATH9K_BTCOEX_SUPPORT
 544         struct ath_btcoex btcoex;
 545 @@ -783,7 +815,7 @@ struct ath_softc {
 546         bool tx99_state;
 547         s16 tx99_power;
 548
 549 -#ifdef CONFIG_PM_SLEEP
 550 +#ifdef CONFIG_ATH9K_WOW
 551         atomic_t wow_got_bmiss_intr;
 552         atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */
 553         u32 wow_intr_before_sleep;
 554 @@ -946,10 +978,25 @@ struct fft_sample_ht20_40 {
 555         u8 data[SPECTRAL_HT20_40_NUM_BINS];
 556  } __packed;
 557
 558 -int ath9k_tx99_init(struct ath_softc *sc);
 559 -void ath9k_tx99_deinit(struct ath_softc *sc);
 560 +/********/
 561 +/* TX99 */
 562 +/********/
 563 +
 564 +#ifdef CONFIG_ATH9K_TX99
 565 +void ath9k_tx99_init_debug(struct ath_softc *sc);
 566  int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
 567                     struct ath_tx_control *txctl);
 568 +#else
 569 +static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
 570 +{
 571 +}
 572 +static inline int ath9k_tx99_send(struct ath_softc *sc,
 573 +                                 struct sk_buff *skb,
 574 +                                 struct ath_tx_control *txctl)
 575 +{
 576 +       return 0;
 577 +}
 578 +#endif /* CONFIG_ATH9K_TX99 */
 579
 580  void ath9k_tasklet(unsigned long data);
 581  int ath_cabq_update(struct ath_softc *);
 582 @@ -966,6 +1013,9 @@ extern bool is_ath9k_unloaded;
 583
 584  u8 ath9k_parse_mpdudensity(u8 mpdudensity);
 585  irqreturn_t ath_isr(int irq, void *dev);
 586 +int ath_reset(struct ath_softc *sc);
 587 +void ath_cancel_work(struct ath_softc *sc);
 588 +void ath_restart_work(struct ath_softc *sc);
 589  int ath9k_init_device(u16 devid, struct ath_softc *sc,
 590                     const struct ath_bus_ops *bus_ops);
 591  void ath9k_deinit_device(struct ath_softc *sc);
 592 --- a/drivers/net/wireless/ath/ath9k/debug.c
 593 +++ b/drivers/net/wireless/ath/ath9k/debug.c
 594 @@ -1782,111 +1782,6 @@ void ath9k_deinit_debug(struct ath_softc
 595         }
 596  }
 597
 598 -static ssize_t read_file_tx99(struct file *file, char __user *user_buf,
 599 -                             size_t count, loff_t *ppos)
 600 -{
 601 -       struct ath_softc *sc = file->private_data;
 602 -       char buf[3];
 603 -       unsigned int len;
 604 -
 605 -       len = sprintf(buf, "%d\n", sc->tx99_state);
 606 -       return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 607 -}
 608 -
 609 -static ssize_t write_file_tx99(struct file *file, const char __user *user_buf,
 610 -                              size_t count, loff_t *ppos)
 611 -{
 612 -       struct ath_softc *sc = file->private_data;
 613 -       struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 614 -       char buf[32];
 615 -       bool start;
 616 -       ssize_t len;
 617 -       int r;
 618 -
 619 -       if (sc->nvifs > 1)
 620 -               return -EOPNOTSUPP;
 621 -
 622 -       len = min(count, sizeof(buf) - 1);
 623 -       if (copy_from_user(buf, user_buf, len))
 624 -               return -EFAULT;
 625 -
 626 -       if (strtobool(buf, &start))
 627 -               return -EINVAL;
 628 -
 629 -       if (start == sc->tx99_state) {
 630 -               if (!start)
 631 -                       return count;
 632 -               ath_dbg(common, XMIT, "Resetting TX99\n");
 633 -               ath9k_tx99_deinit(sc);
 634 -       }
 635 -
 636 -       if (!start) {
 637 -               ath9k_tx99_deinit(sc);
 638 -               return count;
 639 -       }
 640 -
 641 -       r = ath9k_tx99_init(sc);
 642 -       if (r)
 643 -               return r;
 644 -
 645 -       return count;
 646 -}
 647 -
 648 -static const struct file_operations fops_tx99 = {
 649 -       .read = read_file_tx99,
 650 -       .write = write_file_tx99,
 651 -       .open = simple_open,
 652 -       .owner = THIS_MODULE,
 653 -       .llseek = default_llseek,
 654 -};
 655 -
 656 -static ssize_t read_file_tx99_power(struct file *file,
 657 -                                   char __user *user_buf,
 658 -                                   size_t count, loff_t *ppos)
 659 -{
 660 -       struct ath_softc *sc = file->private_data;
 661 -       char buf[32];
 662 -       unsigned int len;
 663 -
 664 -       len = sprintf(buf, "%d (%d dBm)\n",
 665 -                     sc->tx99_power,
 666 -                     sc->tx99_power / 2);
 667 -
 668 -       return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 669 -}
 670 -
 671 -static ssize_t write_file_tx99_power(struct file *file,
 672 -                                    const char __user *user_buf,
 673 -                                    size_t count, loff_t *ppos)
 674 -{
 675 -       struct ath_softc *sc = file->private_data;
 676 -       int r;
 677 -       u8 tx_power;
 678 -
 679 -       r = kstrtou8_from_user(user_buf, count, 0, &tx_power);
 680 -       if (r)
 681 -               return r;
 682 -
 683 -       if (tx_power > MAX_RATE_POWER)
 684 -               return -EINVAL;
 685 -
 686 -       sc->tx99_power = tx_power;
 687 -
 688 -       ath9k_ps_wakeup(sc);
 689 -       ath9k_hw_tx99_set_txpower(sc->sc_ah, sc->tx99_power);
 690 -       ath9k_ps_restore(sc);
 691 -
 692 -       return count;
 693 -}
 694 -
 695 -static const struct file_operations fops_tx99_power = {
 696 -       .read = read_file_tx99_power,
 697 -       .write = write_file_tx99_power,
 698 -       .open = simple_open,
 699 -       .owner = THIS_MODULE,
 700 -       .llseek = default_llseek,
 701 -};
 702 -
 703  int ath9k_init_debug(struct ath_hw *ah)
 704  {
 705         struct ath_common *common = ath9k_hw_common(ah);
 706 @@ -1903,6 +1798,7 @@ int ath9k_init_debug(struct ath_hw *ah)
 707  #endif
 708
 709         ath9k_dfs_init_debug(sc);
 710 +       ath9k_tx99_init_debug(sc);
 711
 712         debugfs_create_file("dma", S_IRUSR, sc->debug.debugfs_phy, sc,
 713                             &fops_dma);
 714 @@ -1978,15 +1874,6 @@ int ath9k_init_debug(struct ath_hw *ah)
 715         debugfs_create_file("btcoex", S_IRUSR, sc->debug.debugfs_phy, sc,
 716                             &fops_btcoex);
 717  #endif
 718 -       if (config_enabled(CPTCFG_ATH9K_TX99) &&
 719 -           AR_SREV_9300_20_OR_LATER(ah)) {
 720 -               debugfs_create_file("tx99", S_IRUSR | S_IWUSR,
 721 -                                   sc->debug.debugfs_phy, sc,
 722 -                                   &fops_tx99);
 723 -               debugfs_create_file("tx99_power", S_IRUSR | S_IWUSR,
 724 -                                   sc->debug.debugfs_phy, sc,
 725 -                                   &fops_tx99_power);
 726 -       }
 727
 728         return 0;
 729  }
 730 --- a/drivers/net/wireless/ath/ath9k/hw.c
 731 +++ b/drivers/net/wireless/ath/ath9k/hw.c
 732 @@ -17,6 +17,7 @@
 733  #include <linux/io.h>
 734  #include <linux/slab.h>
 735  #include <linux/module.h>
 736 +#include <linux/time.h>
 737  #include <asm/unaligned.h>
 738
 739  #include "hw.h"
 740 @@ -454,7 +455,6 @@ static void ath9k_hw_init_config(struct
 741         }
 742
 743         ah->config.rx_intr_mitigation = true;
 744 -       ah->config.pcieSerDesWrite = true;
 745
 746         /*
 747          * We need this for PCI devices only (Cardbus, PCI, miniPCI)
 748 @@ -1502,8 +1502,9 @@ static bool ath9k_hw_channel_change(stru
 749         int r;
 750
 751         if (pCap->hw_caps & ATH9K_HW_CAP_FCC_BAND_SWITCH) {
 752 -               band_switch = IS_CHAN_5GHZ(ah->curchan) != IS_CHAN_5GHZ(chan);
 753 -               mode_diff = (chan->channelFlags != ah->curchan->channelFlags);
 754 +               u32 flags_diff = chan->channelFlags ^ ah->curchan->channelFlags;
 755 +               band_switch = !!(flags_diff & CHANNEL_5GHZ);
 756 +               mode_diff = !!(flags_diff & ~CHANNEL_HT);
 757         }
 758
 759         for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
 760 @@ -1815,7 +1816,7 @@ static int ath9k_hw_do_fastcc(struct ath
 761          * If cross-band fcc is not supoprted, bail out if channelFlags differ.
 762          */
 763         if (!(pCap->hw_caps & ATH9K_HW_CAP_FCC_BAND_SWITCH) &&
 764 -           chan->channelFlags != ah->curchan->channelFlags)
 765 +           ((chan->channelFlags ^ ah->curchan->channelFlags) & ~CHANNEL_HT))
 766                 goto fail;
 767
 768         if (!ath9k_hw_check_alive(ah))
 769 @@ -1856,10 +1857,12 @@ int ath9k_hw_reset(struct ath_hw *ah, st
 770                    struct ath9k_hw_cal_data *caldata, bool fastcc)
 771  {
 772         struct ath_common *common = ath9k_hw_common(ah);
 773 +       struct timespec ts;
 774         u32 saveLedState;
 775         u32 saveDefAntenna;
 776         u32 macStaId1;
 777         u64 tsf = 0;
 778 +       s64 usec = 0;
 779         int r;
 780         bool start_mci_reset = false;
 781         bool save_fullsleep = ah->chip_fullsleep;
 782 @@ -1902,10 +1905,10 @@ int ath9k_hw_reset(struct ath_hw *ah, st
 783
 784         macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B;
 785
 786 -       /* For chips on which RTC reset is done, save TSF before it gets cleared */
 787 -       if (AR_SREV_9100(ah) ||
 788 -           (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)))
 789 -               tsf = ath9k_hw_gettsf64(ah);
 790 +       /* Save TSF before chip reset, a cold reset clears it */
 791 +       tsf = ath9k_hw_gettsf64(ah);
 792 +       getrawmonotonic(&ts);
 793 +       usec = ts.tv_sec * 1000 + ts.tv_nsec / 1000;
 794
 795         saveLedState = REG_READ(ah, AR_CFG_LED) &
 796                 (AR_CFG_LED_ASSOC_CTL | AR_CFG_LED_MODE_SEL |
 797 @@ -1938,8 +1941,9 @@ int ath9k_hw_reset(struct ath_hw *ah, st
 798         }
 799
 800         /* Restore TSF */
 801 -       if (tsf)
 802 -               ath9k_hw_settsf64(ah, tsf);
 803 +       getrawmonotonic(&ts);
 804 +       usec = ts.tv_sec * 1000 + ts.tv_nsec / 1000 - usec;
 805 +       ath9k_hw_settsf64(ah, tsf + usec);
 806
 807         if (AR_SREV_9280_20_OR_LATER(ah))
 808                 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE);
 809 --- a/drivers/net/wireless/ath/ath9k/hw.h
 810 +++ b/drivers/net/wireless/ath/ath9k/hw.h
 811 @@ -283,7 +283,6 @@ struct ath9k_ops_config {
 812         int additional_swba_backoff;
 813         int ack_6mb;
 814         u32 cwm_ignore_extcca;
 815 -       bool pcieSerDesWrite;
 816         u8 pcie_clock_req;
 817         u32 pcie_waen;
 818         u8 analog_shiftreg;
 819 @@ -316,6 +315,7 @@ struct ath9k_ops_config {
 820         u32 ant_ctrl_comm2g_switch_enable;
 821         bool xatten_margin_cfg;
 822         bool alt_mingainidx;
 823 +       bool no_pll_pwrsave;
 824  };
 825
 826  enum ath9k_int {
 827 @@ -920,7 +920,7 @@ struct ath_hw {
 828         /* Enterprise mode cap */
 829         u32 ent_mode;
 830
 831 -#ifdef CONFIG_PM_SLEEP
 832 +#ifdef CONFIG_ATH9K_WOW
 833         u32 wow_event_mask;
 834  #endif
 835         bool is_clk_25mhz;
 836 @@ -1126,7 +1126,7 @@ ath9k_hw_get_btcoex_scheme(struct ath_hw
 837  #endif /* CPTCFG_ATH9K_BTCOEX_SUPPORT */
 838
 839
 840 -#ifdef CONFIG_PM_SLEEP
 841 +#ifdef CONFIG_ATH9K_WOW
 842  const char *ath9k_hw_wow_event_to_string(u32 wow_event);
 843  void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern,
 844                                 u8 *user_mask, int pattern_count,
 845 --- a/drivers/net/wireless/ath/ath9k/init.c
 846 +++ b/drivers/net/wireless/ath/ath9k/init.c
 847 @@ -609,6 +609,11 @@ static void ath9k_init_platform(struct a
 848                 ah->config.pcie_waen = 0x0040473b;
 849                 ath_info(common, "Enable WAR for ASPM D3/L1\n");
 850         }
 851 +
 852 +       if (sc->driver_data & ATH9K_PCI_NO_PLL_PWRSAVE) {
 853 +               ah->config.no_pll_pwrsave = true;
 854 +               ath_info(common, "Disable PLL PowerSave\n");
 855 +       }
 856  }
 857
 858  static void ath9k_eeprom_request_cb(const struct firmware *eeprom_blob,
 859 @@ -683,6 +688,7 @@ static int ath9k_init_softc(u16 devid, s
 860         common = ath9k_hw_common(ah);
 861         sc->dfs_detector = dfs_pattern_detector_init(common, NL80211_DFS_UNSET);
 862         sc->tx99_power = MAX_RATE_POWER + 1;
 863 +       init_waitqueue_head(&sc->tx_wait);
 864
 865         if (!pdata) {
 866                 ah->ah_flags |= AH_USE_EEPROM;
 867 @@ -730,6 +736,7 @@ static int ath9k_init_softc(u16 devid, s
 868         tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet,
 869                      (unsigned long)sc);
 870
 871 +       setup_timer(&sc->sleep_timer, ath_ps_full_sleep, (unsigned long)sc);
 872         INIT_WORK(&sc->hw_reset_work, ath_reset_work);
 873         INIT_WORK(&sc->hw_check_work, ath_hw_check);
 874         INIT_WORK(&sc->paprd_work, ath_paprd_calibrate);
 875 @@ -845,7 +852,8 @@ static const struct ieee80211_iface_limi
 876  };
 877
 878  static const struct ieee80211_iface_limit if_dfs_limits[] = {
 879 -       { .max = 1,     .types = BIT(NL80211_IFTYPE_AP) },
 880 +       { .max = 1,     .types = BIT(NL80211_IFTYPE_AP) |
 881 +                                BIT(NL80211_IFTYPE_ADHOC) },
 882  };
 883
 884  static const struct ieee80211_iface_combination if_comb[] = {
 885 @@ -862,20 +870,11 @@ static const struct ieee80211_iface_comb
 886                 .max_interfaces = 1,
 887                 .num_different_channels = 1,
 888                 .beacon_int_infra_match = true,
 889 -               .radar_detect_widths =  BIT(NL80211_CHAN_NO_HT) |
 890 -                                       BIT(NL80211_CHAN_HT20),
 891 +               .radar_detect_widths =  BIT(NL80211_CHAN_WIDTH_20_NOHT) |
 892 +                                       BIT(NL80211_CHAN_WIDTH_20),
 893         }
 894  };
 895
 896 -#ifdef CONFIG_PM
 897 -static const struct wiphy_wowlan_support ath9k_wowlan_support = {
 898 -       .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT,
 899 -       .n_patterns = MAX_NUM_USER_PATTERN,
 900 -       .pattern_min_len = 1,
 901 -       .pattern_max_len = MAX_PATTERN_SIZE,
 902 -};
 903 -#endif
 904 -
 905  void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
 906  {
 907         struct ath_hw *ah = sc->sc_ah;
 908 @@ -925,16 +924,6 @@ void ath9k_set_hw_capab(struct ath_softc
 909         hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_5_10_MHZ;
 910         hw->wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
 911
 912 -#ifdef CONFIG_PM_SLEEP
 913 -       if ((ah->caps.hw_caps & ATH9K_HW_WOW_DEVICE_CAPABLE) &&
 914 -           (sc->driver_data & ATH9K_PCI_WOW) &&
 915 -           device_can_wakeup(sc->dev))
 916 -               hw->wiphy->wowlan = &ath9k_wowlan_support;
 917 -
 918 -       atomic_set(&sc->wow_sleep_proc_intr, -1);
 919 -       atomic_set(&sc->wow_got_bmiss_intr, -1);
 920 -#endif
 921 -
 922         hw->queues = 4;
 923         hw->max_rates = 4;
 924         hw->channel_change_time = 5000;
 925 @@ -960,6 +949,7 @@ void ath9k_set_hw_capab(struct ath_softc
 926                 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
 927                         &sc->sbands[IEEE80211_BAND_5GHZ];
 928
 929 +       ath9k_init_wow(hw);
 930         ath9k_reload_chainmask_settings(sc);
 931
 932         SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
 933 @@ -1058,6 +1048,7 @@ static void ath9k_deinit_softc(struct at
 934                 if (ATH_TXQ_SETUP(sc, i))
 935                         ath_tx_cleanupq(sc, &sc->tx.txq[i]);
 936
 937 +       del_timer_sync(&sc->sleep_timer);
 938         ath9k_hw_deinit(sc->sc_ah);
 939         if (sc->dfs_detector != NULL)
 940                 sc->dfs_detector->exit(sc->dfs_detector);
 941 --- a/drivers/net/wireless/ath/ath9k/main.c
 942 +++ b/drivers/net/wireless/ath/ath9k/main.c
 943 @@ -82,6 +82,22 @@ static bool ath9k_setpower(struct ath_so
 944         return ret;
 945  }
 946
 947 +void ath_ps_full_sleep(unsigned long data)
 948 +{
 949 +       struct ath_softc *sc = (struct ath_softc *) data;
 950 +       struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 951 +       bool reset;
 952 +
 953 +       spin_lock(&common->cc_lock);
 954 +       ath_hw_cycle_counters_update(common);
 955 +       spin_unlock(&common->cc_lock);
 956 +
 957 +       ath9k_hw_setrxabort(sc->sc_ah, 1);
 958 +       ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 959 +
 960 +       ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 961 +}
 962 +
 963  void ath9k_ps_wakeup(struct ath_softc *sc)
 964  {
 965         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 966 @@ -92,6 +108,7 @@ void ath9k_ps_wakeup(struct ath_softc *s
 967         if (++sc->ps_usecount != 1)
 968                 goto unlock;
 969
 970 +       del_timer_sync(&sc->sleep_timer);
 971         power_mode = sc->sc_ah->power_mode;
 972         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 973
 974 @@ -117,17 +134,17 @@ void ath9k_ps_restore(struct ath_softc *
 975         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 976         enum ath9k_power_mode mode;
 977         unsigned long flags;
 978 -       bool reset;
 979
 980         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 981         if (--sc->ps_usecount != 0)
 982                 goto unlock;
 983
 984         if (sc->ps_idle) {
 985 -               ath9k_hw_setrxabort(sc->sc_ah, 1);
 986 -               ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 987 -               mode = ATH9K_PM_FULL_SLEEP;
 988 -       } else if (sc->ps_enabled &&
 989 +               mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 990 +               goto unlock;
 991 +       }
 992 +
 993 +       if (sc->ps_enabled &&
 994                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 995                                      PS_WAIT_FOR_CAB |
 996                                      PS_WAIT_FOR_PSPOLL_DATA |
 997 @@ -163,13 +180,13 @@ static void __ath_cancel_work(struct ath
 998  #endif
 999  }
1000
1001 -static void ath_cancel_work(struct ath_softc *sc)
1002 +void ath_cancel_work(struct ath_softc *sc)
1003  {
1004         __ath_cancel_work(sc);
1005         cancel_work_sync(&sc->hw_reset_work);
1006  }
1007
1008 -static void ath_restart_work(struct ath_softc *sc)
1009 +void ath_restart_work(struct ath_softc *sc)
1010  {
1011         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1012
1013 @@ -487,6 +504,8 @@ void ath9k_tasklet(unsigned long data)
1014                         ath_tx_edma_tasklet(sc);
1015                 else
1016                         ath_tx_tasklet(sc);
1017 +
1018 +               wake_up(&sc->tx_wait);
1019         }
1020
1021         ath9k_btcoex_handle_interrupt(sc, status);
1022 @@ -579,7 +598,8 @@ irqreturn_t ath_isr(int irq, void *dev)
1023
1024                 goto chip_reset;
1025         }
1026 -#ifdef CONFIG_PM_SLEEP
1027 +
1028 +#ifdef CONFIG_ATH9K_WOW
1029         if (status & ATH9K_INT_BMISS) {
1030                 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
1031                         ath_dbg(common, ANY, "during WoW we got a BMISS\n");
1032 @@ -588,6 +608,8 @@ irqreturn_t ath_isr(int irq, void *dev)
1033                 }
1034         }
1035  #endif
1036 +
1037 +
1038         if (status & ATH9K_INT_SWBA)
1039                 tasklet_schedule(&sc->bcon_tasklet);
1040
1041 @@ -627,7 +649,7 @@ chip_reset:
1042  #undef SCHED_INTR
1043  }
1044
1045 -static int ath_reset(struct ath_softc *sc)
1046 +int ath_reset(struct ath_softc *sc)
1047  {
1048         int r;
1049
1050 @@ -1817,13 +1839,31 @@ static void ath9k_set_coverage_class(str
1051         mutex_unlock(&sc->mutex);
1052  }
1053
1054 +static bool ath9k_has_tx_pending(struct ath_softc *sc)
1055 +{
1056 +       int i, npend;
1057 +
1058 +       for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1059 +               if (!ATH_TXQ_SETUP(sc, i))
1060 +                       continue;
1061 +
1062 +               if (!sc->tx.txq[i].axq_depth)
1063 +                       continue;
1064 +
1065 +               npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1066 +               if (npend)
1067 +                       break;
1068 +       }
1069 +
1070 +       return !!npend;
1071 +}
1072 +
1073  static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1074  {
1075         struct ath_softc *sc = hw->priv;
1076         struct ath_hw *ah = sc->sc_ah;
1077         struct ath_common *common = ath9k_hw_common(ah);
1078 -       int timeout = 200; /* ms */
1079 -       int i, j;
1080 +       int timeout = HZ / 5; /* 200 ms */
1081         bool drain_txq;
1082
1083         mutex_lock(&sc->mutex);
1084 @@ -1841,25 +1881,9 @@ static void ath9k_flush(struct ieee80211
1085                 return;
1086         }
1087
1088 -       for (j = 0; j < timeout; j++) {
1089 -               bool npend = false;
1090 -
1091 -               if (j)
1092 -                       usleep_range(1000, 2000);
1093 -
1094 -               for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1095 -                       if (!ATH_TXQ_SETUP(sc, i))
1096 -                               continue;
1097 -
1098 -                       npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1099 -
1100 -                       if (npend)
1101 -                               break;
1102 -               }
1103 -
1104 -               if (!npend)
1105 -                   break;
1106 -       }
1107 +       if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc),
1108 +                              timeout) > 0)
1109 +               drop = false;
1110
1111         if (drop) {
1112                 ath9k_ps_wakeup(sc);
1113 @@ -2021,333 +2045,6 @@ static int ath9k_get_antenna(struct ieee
1114         return 0;
1115  }
1116
1117 -#ifdef CONFIG_PM_SLEEP
1118 -
1119 -static void ath9k_wow_map_triggers(struct ath_softc *sc,
1120 -                                  struct cfg80211_wowlan *wowlan,
1121 -                                  u32 *wow_triggers)
1122 -{
1123 -       if (wowlan->disconnect)
1124 -               *wow_triggers |= AH_WOW_LINK_CHANGE |
1125 -                                AH_WOW_BEACON_MISS;
1126 -       if (wowlan->magic_pkt)
1127 -               *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN;
1128 -
1129 -       if (wowlan->n_patterns)
1130 -               *wow_triggers |= AH_WOW_USER_PATTERN_EN;
1131 -
1132 -       sc->wow_enabled = *wow_triggers;
1133 -
1134 -}
1135 -
1136 -static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
1137 -{
1138 -       struct ath_hw *ah = sc->sc_ah;
1139 -       struct ath_common *common = ath9k_hw_common(ah);
1140 -       int pattern_count = 0;
1141 -       int i, byte_cnt;
1142 -       u8 dis_deauth_pattern[MAX_PATTERN_SIZE];
1143 -       u8 dis_deauth_mask[MAX_PATTERN_SIZE];
1144 -
1145 -       memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE);
1146 -       memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE);
1147 -
1148 -       /*
1149 -        * Create Dissassociate / Deauthenticate packet filter
1150 -        *
1151 -        *     2 bytes        2 byte    6 bytes   6 bytes  6 bytes
1152 -        *  +--------------+----------+---------+--------+--------+----
1153 -        *  + Frame Control+ Duration +   DA    +  SA    +  BSSID +
1154 -        *  +--------------+----------+---------+--------+--------+----
1155 -        *
1156 -        * The above is the management frame format for disassociate/
1157 -        * deauthenticate pattern, from this we need to match the first byte
1158 -        * of 'Frame Control' and DA, SA, and BSSID fields
1159 -        * (skipping 2nd byte of FC and Duration feild.
1160 -        *
1161 -        * Disassociate pattern
1162 -        * --------------------
1163 -        * Frame control = 00 00 1010
1164 -        * DA, SA, BSSID = x:x:x:x:x:x
1165 -        * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x
1166 -        *                          | x:x:x:x:x:x  -- 22 bytes
1167 -        *
1168 -        * Deauthenticate pattern
1169 -        * ----------------------
1170 -        * Frame control = 00 00 1100
1171 -        * DA, SA, BSSID = x:x:x:x:x:x
1172 -        * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x
1173 -        *                          | x:x:x:x:x:x  -- 22 bytes
1174 -        */
1175 -
1176 -       /* Create Disassociate Pattern first */
1177 -
1178 -       byte_cnt = 0;
1179 -
1180 -       /* Fill out the mask with all FF's */
1181 -
1182 -       for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++)
1183 -               dis_deauth_mask[i] = 0xff;
1184 -
1185 -       /* copy the first byte of frame control field */
1186 -       dis_deauth_pattern[byte_cnt] = 0xa0;
1187 -       byte_cnt++;
1188 -
1189 -       /* skip 2nd byte of frame control and Duration field */
1190 -       byte_cnt += 3;
1191 -
1192 -       /*
1193 -        * need not match the destination mac address, it can be a broadcast
1194 -        * mac address or an unicast to this station
1195 -        */
1196 -       byte_cnt += 6;
1197 -
1198 -       /* copy the source mac address */
1199 -       memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
1200 -
1201 -       byte_cnt += 6;
1202 -
1203 -       /* copy the bssid, its same as the source mac address */
1204 -
1205 -       memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
1206 -
1207 -       /* Create Disassociate pattern mask */
1208 -
1209 -       dis_deauth_mask[0] = 0xfe;
1210 -       dis_deauth_mask[1] = 0x03;
1211 -       dis_deauth_mask[2] = 0xc0;
1212 -
1213 -       ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n");
1214 -
1215 -       ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
1216 -                                  pattern_count, byte_cnt);
1217 -
1218 -       pattern_count++;
1219 -       /*
1220 -        * for de-authenticate pattern, only the first byte of the frame
1221 -        * control field gets changed from 0xA0 to 0xC0
1222 -        */
1223 -       dis_deauth_pattern[0] = 0xC0;
1224 -
1225 -       ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
1226 -                                  pattern_count, byte_cnt);
1227 -
1228 -}
1229 -
1230 -static void ath9k_wow_add_pattern(struct ath_softc *sc,
1231 -                                 struct cfg80211_wowlan *wowlan)
1232 -{
1233 -       struct ath_hw *ah = sc->sc_ah;
1234 -       struct ath9k_wow_pattern *wow_pattern = NULL;
1235 -       struct cfg80211_pkt_pattern *patterns = wowlan->patterns;
1236 -       int mask_len;
1237 -       s8 i = 0;
1238 -
1239 -       if (!wowlan->n_patterns)
1240 -               return;
1241 -
1242 -       /*
1243 -        * Add the new user configured patterns
1244 -        */
1245 -       for (i = 0; i < wowlan->n_patterns; i++) {
1246 -
1247 -               wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
1248 -
1249 -               if (!wow_pattern)
1250 -                       return;
1251 -
1252 -               /*
1253 -                * TODO: convert the generic user space pattern to
1254 -                * appropriate chip specific/802.11 pattern.
1255 -                */
1256 -
1257 -               mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8);
1258 -               memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE);
1259 -               memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE);
1260 -               memcpy(wow_pattern->pattern_bytes, patterns[i].pattern,
1261 -                      patterns[i].pattern_len);
1262 -               memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len);
1263 -               wow_pattern->pattern_len = patterns[i].pattern_len;
1264 -
1265 -               /*
1266 -                * just need to take care of deauth and disssoc pattern,
1267 -                * make sure we don't overwrite them.
1268 -                */
1269 -
1270 -               ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes,
1271 -                                          wow_pattern->mask_bytes,
1272 -                                          i + 2,
1273 -                                          wow_pattern->pattern_len);
1274 -               kfree(wow_pattern);
1275 -
1276 -       }
1277 -
1278 -}
1279 -
1280 -static int ath9k_suspend(struct ieee80211_hw *hw,
1281 -                        struct cfg80211_wowlan *wowlan)
1282 -{
1283 -       struct ath_softc *sc = hw->priv;
1284 -       struct ath_hw *ah = sc->sc_ah;
1285 -       struct ath_common *common = ath9k_hw_common(ah);
1286 -       u32 wow_triggers_enabled = 0;
1287 -       int ret = 0;
1288 -
1289 -       mutex_lock(&sc->mutex);
1290 -
1291 -       ath_cancel_work(sc);
1292 -       ath_stop_ani(sc);
1293 -       del_timer_sync(&sc->rx_poll_timer);
1294 -
1295 -       if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
1296 -               ath_dbg(common, ANY, "Device not present\n");
1297 -               ret = -EINVAL;
1298 -               goto fail_wow;
1299 -       }
1300 -
1301 -       if (WARN_ON(!wowlan)) {
1302 -               ath_dbg(common, WOW, "None of the WoW triggers enabled\n");
1303 -               ret = -EINVAL;
1304 -               goto fail_wow;
1305 -       }
1306 -
1307 -       if (!device_can_wakeup(sc->dev)) {
1308 -               ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n");
1309 -               ret = 1;
1310 -               goto fail_wow;
1311 -       }
1312 -
1313 -       /*
1314 -        * none of the sta vifs are associated
1315 -        * and we are not currently handling multivif
1316 -        * cases, for instance we have to seperately
1317 -        * configure 'keep alive frame' for each
1318 -        * STA.
1319 -        */
1320 -
1321 -       if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
1322 -               ath_dbg(common, WOW, "None of the STA vifs are associated\n");
1323 -               ret = 1;
1324 -               goto fail_wow;
1325 -       }
1326 -
1327 -       if (sc->nvifs > 1) {
1328 -               ath_dbg(common, WOW, "WoW for multivif is not yet supported\n");
1329 -               ret = 1;
1330 -               goto fail_wow;
1331 -       }
1332 -
1333 -       ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled);
1334 -
1335 -       ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n",
1336 -               wow_triggers_enabled);
1337 -
1338 -       ath9k_ps_wakeup(sc);
1339 -
1340 -       ath9k_stop_btcoex(sc);
1341 -
1342 -       /*
1343 -        * Enable wake up on recieving disassoc/deauth
1344 -        * frame by default.
1345 -        */
1346 -       ath9k_wow_add_disassoc_deauth_pattern(sc);
1347 -
1348 -       if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN)
1349 -               ath9k_wow_add_pattern(sc, wowlan);
1350 -
1351 -       spin_lock_bh(&sc->sc_pcu_lock);
1352 -       /*
1353 -        * To avoid false wake, we enable beacon miss interrupt only
1354 -        * when we go to sleep. We save the current interrupt mask
1355 -        * so we can restore it after the system wakes up
1356 -        */
1357 -       sc->wow_intr_before_sleep = ah->imask;
1358 -       ah->imask &= ~ATH9K_INT_GLOBAL;
1359 -       ath9k_hw_disable_interrupts(ah);
1360 -       ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL;
1361 -       ath9k_hw_set_interrupts(ah);
1362 -       ath9k_hw_enable_interrupts(ah);
1363 -
1364 -       spin_unlock_bh(&sc->sc_pcu_lock);
1365 -
1366 -       /*
1367 -        * we can now sync irq and kill any running tasklets, since we already
1368 -        * disabled interrupts and not holding a spin lock
1369 -        */
1370 -       synchronize_irq(sc->irq);
1371 -       tasklet_kill(&sc->intr_tq);
1372 -
1373 -       ath9k_hw_wow_enable(ah, wow_triggers_enabled);
1374 -
1375 -       ath9k_ps_restore(sc);
1376 -       ath_dbg(common, ANY, "WoW enabled in ath9k\n");
1377 -       atomic_inc(&sc->wow_sleep_proc_intr);
1378 -
1379 -fail_wow:
1380 -       mutex_unlock(&sc->mutex);
1381 -       return ret;
1382 -}
1383 -
1384 -static int ath9k_resume(struct ieee80211_hw *hw)
1385 -{
1386 -       struct ath_softc *sc = hw->priv;
1387 -       struct ath_hw *ah = sc->sc_ah;
1388 -       struct ath_common *common = ath9k_hw_common(ah);
1389 -       u32 wow_status;
1390 -
1391 -       mutex_lock(&sc->mutex);
1392 -
1393 -       ath9k_ps_wakeup(sc);
1394 -
1395 -       spin_lock_bh(&sc->sc_pcu_lock);
1396 -
1397 -       ath9k_hw_disable_interrupts(ah);
1398 -       ah->imask = sc->wow_intr_before_sleep;
1399 -       ath9k_hw_set_interrupts(ah);
1400 -       ath9k_hw_enable_interrupts(ah);
1401 -
1402 -       spin_unlock_bh(&sc->sc_pcu_lock);
1403 -
1404 -       wow_status = ath9k_hw_wow_wakeup(ah);
1405 -
1406 -       if (atomic_read(&sc->wow_got_bmiss_intr) == 0) {
1407 -               /*
1408 -                * some devices may not pick beacon miss
1409 -                * as the reason they woke up so we add
1410 -                * that here for that shortcoming.
1411 -                */
1412 -               wow_status |= AH_WOW_BEACON_MISS;
1413 -               atomic_dec(&sc->wow_got_bmiss_intr);
1414 -               ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n");
1415 -       }
1416 -
1417 -       atomic_dec(&sc->wow_sleep_proc_intr);
1418 -
1419 -       if (wow_status) {
1420 -               ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n",
1421 -                       ath9k_hw_wow_event_to_string(wow_status), wow_status);
1422 -       }
1423 -
1424 -       ath_restart_work(sc);
1425 -       ath9k_start_btcoex(sc);
1426 -
1427 -       ath9k_ps_restore(sc);
1428 -       mutex_unlock(&sc->mutex);
1429 -
1430 -       return 0;
1431 -}
1432 -
1433 -static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
1434 -{
1435 -       struct ath_softc *sc = hw->priv;
1436 -
1437 -       mutex_lock(&sc->mutex);
1438 -       device_init_wakeup(sc->dev, 1);
1439 -       device_set_wakeup_enable(sc->dev, enabled);
1440 -       mutex_unlock(&sc->mutex);
1441 -}
1442 -
1443 -#endif
1444  static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1445  {
1446         struct ath_softc *sc = hw->priv;
1447 @@ -2373,134 +2070,6 @@ static void ath9k_channel_switch_beacon(
1448         sc->csa_vif = vif;
1449  }
1450
1451 -static void ath9k_tx99_stop(struct ath_softc *sc)
1452 -{
1453 -       struct ath_hw *ah = sc->sc_ah;
1454 -       struct ath_common *common = ath9k_hw_common(ah);
1455 -
1456 -       ath_drain_all_txq(sc);
1457 -       ath_startrecv(sc);
1458 -
1459 -       ath9k_hw_set_interrupts(ah);
1460 -       ath9k_hw_enable_interrupts(ah);
1461 -
1462 -       ieee80211_wake_queues(sc->hw);
1463 -
1464 -       kfree_skb(sc->tx99_skb);
1465 -       sc->tx99_skb = NULL;
1466 -       sc->tx99_state = false;
1467 -
1468 -       ath9k_hw_tx99_stop(sc->sc_ah);
1469 -       ath_dbg(common, XMIT, "TX99 stopped\n");
1470 -}
1471 -
1472 -static struct sk_buff *ath9k_build_tx99_skb(struct ath_softc *sc)
1473 -{
1474 -       static u8 PN9Data[] = {0xff, 0x87, 0xb8, 0x59, 0xb7, 0xa1, 0xcc, 0x24,
1475 -                              0x57, 0x5e, 0x4b, 0x9c, 0x0e, 0xe9, 0xea, 0x50,
1476 -                              0x2a, 0xbe, 0xb4, 0x1b, 0xb6, 0xb0, 0x5d, 0xf1,
1477 -                              0xe6, 0x9a, 0xe3, 0x45, 0xfd, 0x2c, 0x53, 0x18,
1478 -                              0x0c, 0xca, 0xc9, 0xfb, 0x49, 0x37, 0xe5, 0xa8,
1479 -                              0x51, 0x3b, 0x2f, 0x61, 0xaa, 0x72, 0x18, 0x84,
1480 -                              0x02, 0x23, 0x23, 0xab, 0x63, 0x89, 0x51, 0xb3,
1481 -                              0xe7, 0x8b, 0x72, 0x90, 0x4c, 0xe8, 0xfb, 0xc0};
1482 -       u32 len = 1200;
1483 -       struct ieee80211_hw *hw = sc->hw;
1484 -       struct ieee80211_hdr *hdr;
1485 -       struct ieee80211_tx_info *tx_info;
1486 -       struct sk_buff *skb;
1487 -
1488 -       skb = alloc_skb(len, GFP_KERNEL);
1489 -       if (!skb)
1490 -               return NULL;
1491 -
1492 -       skb_put(skb, len);
1493 -
1494 -       memset(skb->data, 0, len);
1495 -
1496 -       hdr = (struct ieee80211_hdr *)skb->data;
1497 -       hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA);
1498 -       hdr->duration_id = 0;
1499 -
1500 -       memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
1501 -       memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
1502 -       memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
1503 -
1504 -       hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1505 -
1506 -       tx_info = IEEE80211_SKB_CB(skb);
1507 -       memset(tx_info, 0, sizeof(*tx_info));
1508 -       tx_info->band = hw->conf.chandef.chan->band;
1509 -       tx_info->flags = IEEE80211_TX_CTL_NO_ACK;
1510 -       tx_info->control.vif = sc->tx99_vif;
1511 -
1512 -       memcpy(skb->data + sizeof(*hdr), PN9Data, sizeof(PN9Data));
1513 -
1514 -       return skb;
1515 -}
1516 -
1517 -void ath9k_tx99_deinit(struct ath_softc *sc)
1518 -{
1519 -       ath_reset(sc);
1520 -
1521 -       ath9k_ps_wakeup(sc);
1522 -       ath9k_tx99_stop(sc);
1523 -       ath9k_ps_restore(sc);
1524 -}
1525 -
1526 -int ath9k_tx99_init(struct ath_softc *sc)
1527 -{
1528 -       struct ieee80211_hw *hw = sc->hw;
1529 -       struct ath_hw *ah = sc->sc_ah;
1530 -       struct ath_common *common = ath9k_hw_common(ah);
1531 -       struct ath_tx_control txctl;
1532 -       int r;
1533 -
1534 -       if (sc->sc_flags & SC_OP_INVALID) {
1535 -               ath_err(common,
1536 -                       "driver is in invalid state unable to use TX99");
1537 -               return -EINVAL;
1538 -       }
1539 -
1540 -       sc->tx99_skb = ath9k_build_tx99_skb(sc);
1541 -       if (!sc->tx99_skb)
1542 -               return -ENOMEM;
1543 -
1544 -       memset(&txctl, 0, sizeof(txctl));
1545 -       txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO];
1546 -
1547 -       ath_reset(sc);
1548 -
1549 -       ath9k_ps_wakeup(sc);
1550 -
1551 -       ath9k_hw_disable_interrupts(ah);
1552 -       atomic_set(&ah->intr_ref_cnt, -1);
1553 -       ath_drain_all_txq(sc);
1554 -       ath_stoprecv(sc);
1555 -
1556 -       sc->tx99_state = true;
1557 -
1558 -       ieee80211_stop_queues(hw);
1559 -
1560 -       if (sc->tx99_power == MAX_RATE_POWER + 1)
1561 -               sc->tx99_power = MAX_RATE_POWER;
1562 -
1563 -       ath9k_hw_tx99_set_txpower(ah, sc->tx99_power);
1564 -       r = ath9k_tx99_send(sc, sc->tx99_skb, &txctl);
1565 -       if (r) {
1566 -               ath_dbg(common, XMIT, "Failed to xmit TX99 skb\n");
1567 -               return r;
1568 -       }
1569 -
1570 -       ath_dbg(common, XMIT, "TX99 xmit started using %d ( %ddBm)\n",
1571 -               sc->tx99_power,
1572 -               sc->tx99_power / 2);
1573 -
1574 -       /* We leave the harware awake as it will be chugging on */
1575 -
1576 -       return 0;
1577 -}
1578 -
1579  struct ieee80211_ops ath9k_ops = {
1580         .tx                 = ath9k_tx,
1581         .start              = ath9k_start,
1582 @@ -2531,7 +2100,7 @@ struct ieee80211_ops ath9k_ops = {
1583         .set_antenna        = ath9k_set_antenna,
1584         .get_antenna        = ath9k_get_antenna,
1585
1586 -#ifdef CONFIG_PM_SLEEP
1587 +#ifdef CONFIG_ATH9K_WOW
1588         .suspend            = ath9k_suspend,
1589         .resume             = ath9k_resume,
1590         .set_wakeup         = ath9k_set_wakeup,
1591 --- a/drivers/net/wireless/ath/ath9k/wow.c
1592 +++ b/drivers/net/wireless/ath/ath9k/wow.c
1593 @@ -1,5 +1,5 @@
1594  /*
1595 - * Copyright (c) 2012 Qualcomm Atheros, Inc.
1596 + * Copyright (c) 2013 Qualcomm Atheros, Inc.
1597   *
1598   * Permission to use, copy, modify, and/or distribute this software for any
1599   * purpose with or without fee is hereby granted, provided that the above
1600 @@ -14,409 +14,348 @@
1601   * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
1602   */
1603
1604 -#include <linux/export.h>
1605  #include "ath9k.h"
1606 -#include "reg.h"
1607 -#include "hw-ops.h"
1608
1609 -const char *ath9k_hw_wow_event_to_string(u32 wow_event)
1610 +static const struct wiphy_wowlan_support ath9k_wowlan_support = {
1611 +       .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT,
1612 +       .n_patterns = MAX_NUM_USER_PATTERN,
1613 +       .pattern_min_len = 1,
1614 +       .pattern_max_len = MAX_PATTERN_SIZE,
1615 +};
1616 +
1617 +static void ath9k_wow_map_triggers(struct ath_softc *sc,
1618 +                                  struct cfg80211_wowlan *wowlan,
1619 +                                  u32 *wow_triggers)
1620  {
1621 -       if (wow_event & AH_WOW_MAGIC_PATTERN_EN)
1622 -               return "Magic pattern";
1623 -       if (wow_event & AH_WOW_USER_PATTERN_EN)
1624 -               return "User pattern";
1625 -       if (wow_event & AH_WOW_LINK_CHANGE)
1626 -               return "Link change";
1627 -       if (wow_event & AH_WOW_BEACON_MISS)
1628 -               return "Beacon miss";
1629 +       if (wowlan->disconnect)
1630 +               *wow_triggers |= AH_WOW_LINK_CHANGE |
1631 +                                AH_WOW_BEACON_MISS;
1632 +       if (wowlan->magic_pkt)
1633 +               *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN;
1634 +
1635 +       if (wowlan->n_patterns)
1636 +               *wow_triggers |= AH_WOW_USER_PATTERN_EN;
1637 +
1638 +       sc->wow_enabled = *wow_triggers;
1639
1640 -       return  "unknown reason";
1641  }
1642 -EXPORT_SYMBOL(ath9k_hw_wow_event_to_string);
1643
1644 -static void ath9k_hw_set_powermode_wow_sleep(struct ath_hw *ah)
1645 +static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
1646  {
1647 +       struct ath_hw *ah = sc->sc_ah;
1648         struct ath_common *common = ath9k_hw_common(ah);
1649 +       int pattern_count = 0;
1650 +       int i, byte_cnt;
1651 +       u8 dis_deauth_pattern[MAX_PATTERN_SIZE];
1652 +       u8 dis_deauth_mask[MAX_PATTERN_SIZE];
1653
1654 -       REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
1655 +       memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE);
1656 +       memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE);
1657
1658 -       /* set rx disable bit */
1659 -       REG_WRITE(ah, AR_CR, AR_CR_RXD);
1660 +       /*
1661 +        * Create Dissassociate / Deauthenticate packet filter
1662 +        *
1663 +        *     2 bytes        2 byte    6 bytes   6 bytes  6 bytes
1664 +        *  +--------------+----------+---------+--------+--------+----
1665 +        *  + Frame Control+ Duration +   DA    +  SA    +  BSSID +
1666 +        *  +--------------+----------+---------+--------+--------+----
1667 +        *
1668 +        * The above is the management frame format for disassociate/
1669 +        * deauthenticate pattern, from this we need to match the first byte
1670 +        * of 'Frame Control' and DA, SA, and BSSID fields
1671 +        * (skipping 2nd byte of FC and Duration feild.
1672 +        *
1673 +        * Disassociate pattern
1674 +        * --------------------
1675 +        * Frame control = 00 00 1010
1676 +        * DA, SA, BSSID = x:x:x:x:x:x
1677 +        * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x
1678 +        *                          | x:x:x:x:x:x  -- 22 bytes
1679 +        *
1680 +        * Deauthenticate pattern
1681 +        * ----------------------
1682 +        * Frame control = 00 00 1100
1683 +        * DA, SA, BSSID = x:x:x:x:x:x
1684 +        * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x
1685 +        *                          | x:x:x:x:x:x  -- 22 bytes
1686 +        */
1687
1688 -       if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0, AH_WAIT_TIMEOUT)) {
1689 -               ath_err(common, "Failed to stop Rx DMA in 10ms AR_CR=0x%08x AR_DIAG_SW=0x%08x\n",
1690 -                       REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW));
1691 -               return;
1692 -       }
1693 +       /* Create Disassociate Pattern first */
1694
1695 -       REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON_INT);
1696 -}
1697 +       byte_cnt = 0;
1698
1699 -static void ath9k_wow_create_keep_alive_pattern(struct ath_hw *ah)
1700 -{
1701 -       struct ath_common *common = ath9k_hw_common(ah);
1702 -       u8 sta_mac_addr[ETH_ALEN], ap_mac_addr[ETH_ALEN];
1703 -       u32 ctl[13] = {0};
1704 -       u32 data_word[KAL_NUM_DATA_WORDS];
1705 -       u8 i;
1706 -       u32 wow_ka_data_word0;
1707 -
1708 -       memcpy(sta_mac_addr, common->macaddr, ETH_ALEN);
1709 -       memcpy(ap_mac_addr, common->curbssid, ETH_ALEN);
1710 -
1711 -       /* set the transmit buffer */
1712 -       ctl[0] = (KAL_FRAME_LEN | (MAX_RATE_POWER << 16));
1713 -       ctl[1] = 0;
1714 -       ctl[3] = 0xb;   /* OFDM_6M hardware value for this rate */
1715 -       ctl[4] = 0;
1716 -       ctl[7] = (ah->txchainmask) << 2;
1717 -       ctl[2] = 0xf << 16; /* tx_tries 0 */
1718 -
1719 -       for (i = 0; i < KAL_NUM_DESC_WORDS; i++)
1720 -               REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
1721 -
1722 -       REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
1723 -
1724 -       data_word[0] = (KAL_FRAME_TYPE << 2) | (KAL_FRAME_SUB_TYPE << 4) |
1725 -                      (KAL_TO_DS << 8) | (KAL_DURATION_ID << 16);
1726 -       data_word[1] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
1727 -                      (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
1728 -       data_word[2] = (sta_mac_addr[1] << 24) | (sta_mac_addr[0] << 16) |
1729 -                      (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
1730 -       data_word[3] = (sta_mac_addr[5] << 24) | (sta_mac_addr[4] << 16) |
1731 -                      (sta_mac_addr[3] << 8) | (sta_mac_addr[2]);
1732 -       data_word[4] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
1733 -                      (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
1734 -       data_word[5] = (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
1735 -
1736 -       if (AR_SREV_9462_20(ah)) {
1737 -               /* AR9462 2.0 has an extra descriptor word (time based
1738 -                * discard) compared to other chips */
1739 -               REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + (12 * 4)), 0);
1740 -               wow_ka_data_word0 = AR_WOW_TXBUF(13);
1741 -       } else {
1742 -               wow_ka_data_word0 = AR_WOW_TXBUF(12);
1743 -       }
1744 +       /* Fill out the mask with all FF's */
1745
1746 -       for (i = 0; i < KAL_NUM_DATA_WORDS; i++)
1747 -               REG_WRITE(ah, (wow_ka_data_word0 + i*4), data_word[i]);
1748 +       for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++)
1749 +               dis_deauth_mask[i] = 0xff;
1750
1751 -}
1752 +       /* copy the first byte of frame control field */
1753 +       dis_deauth_pattern[byte_cnt] = 0xa0;
1754 +       byte_cnt++;
1755
1756 -void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern,
1757 -                               u8 *user_mask, int pattern_count,
1758 -                               int pattern_len)
1759 -{
1760 -       int i;
1761 -       u32 pattern_val, mask_val;
1762 -       u32 set, clr;
1763 +       /* skip 2nd byte of frame control and Duration field */
1764 +       byte_cnt += 3;
1765
1766 -       /* FIXME: should check count by querying the hardware capability */
1767 -       if (pattern_count >= MAX_NUM_PATTERN)
1768 -               return;
1769 +       /*
1770 +        * need not match the destination mac address, it can be a broadcast
1771 +        * mac address or an unicast to this station
1772 +        */
1773 +       byte_cnt += 6;
1774
1775 -       REG_SET_BIT(ah, AR_WOW_PATTERN, BIT(pattern_count));
1776 +       /* copy the source mac address */
1777 +       memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
1778
1779 -       /* set the registers for pattern */
1780 -       for (i = 0; i < MAX_PATTERN_SIZE; i += 4) {
1781 -               memcpy(&pattern_val, user_pattern, 4);
1782 -               REG_WRITE(ah, (AR_WOW_TB_PATTERN(pattern_count) + i),
1783 -                         pattern_val);
1784 -               user_pattern += 4;
1785 -       }
1786 +       byte_cnt += 6;
1787
1788 -       /* set the registers for mask */
1789 -       for (i = 0; i < MAX_PATTERN_MASK_SIZE; i += 4) {
1790 -               memcpy(&mask_val, user_mask, 4);
1791 -               REG_WRITE(ah, (AR_WOW_TB_MASK(pattern_count) + i), mask_val);
1792 -               user_mask += 4;
1793 -       }
1794 +       /* copy the bssid, its same as the source mac address */
1795
1796 -       /* set the pattern length to be matched
1797 -        *
1798 -        * AR_WOW_LENGTH1_REG1
1799 -        * bit 31:24 pattern 0 length
1800 -        * bit 23:16 pattern 1 length
1801 -        * bit 15:8 pattern 2 length
1802 -        * bit 7:0 pattern 3 length
1803 -        *
1804 -        * AR_WOW_LENGTH1_REG2
1805 -        * bit 31:24 pattern 4 length
1806 -        * bit 23:16 pattern 5 length
1807 -        * bit 15:8 pattern 6 length
1808 -        * bit 7:0 pattern 7 length
1809 -        *
1810 -        * the below logic writes out the new
1811 -        * pattern length for the corresponding
1812 -        * pattern_count, while masking out the
1813 -        * other fields
1814 -        */
1815 +       memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
1816
1817 -       ah->wow_event_mask |= BIT(pattern_count + AR_WOW_PAT_FOUND_SHIFT);
1818 +       /* Create Disassociate pattern mask */
1819
1820 -       if (pattern_count < 4) {
1821 -               /* Pattern 0-3 uses AR_WOW_LENGTH1 register */
1822 -               set = (pattern_len & AR_WOW_LENGTH_MAX) <<
1823 -                      AR_WOW_LEN1_SHIFT(pattern_count);
1824 -               clr = AR_WOW_LENGTH1_MASK(pattern_count);
1825 -               REG_RMW(ah, AR_WOW_LENGTH1, set, clr);
1826 -       } else {
1827 -               /* Pattern 4-7 uses AR_WOW_LENGTH2 register */
1828 -               set = (pattern_len & AR_WOW_LENGTH_MAX) <<
1829 -                      AR_WOW_LEN2_SHIFT(pattern_count);
1830 -               clr = AR_WOW_LENGTH2_MASK(pattern_count);
1831 -               REG_RMW(ah, AR_WOW_LENGTH2, set, clr);
1832 -       }
1833 +       dis_deauth_mask[0] = 0xfe;
1834 +       dis_deauth_mask[1] = 0x03;
1835 +       dis_deauth_mask[2] = 0xc0;
1836
1837 -}
1838 -EXPORT_SYMBOL(ath9k_hw_wow_apply_pattern);
1839 +       ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n");
1840
1841 -u32 ath9k_hw_wow_wakeup(struct ath_hw *ah)
1842 -{
1843 -       u32 wow_status = 0;
1844 -       u32 val = 0, rval;
1845 +       ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
1846 +                                  pattern_count, byte_cnt);
1847
1848 +       pattern_count++;
1849         /*
1850 -        * read the WoW status register to know
1851 -        * the wakeup reason
1852 +        * for de-authenticate pattern, only the first byte of the frame
1853 +        * control field gets changed from 0xA0 to 0xC0
1854          */
1855 -       rval = REG_READ(ah, AR_WOW_PATTERN);
1856 -       val = AR_WOW_STATUS(rval);
1857 +       dis_deauth_pattern[0] = 0xC0;
1858
1859 -       /*
1860 -        * mask only the WoW events that we have enabled. Sometimes
1861 -        * we have spurious WoW events from the AR_WOW_PATTERN
1862 -        * register. This mask will clean it up.
1863 -        */
1864 +       ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
1865 +                                  pattern_count, byte_cnt);
1866
1867 -       val &= ah->wow_event_mask;
1868 +}
1869
1870 -       if (val) {
1871 -               if (val & AR_WOW_MAGIC_PAT_FOUND)
1872 -                       wow_status |= AH_WOW_MAGIC_PATTERN_EN;
1873 -               if (AR_WOW_PATTERN_FOUND(val))
1874 -                       wow_status |= AH_WOW_USER_PATTERN_EN;
1875 -               if (val & AR_WOW_KEEP_ALIVE_FAIL)
1876 -                       wow_status |= AH_WOW_LINK_CHANGE;
1877 -               if (val & AR_WOW_BEACON_FAIL)
1878 -                       wow_status |= AH_WOW_BEACON_MISS;
1879 -       }
1880 +static void ath9k_wow_add_pattern(struct ath_softc *sc,
1881 +                                 struct cfg80211_wowlan *wowlan)
1882 +{
1883 +       struct ath_hw *ah = sc->sc_ah;
1884 +       struct ath9k_wow_pattern *wow_pattern = NULL;
1885 +       struct cfg80211_pkt_pattern *patterns = wowlan->patterns;
1886 +       int mask_len;
1887 +       s8 i = 0;
1888 +
1889 +       if (!wowlan->n_patterns)
1890 +               return;
1891
1892         /*
1893 -        * set and clear WOW_PME_CLEAR registers for the chip to
1894 -        * generate next wow signal.
1895 -        * disable D3 before accessing other registers ?
1896 +        * Add the new user configured patterns
1897          */
1898 +       for (i = 0; i < wowlan->n_patterns; i++) {
1899
1900 -       /* do we need to check the bit value 0x01000000 (7-10) ?? */
1901 -       REG_RMW(ah, AR_PCIE_PM_CTRL, AR_PMCTRL_WOW_PME_CLR,
1902 -               AR_PMCTRL_PWR_STATE_D1D3);
1903 +               wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
1904
1905 -       /*
1906 -        * clear all events
1907 -        */
1908 -       REG_WRITE(ah, AR_WOW_PATTERN,
1909 -                 AR_WOW_CLEAR_EVENTS(REG_READ(ah, AR_WOW_PATTERN)));
1910 +               if (!wow_pattern)
1911 +                       return;
1912
1913 -       /*
1914 -        * restore the beacon threshold to init value
1915 -        */
1916 -       REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
1917 +               /*
1918 +                * TODO: convert the generic user space pattern to
1919 +                * appropriate chip specific/802.11 pattern.
1920 +                */
1921
1922 -       /*
1923 -        * Restore the way the PCI-E reset, Power-On-Reset, external
1924 -        * PCIE_POR_SHORT pins are tied to its original value.
1925 -        * Previously just before WoW sleep, we untie the PCI-E
1926 -        * reset to our Chip's Power On Reset so that any PCI-E
1927 -        * reset from the bus will not reset our chip
1928 -        */
1929 -       if (ah->is_pciexpress)
1930 -               ath9k_hw_configpcipowersave(ah, false);
1931 +               mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8);
1932 +               memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE);
1933 +               memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE);
1934 +               memcpy(wow_pattern->pattern_bytes, patterns[i].pattern,
1935 +                      patterns[i].pattern_len);
1936 +               memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len);
1937 +               wow_pattern->pattern_len = patterns[i].pattern_len;
1938 +
1939 +               /*
1940 +                * just need to take care of deauth and disssoc pattern,
1941 +                * make sure we don't overwrite them.
1942 +                */
1943 +
1944 +               ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes,
1945 +                                          wow_pattern->mask_bytes,
1946 +                                          i + 2,
1947 +                                          wow_pattern->pattern_len);
1948 +               kfree(wow_pattern);
1949
1950 -       ah->wow_event_mask = 0;
1951 +       }
1952
1953 -       return wow_status;
1954  }
1955 -EXPORT_SYMBOL(ath9k_hw_wow_wakeup);
1956
1957 -void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable)
1958 +int ath9k_suspend(struct ieee80211_hw *hw,
1959 +                 struct cfg80211_wowlan *wowlan)
1960  {
1961 -       u32 wow_event_mask;
1962 -       u32 set, clr;
1963 +       struct ath_softc *sc = hw->priv;
1964 +       struct ath_hw *ah = sc->sc_ah;
1965 +       struct ath_common *common = ath9k_hw_common(ah);
1966 +       u32 wow_triggers_enabled = 0;
1967 +       int ret = 0;
1968
1969 -       /*
1970 -        * wow_event_mask is a mask to the AR_WOW_PATTERN register to
1971 -        * indicate which WoW events we have enabled. The WoW events
1972 -        * are from the 'pattern_enable' in this function and
1973 -        * 'pattern_count' of ath9k_hw_wow_apply_pattern()
1974 -        */
1975 -       wow_event_mask = ah->wow_event_mask;
1976 +       mutex_lock(&sc->mutex);
1977
1978 -       /*
1979 -        * Untie Power-on-Reset from the PCI-E-Reset. When we are in
1980 -        * WOW sleep, we do want the Reset from the PCI-E to disturb
1981 -        * our hw state
1982 -        */
1983 -       if (ah->is_pciexpress) {
1984 -               /*
1985 -                * we need to untie the internal POR (power-on-reset)
1986 -                * to the external PCI-E reset. We also need to tie
1987 -                * the PCI-E Phy reset to the PCI-E reset.
1988 -                */
1989 -               set = AR_WA_RESET_EN | AR_WA_POR_SHORT;
1990 -               clr = AR_WA_UNTIE_RESET_EN | AR_WA_D3_L1_DISABLE;
1991 -               REG_RMW(ah, AR_WA, set, clr);
1992 +       ath_cancel_work(sc);
1993 +       ath_stop_ani(sc);
1994 +       del_timer_sync(&sc->rx_poll_timer);
1995 +
1996 +       if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
1997 +               ath_dbg(common, ANY, "Device not present\n");
1998 +               ret = -EINVAL;
1999 +               goto fail_wow;
2000         }
2001
2002 -       /*
2003 -        * set the power states appropriately and enable PME
2004 -        */
2005 -       set = AR_PMCTRL_HOST_PME_EN | AR_PMCTRL_PWR_PM_CTRL_ENA |
2006 -             AR_PMCTRL_AUX_PWR_DET | AR_PMCTRL_WOW_PME_CLR;
2007 +       if (WARN_ON(!wowlan)) {
2008 +               ath_dbg(common, WOW, "None of the WoW triggers enabled\n");
2009 +               ret = -EINVAL;
2010 +               goto fail_wow;
2011 +       }
2012
2013 -       /*
2014 -        * set and clear WOW_PME_CLEAR registers for the chip
2015 -        * to generate next wow signal.
2016 -        */
2017 -       REG_SET_BIT(ah, AR_PCIE_PM_CTRL, set);
2018 -       clr = AR_PMCTRL_WOW_PME_CLR;
2019 -       REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, clr);
2020 +       if (!device_can_wakeup(sc->dev)) {
2021 +               ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n");
2022 +               ret = 1;
2023 +               goto fail_wow;
2024 +       }
2025
2026         /*
2027 -        * Setup for:
2028 -        *      - beacon misses
2029 -        *      - magic pattern
2030 -        *      - keep alive timeout
2031 -        *      - pattern matching
2032 +        * none of the sta vifs are associated
2033 +        * and we are not currently handling multivif
2034 +        * cases, for instance we have to seperately
2035 +        * configure 'keep alive frame' for each
2036 +        * STA.
2037          */
2038
2039 -       /*
2040 -        * Program default values for pattern backoff, aifs/slot/KAL count,
2041 -        * beacon miss timeout, KAL timeout, etc.
2042 -        */
2043 -       set = AR_WOW_BACK_OFF_SHIFT(AR_WOW_PAT_BACKOFF);
2044 -       REG_SET_BIT(ah, AR_WOW_PATTERN, set);
2045 +       if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
2046 +               ath_dbg(common, WOW, "None of the STA vifs are associated\n");
2047 +               ret = 1;
2048 +               goto fail_wow;
2049 +       }
2050 +
2051 +       if (sc->nvifs > 1) {
2052 +               ath_dbg(common, WOW, "WoW for multivif is not yet supported\n");
2053 +               ret = 1;
2054 +               goto fail_wow;
2055 +       }
2056
2057 -       set = AR_WOW_AIFS_CNT(AR_WOW_CNT_AIFS_CNT) |
2058 -             AR_WOW_SLOT_CNT(AR_WOW_CNT_SLOT_CNT) |
2059 -             AR_WOW_KEEP_ALIVE_CNT(AR_WOW_CNT_KA_CNT);
2060 -       REG_SET_BIT(ah, AR_WOW_COUNT, set);
2061 -
2062 -       if (pattern_enable & AH_WOW_BEACON_MISS)
2063 -               set = AR_WOW_BEACON_TIMO;
2064 -       /* We are not using beacon miss, program a large value */
2065 -       else
2066 -               set = AR_WOW_BEACON_TIMO_MAX;
2067 +       ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled);
2068
2069 -       REG_WRITE(ah, AR_WOW_BCN_TIMO, set);
2070 +       ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n",
2071 +               wow_triggers_enabled);
2072
2073 -       /*
2074 -        * Keep alive timo in ms except AR9280
2075 -        */
2076 -       if (!pattern_enable)
2077 -               set = AR_WOW_KEEP_ALIVE_NEVER;
2078 -       else
2079 -               set = KAL_TIMEOUT * 32;
2080 +       ath9k_ps_wakeup(sc);
2081
2082 -       REG_WRITE(ah, AR_WOW_KEEP_ALIVE_TIMO, set);
2083 +       ath9k_stop_btcoex(sc);
2084
2085         /*
2086 -        * Keep alive delay in us. based on 'power on clock',
2087 -        * therefore in usec
2088 +        * Enable wake up on recieving disassoc/deauth
2089 +        * frame by default.
2090          */
2091 -       set = KAL_DELAY * 1000;
2092 -       REG_WRITE(ah, AR_WOW_KEEP_ALIVE_DELAY, set);
2093 +       ath9k_wow_add_disassoc_deauth_pattern(sc);
2094
2095 -       /*
2096 -        * Create keep alive pattern to respond to beacons
2097 -        */
2098 -       ath9k_wow_create_keep_alive_pattern(ah);
2099 +       if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN)
2100 +               ath9k_wow_add_pattern(sc, wowlan);
2101
2102 +       spin_lock_bh(&sc->sc_pcu_lock);
2103         /*
2104 -        * Configure MAC WoW Registers
2105 +        * To avoid false wake, we enable beacon miss interrupt only
2106 +        * when we go to sleep. We save the current interrupt mask
2107 +        * so we can restore it after the system wakes up
2108          */
2109 -       set = 0;
2110 -       /* Send keep alive timeouts anyway */
2111 -       clr = AR_WOW_KEEP_ALIVE_AUTO_DIS;
2112 -
2113 -       if (pattern_enable & AH_WOW_LINK_CHANGE)
2114 -               wow_event_mask |= AR_WOW_KEEP_ALIVE_FAIL;
2115 -       else
2116 -               set = AR_WOW_KEEP_ALIVE_FAIL_DIS;
2117 +       sc->wow_intr_before_sleep = ah->imask;
2118 +       ah->imask &= ~ATH9K_INT_GLOBAL;
2119 +       ath9k_hw_disable_interrupts(ah);
2120 +       ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL;
2121 +       ath9k_hw_set_interrupts(ah);
2122 +       ath9k_hw_enable_interrupts(ah);
2123
2124 -       set = AR_WOW_KEEP_ALIVE_FAIL_DIS;
2125 -       REG_RMW(ah, AR_WOW_KEEP_ALIVE, set, clr);
2126 +       spin_unlock_bh(&sc->sc_pcu_lock);
2127
2128         /*
2129 -        * we are relying on a bmiss failure. ensure we have
2130 -        * enough threshold to prevent false positives
2131 +        * we can now sync irq and kill any running tasklets, since we already
2132 +        * disabled interrupts and not holding a spin lock
2133          */
2134 -       REG_RMW_FIELD(ah, AR_RSSI_THR, AR_RSSI_THR_BM_THR,
2135 -                     AR_WOW_BMISSTHRESHOLD);
2136 +       synchronize_irq(sc->irq);
2137 +       tasklet_kill(&sc->intr_tq);
2138 +
2139 +       ath9k_hw_wow_enable(ah, wow_triggers_enabled);
2140
2141 -       set = 0;
2142 -       clr = 0;
2143 +       ath9k_ps_restore(sc);
2144 +       ath_dbg(common, ANY, "WoW enabled in ath9k\n");
2145 +       atomic_inc(&sc->wow_sleep_proc_intr);
2146
2147 -       if (pattern_enable & AH_WOW_BEACON_MISS) {
2148 -               set = AR_WOW_BEACON_FAIL_EN;
2149 -               wow_event_mask |= AR_WOW_BEACON_FAIL;
2150 -       } else {
2151 -               clr = AR_WOW_BEACON_FAIL_EN;
2152 +fail_wow:
2153 +       mutex_unlock(&sc->mutex);
2154 +       return ret;
2155 +}
2156 +
2157 +int ath9k_resume(struct ieee80211_hw *hw)
2158 +{
2159 +       struct ath_softc *sc = hw->priv;
2160 +       struct ath_hw *ah = sc->sc_ah;
2161 +       struct ath_common *common = ath9k_hw_common(ah);
2162 +       u32 wow_status;
2163 +
2164 +       mutex_lock(&sc->mutex);
2165 +
2166 +       ath9k_ps_wakeup(sc);
2167 +
2168 +       spin_lock_bh(&sc->sc_pcu_lock);
2169 +
2170 +       ath9k_hw_disable_interrupts(ah);
2171 +       ah->imask = sc->wow_intr_before_sleep;
2172 +       ath9k_hw_set_interrupts(ah);
2173 +       ath9k_hw_enable_interrupts(ah);
2174 +
2175 +       spin_unlock_bh(&sc->sc_pcu_lock);
2176 +
2177 +       wow_status = ath9k_hw_wow_wakeup(ah);
2178 +
2179 +       if (atomic_read(&sc->wow_got_bmiss_intr) == 0) {
2180 +               /*
2181 +                * some devices may not pick beacon miss
2182 +                * as the reason they woke up so we add
2183 +                * that here for that shortcoming.
2184 +                */
2185 +               wow_status |= AH_WOW_BEACON_MISS;
2186 +               atomic_dec(&sc->wow_got_bmiss_intr);
2187 +               ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n");
2188         }
2189
2190 -       REG_RMW(ah, AR_WOW_BCN_EN, set, clr);
2191 +       atomic_dec(&sc->wow_sleep_proc_intr);
2192
2193 -       set = 0;
2194 -       clr = 0;
2195 -       /*
2196 -        * Enable the magic packet registers
2197 -        */
2198 -       if (pattern_enable & AH_WOW_MAGIC_PATTERN_EN) {
2199 -               set = AR_WOW_MAGIC_EN;
2200 -               wow_event_mask |= AR_WOW_MAGIC_PAT_FOUND;
2201 -       } else {
2202 -               clr = AR_WOW_MAGIC_EN;
2203 +       if (wow_status) {
2204 +               ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n",
2205 +                       ath9k_hw_wow_event_to_string(wow_status), wow_status);
2206         }
2207 -       set |= AR_WOW_MAC_INTR_EN;
2208 -       REG_RMW(ah, AR_WOW_PATTERN, set, clr);
2209
2210 -       REG_WRITE(ah, AR_WOW_PATTERN_MATCH_LT_256B,
2211 -                 AR_WOW_PATTERN_SUPPORTED);
2212 +       ath_restart_work(sc);
2213 +       ath9k_start_btcoex(sc);
2214
2215 -       /*
2216 -        * Set the power states appropriately and enable PME
2217 -        */
2218 -       clr = 0;
2219 -       set = AR_PMCTRL_PWR_STATE_D1D3 | AR_PMCTRL_HOST_PME_EN |
2220 -             AR_PMCTRL_PWR_PM_CTRL_ENA;
2221 +       ath9k_ps_restore(sc);
2222 +       mutex_unlock(&sc->mutex);
2223
2224 -       clr = AR_PCIE_PM_CTRL_ENA;
2225 -       REG_RMW(ah, AR_PCIE_PM_CTRL, set, clr);
2226 +       return 0;
2227 +}
2228
2229 -       /*
2230 -        * this is needed to prevent the chip waking up
2231 -        * the host within 3-4 seconds with certain
2232 -        * platform/BIOS. The fix is to enable
2233 -        * D1 & D3 to match original definition and
2234 -        * also match the OTP value. Anyway this
2235 -        * is more related to SW WOW.
2236 -        */
2237 -       clr = AR_PMCTRL_PWR_STATE_D1D3;
2238 -       REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, clr);
2239 +void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
2240 +{
2241 +       struct ath_softc *sc = hw->priv;
2242
2243 -       set = AR_PMCTRL_PWR_STATE_D1D3_REAL;
2244 -       REG_SET_BIT(ah, AR_PCIE_PM_CTRL, set);
2245 +       mutex_lock(&sc->mutex);
2246 +       device_init_wakeup(sc->dev, 1);
2247 +       device_set_wakeup_enable(sc->dev, enabled);
2248 +       mutex_unlock(&sc->mutex);
2249 +}
2250
2251 -       REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PRESERVE_SEQNUM);
2252 +void ath9k_init_wow(struct ieee80211_hw *hw)
2253 +{
2254 +       struct ath_softc *sc = hw->priv;
2255
2256 -       /* to bring down WOW power low margin */
2257 -       set = BIT(13);
2258 -       REG_SET_BIT(ah, AR_PCIE_PHY_REG3, set);
2259 -       /* HW WoW */
2260 -       clr = BIT(5);
2261 -       REG_CLR_BIT(ah, AR_PCU_MISC_MODE3, clr);
2262 +       if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_WOW_DEVICE_CAPABLE) &&
2263 +           (sc->driver_data & ATH9K_PCI_WOW) &&
2264 +           device_can_wakeup(sc->dev))
2265 +               hw->wiphy->wowlan = &ath9k_wowlan_support;
2266
2267 -       ath9k_hw_set_powermode_wow_sleep(ah);
2268 -       ah->wow_event_mask = wow_event_mask;
2269 +       atomic_set(&sc->wow_sleep_proc_intr, -1);
2270 +       atomic_set(&sc->wow_got_bmiss_intr, -1);
2271  }
2272 -EXPORT_SYMBOL(ath9k_hw_wow_enable);
2273 --- a/drivers/net/wireless/ath/ath9k/xmit.c
2274 +++ b/drivers/net/wireless/ath/ath9k/xmit.c
2275 @@ -1276,6 +1276,10 @@ static void ath_tx_fill_desc(struct ath_
2276                                 if (!rts_thresh || (len > rts_thresh))
2277                                         rts = true;
2278                         }
2279 +
2280 +                       if (!aggr)
2281 +                               len = fi->framelen;
2282 +
2283                         ath_buf_set_rate(sc, bf, &info, len, rts);
2284                 }
2285
2286 @@ -1786,6 +1790,9 @@ bool ath_drain_all_txq(struct ath_softc
2287                 if (!ATH_TXQ_SETUP(sc, i))
2288                         continue;
2289
2290 +               if (!sc->tx.txq[i].axq_depth)
2291 +                       continue;
2292 +
2293                 if (ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum))
2294                         npend |= BIT(i);
2295         }
2296 @@ -2749,6 +2756,8 @@ void ath_tx_node_cleanup(struct ath_soft
2297         }
2298  }
2299
2300 +#ifdef CONFIG_ATH9K_TX99
2301 +
2302  int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
2303                     struct ath_tx_control *txctl)
2304  {
2305 @@ -2791,3 +2800,5 @@ int ath9k_tx99_send(struct ath_softc *sc
2306
2307         return 0;
2308  }
2309 +
2310 +#endif /* CONFIG_ATH9K_TX99 */
2311 --- a/drivers/net/wireless/ath/regd.c
2312 +++ b/drivers/net/wireless/ath/regd.c
2313 @@ -37,17 +37,17 @@ static int __ath_regd_init(struct ath_re
2314
2315  /* We enable active scan on these a case by case basis by regulatory domain */
2316  #define ATH9K_2GHZ_CH12_13     REG_RULE(2467-10, 2472+10, 40, 0, 20,\
2317 -                                       NL80211_RRF_PASSIVE_SCAN)
2318 +                                       NL80211_RRF_NO_IR)
2319  #define ATH9K_2GHZ_CH14                REG_RULE(2484-10, 2484+10, 40, 0, 20,\
2320 -                               NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_OFDM)
2321 +                               NL80211_RRF_NO_IR | NL80211_RRF_NO_OFDM)
2322
2323  /* We allow IBSS on these on a case by case basis by regulatory domain */
2324  #define ATH9K_5GHZ_5150_5350   REG_RULE(5150-10, 5350+10, 80, 0, 30,\
2325 -                               NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS)
2326 +                               NL80211_RRF_NO_IR)
2327  #define ATH9K_5GHZ_5470_5850   REG_RULE(5470-10, 5850+10, 80, 0, 30,\
2328 -                               NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS)
2329 +                               NL80211_RRF_NO_IR)
2330  #define ATH9K_5GHZ_5725_5850   REG_RULE(5725-10, 5850+10, 80, 0, 30,\
2331 -                               NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS)
2332 +                               NL80211_RRF_NO_IR)
2333
2334  #define ATH9K_2GHZ_ALL         ATH9K_2GHZ_CH01_11, \
2335                                 ATH9K_2GHZ_CH12_13, \
2336 @@ -224,17 +224,16 @@ ath_reg_apply_beaconing_flags(struct wip
2337                                  * regulatory_hint().
2338                                  */
2339                                 if (!(reg_rule->flags &
2340 -                                   NL80211_RRF_NO_IBSS))
2341 +                                   NL80211_RRF_NO_IR))
2342                                         ch->flags &=
2343 -                                         ~IEEE80211_CHAN_NO_IBSS;
2344 +                                         ~IEEE80211_CHAN_NO_IR;
2345                                 if (!(reg_rule->flags &
2346 -                                   NL80211_RRF_PASSIVE_SCAN))
2347 +                                   NL80211_RRF_NO_IR))
2348                                         ch->flags &=
2349 -                                         ~IEEE80211_CHAN_PASSIVE_SCAN;
2350 +                                         ~IEEE80211_CHAN_NO_IR;
2351                         } else {
2352                                 if (ch->beacon_found)
2353 -                                       ch->flags &= ~(IEEE80211_CHAN_NO_IBSS |
2354 -                                         IEEE80211_CHAN_PASSIVE_SCAN);
2355 +                                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
2356                         }
2357                 }
2358         }
2359 @@ -260,11 +259,11 @@ ath_reg_apply_active_scan_flags(struct w
2360          */
2361         if (initiator != NL80211_REGDOM_SET_BY_COUNTRY_IE) {
2362                 ch = &sband->channels[11]; /* CH 12 */
2363 -               if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
2364 -                       ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
2365 +               if (ch->flags & IEEE80211_CHAN_NO_IR)
2366 +                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
2367                 ch = &sband->channels[12]; /* CH 13 */
2368 -               if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
2369 -                       ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
2370 +               if (ch->flags & IEEE80211_CHAN_NO_IR)
2371 +                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
2372                 return;
2373         }
2374
2375 @@ -278,17 +277,17 @@ ath_reg_apply_active_scan_flags(struct w
2376         ch = &sband->channels[11]; /* CH 12 */
2377         reg_rule = freq_reg_info(wiphy, ch->center_freq);
2378         if (!IS_ERR(reg_rule)) {
2379 -               if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
2380 -                       if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
2381 -                               ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
2382 +               if (!(reg_rule->flags & NL80211_RRF_NO_IR))
2383 +                       if (ch->flags & IEEE80211_CHAN_NO_IR)
2384 +                               ch->flags &= ~IEEE80211_CHAN_NO_IR;
2385         }
2386
2387         ch = &sband->channels[12]; /* CH 13 */
2388         reg_rule = freq_reg_info(wiphy, ch->center_freq);
2389         if (!IS_ERR(reg_rule)) {
2390 -               if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
2391 -                       if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
2392 -                               ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
2393 +               if (!(reg_rule->flags & NL80211_RRF_NO_IR))
2394 +                       if (ch->flags & IEEE80211_CHAN_NO_IR)
2395 +                               ch->flags &= ~IEEE80211_CHAN_NO_IR;
2396         }
2397  }
2398
2399 @@ -320,8 +319,8 @@ static void ath_reg_apply_radar_flags(st
2400                  */
2401                 if (!(ch->flags & IEEE80211_CHAN_DISABLED))
2402                         ch->flags |= IEEE80211_CHAN_RADAR |
2403 -                                    IEEE80211_CHAN_NO_IBSS |
2404 -                                    IEEE80211_CHAN_PASSIVE_SCAN;
2405 +                                    IEEE80211_CHAN_NO_IR |
2406 +                                    IEEE80211_CHAN_NO_IR;
2407         }
2408  }
2409
2410 --- a/drivers/net/wireless/brcm80211/brcmfmac/p2p.c
2411 +++ b/drivers/net/wireless/brcm80211/brcmfmac/p2p.c
2412 @@ -812,7 +812,7 @@ static s32 brcmf_p2p_run_escan(struct br
2413                         struct ieee80211_channel *chan = request->channels[i];
2414
2415                         if (chan->flags & (IEEE80211_CHAN_RADAR |
2416 -                                          IEEE80211_CHAN_PASSIVE_SCAN))
2417 +                                          IEEE80211_CHAN_NO_IR))
2418                                 continue;
2419
2420                         chanspecs[i] = channel_to_chanspec(&p2p->cfg->d11inf,
2421 --- a/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c
2422 +++ b/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c
2423 @@ -202,9 +202,9 @@ static struct ieee80211_supported_band _
2424
2425  /* This is to override regulatory domains defined in cfg80211 module (reg.c)
2426   * By default world regulatory domain defined in reg.c puts the flags
2427 - * NL80211_RRF_PASSIVE_SCAN and NL80211_RRF_NO_IBSS for 5GHz channels (for
2428 - * 36..48 and 149..165). With respect to these flags, wpa_supplicant doesn't
2429 - * start p2p operations on 5GHz channels. All the changes in world regulatory
2430 + * NL80211_RRF_NO_IR for 5GHz channels (for * 36..48 and 149..165).
2431 + * With respect to these flags, wpa_supplicant doesn't * start p2p
2432 + * operations on 5GHz channels. All the changes in world regulatory
2433   * domain are to be done here.
2434   */
2435  static const struct ieee80211_regdomain brcmf_regdom = {
2436 @@ -5197,10 +5197,10 @@ static s32 brcmf_construct_reginfo(struc
2437                                         if (channel & WL_CHAN_RADAR)
2438                                                 band_chan_arr[index].flags |=
2439                                                         (IEEE80211_CHAN_RADAR |
2440 -                                                       IEEE80211_CHAN_NO_IBSS);
2441 +                                                       IEEE80211_CHAN_NO_IR);
2442                                         if (channel & WL_CHAN_PASSIVE)
2443                                                 band_chan_arr[index].flags |=
2444 -                                                   IEEE80211_CHAN_PASSIVE_SCAN;
2445 +                                                   IEEE80211_CHAN_NO_IR;
2446                                 }
2447                         }
2448                         if (!update)
2449 --- a/drivers/net/wireless/brcm80211/brcmsmac/channel.c
2450 +++ b/drivers/net/wireless/brcm80211/brcmsmac/channel.c
2451 @@ -59,23 +59,20 @@
2452
2453  #define BRCM_2GHZ_2412_2462    REG_RULE(2412-10, 2462+10, 40, 0, 19, 0)
2454  #define BRCM_2GHZ_2467_2472    REG_RULE(2467-10, 2472+10, 20, 0, 19, \
2455 -                                        NL80211_RRF_PASSIVE_SCAN | \
2456 -                                        NL80211_RRF_NO_IBSS)
2457 +                                        NL80211_RRF_NO_IR)
2458
2459  #define BRCM_5GHZ_5180_5240    REG_RULE(5180-10, 5240+10, 40, 0, 21, \
2460 -                                        NL80211_RRF_PASSIVE_SCAN | \
2461 -                                        NL80211_RRF_NO_IBSS)
2462 +                                        NL80211_RRF_NO_IR)
2463  #define BRCM_5GHZ_5260_5320    REG_RULE(5260-10, 5320+10, 40, 0, 21, \
2464 -                                        NL80211_RRF_PASSIVE_SCAN | \
2465 +                                        NL80211_RRF_NO_IR | \
2466                                          NL80211_RRF_DFS | \
2467 -                                        NL80211_RRF_NO_IBSS)
2468 +                                        NL80211_RRF_NO_IR)
2469  #define BRCM_5GHZ_5500_5700    REG_RULE(5500-10, 5700+10, 40, 0, 21, \
2470 -                                        NL80211_RRF_PASSIVE_SCAN | \
2471 +                                        NL80211_RRF_NO_IR | \
2472                                          NL80211_RRF_DFS | \
2473 -                                        NL80211_RRF_NO_IBSS)
2474 +                                        NL80211_RRF_NO_IR)
2475  #define BRCM_5GHZ_5745_5825    REG_RULE(5745-10, 5825+10, 40, 0, 21, \
2476 -                                        NL80211_RRF_PASSIVE_SCAN | \
2477 -                                        NL80211_RRF_NO_IBSS)
2478 +                                        NL80211_RRF_NO_IR)
2479
2480  static const struct ieee80211_regdomain brcms_regdom_x2 = {
2481         .n_reg_rules = 6,
2482 @@ -395,7 +392,7 @@ brcms_c_channel_set_chanspec(struct brcm
2483                 brcms_c_set_gmode(wlc, wlc->protection->gmode_user, false);
2484
2485         brcms_b_set_chanspec(wlc->hw, chanspec,
2486 -                             !!(ch->flags & IEEE80211_CHAN_PASSIVE_SCAN),
2487 +                             !!(ch->flags & IEEE80211_CHAN_NO_IR),
2488                               &txpwr);
2489  }
2490
2491 @@ -657,8 +654,8 @@ static void brcms_reg_apply_radar_flags(
2492                  */
2493                 if (!(ch->flags & IEEE80211_CHAN_DISABLED))
2494                         ch->flags |= IEEE80211_CHAN_RADAR |
2495 -                                    IEEE80211_CHAN_NO_IBSS |
2496 -                                    IEEE80211_CHAN_PASSIVE_SCAN;
2497 +                                    IEEE80211_CHAN_NO_IR |
2498 +                                    IEEE80211_CHAN_NO_IR;
2499         }
2500  }
2501
2502 @@ -688,14 +685,13 @@ brcms_reg_apply_beaconing_flags(struct w
2503                                 if (IS_ERR(rule))
2504                                         continue;
2505
2506 -                               if (!(rule->flags & NL80211_RRF_NO_IBSS))
2507 -                                       ch->flags &= ~IEEE80211_CHAN_NO_IBSS;
2508 -                               if (!(rule->flags & NL80211_RRF_PASSIVE_SCAN))
2509 +                               if (!(rule->flags & NL80211_RRF_NO_IR))
2510 +                                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
2511 +                               if (!(rule->flags & NL80211_RRF_NO_IR))
2512                                         ch->flags &=
2513 -                                               ~IEEE80211_CHAN_PASSIVE_SCAN;
2514 +                                               ~IEEE80211_CHAN_NO_IR;
2515                         } else if (ch->beacon_found) {
2516 -                               ch->flags &= ~(IEEE80211_CHAN_NO_IBSS |
2517 -                                              IEEE80211_CHAN_PASSIVE_SCAN);
2518 +                               ch->flags &= ~IEEE80211_CHAN_NO_IR;
2519                         }
2520                 }
2521         }
2522 --- a/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
2523 +++ b/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
2524 @@ -125,13 +125,13 @@ static struct ieee80211_channel brcms_2g
2525         CHAN2GHZ(10, 2457, IEEE80211_CHAN_NO_HT40PLUS),
2526         CHAN2GHZ(11, 2462, IEEE80211_CHAN_NO_HT40PLUS),
2527         CHAN2GHZ(12, 2467,
2528 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS |
2529 +                IEEE80211_CHAN_NO_IR |
2530                  IEEE80211_CHAN_NO_HT40PLUS),
2531         CHAN2GHZ(13, 2472,
2532 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS |
2533 +                IEEE80211_CHAN_NO_IR |
2534                  IEEE80211_CHAN_NO_HT40PLUS),
2535         CHAN2GHZ(14, 2484,
2536 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS |
2537 +                IEEE80211_CHAN_NO_IR |
2538                  IEEE80211_CHAN_NO_HT40PLUS | IEEE80211_CHAN_NO_HT40MINUS |
2539                  IEEE80211_CHAN_NO_OFDM)
2540  };
2541 @@ -144,51 +144,51 @@ static struct ieee80211_channel brcms_5g
2542         CHAN5GHZ(48, IEEE80211_CHAN_NO_HT40PLUS),
2543         /* UNII-2 */
2544         CHAN5GHZ(52,
2545 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2546 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
2547 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2548 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
2549         CHAN5GHZ(56,
2550 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2551 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
2552 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2553 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
2554         CHAN5GHZ(60,
2555 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2556 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
2557 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2558 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
2559         CHAN5GHZ(64,
2560 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2561 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
2562 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2563 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
2564         /* MID */
2565         CHAN5GHZ(100,
2566 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2567 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
2568 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2569 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
2570         CHAN5GHZ(104,
2571 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2572 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
2573 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2574 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
2575         CHAN5GHZ(108,
2576 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2577 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
2578 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2579 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
2580         CHAN5GHZ(112,
2581 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2582 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
2583 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2584 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
2585         CHAN5GHZ(116,
2586 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2587 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
2588 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2589 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
2590         CHAN5GHZ(120,
2591 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2592 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
2593 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2594 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
2595         CHAN5GHZ(124,
2596 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2597 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
2598 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2599 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
2600         CHAN5GHZ(128,
2601 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2602 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
2603 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2604 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
2605         CHAN5GHZ(132,
2606 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2607 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
2608 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2609 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
2610         CHAN5GHZ(136,
2611 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2612 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
2613 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2614 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
2615         CHAN5GHZ(140,
2616 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
2617 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS |
2618 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
2619 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS |
2620                  IEEE80211_CHAN_NO_HT40MINUS),
2621         /* UNII-3 */
2622         CHAN5GHZ(149, IEEE80211_CHAN_NO_HT40MINUS),
2623 --- a/drivers/net/wireless/cw1200/scan.c
2624 +++ b/drivers/net/wireless/cw1200/scan.c
2625 @@ -197,9 +197,9 @@ void cw1200_scan_work(struct work_struct
2626                         if ((*it)->band != first->band)
2627                                 break;
2628                         if (((*it)->flags ^ first->flags) &
2629 -                                       IEEE80211_CHAN_PASSIVE_SCAN)
2630 +                                       IEEE80211_CHAN_NO_IR)
2631                                 break;
2632 -                       if (!(first->flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
2633 +                       if (!(first->flags & IEEE80211_CHAN_NO_IR) &&
2634                             (*it)->max_power != first->max_power)
2635                                 break;
2636                 }
2637 @@ -210,7 +210,7 @@ void cw1200_scan_work(struct work_struct
2638                 else
2639                         scan.max_tx_rate = WSM_TRANSMIT_RATE_1;
2640                 scan.num_probes =
2641 -                       (first->flags & IEEE80211_CHAN_PASSIVE_SCAN) ? 0 : 2;
2642 +                       (first->flags & IEEE80211_CHAN_NO_IR) ? 0 : 2;
2643                 scan.num_ssids = priv->scan.n_ssids;
2644                 scan.ssids = &priv->scan.ssids[0];
2645                 scan.num_channels = it - priv->scan.curr;
2646 @@ -233,7 +233,7 @@ void cw1200_scan_work(struct work_struct
2647                 }
2648                 for (i = 0; i < scan.num_channels; ++i) {
2649                         scan.ch[i].number = priv->scan.curr[i]->hw_value;
2650 -                       if (priv->scan.curr[i]->flags & IEEE80211_CHAN_PASSIVE_SCAN) {
2651 +                       if (priv->scan.curr[i]->flags & IEEE80211_CHAN_NO_IR) {
2652                                 scan.ch[i].min_chan_time = 50;
2653                                 scan.ch[i].max_chan_time = 100;
2654                         } else {
2655 @@ -241,7 +241,7 @@ void cw1200_scan_work(struct work_struct
2656                                 scan.ch[i].max_chan_time = 25;
2657                         }
2658                 }
2659 -               if (!(first->flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
2660 +               if (!(first->flags & IEEE80211_CHAN_NO_IR) &&
2661                     priv->scan.output_power != first->max_power) {
2662                         priv->scan.output_power = first->max_power;
2663                         wsm_set_output_power(priv,
2664 --- a/drivers/net/wireless/ipw2x00/ipw2100.c
2665 +++ b/drivers/net/wireless/ipw2x00/ipw2100.c
2666 @@ -1934,10 +1934,10 @@ static int ipw2100_wdev_init(struct net_
2667                         bg_band->channels[i].max_power = geo->bg[i].max_power;
2668                         if (geo->bg[i].flags & LIBIPW_CH_PASSIVE_ONLY)
2669                                 bg_band->channels[i].flags |=
2670 -                                       IEEE80211_CHAN_PASSIVE_SCAN;
2671 +                                       IEEE80211_CHAN_NO_IR;
2672                         if (geo->bg[i].flags & LIBIPW_CH_NO_IBSS)
2673                                 bg_band->channels[i].flags |=
2674 -                                       IEEE80211_CHAN_NO_IBSS;
2675 +                                       IEEE80211_CHAN_NO_IR;
2676                         if (geo->bg[i].flags & LIBIPW_CH_RADAR_DETECT)
2677                                 bg_band->channels[i].flags |=
2678                                         IEEE80211_CHAN_RADAR;
2679 --- a/drivers/net/wireless/ipw2x00/ipw2200.c
2680 +++ b/drivers/net/wireless/ipw2x00/ipw2200.c
2681 @@ -11472,10 +11472,10 @@ static int ipw_wdev_init(struct net_devi
2682                         bg_band->channels[i].max_power = geo->bg[i].max_power;
2683                         if (geo->bg[i].flags & LIBIPW_CH_PASSIVE_ONLY)
2684                                 bg_band->channels[i].flags |=
2685 -                                       IEEE80211_CHAN_PASSIVE_SCAN;
2686 +                                       IEEE80211_CHAN_NO_IR;
2687                         if (geo->bg[i].flags & LIBIPW_CH_NO_IBSS)
2688                                 bg_band->channels[i].flags |=
2689 -                                       IEEE80211_CHAN_NO_IBSS;
2690 +                                       IEEE80211_CHAN_NO_IR;
2691                         if (geo->bg[i].flags & LIBIPW_CH_RADAR_DETECT)
2692                                 bg_band->channels[i].flags |=
2693                                         IEEE80211_CHAN_RADAR;
2694 @@ -11511,10 +11511,10 @@ static int ipw_wdev_init(struct net_devi
2695                         a_band->channels[i].max_power = geo->a[i].max_power;
2696                         if (geo->a[i].flags & LIBIPW_CH_PASSIVE_ONLY)
2697                                 a_band->channels[i].flags |=
2698 -                                       IEEE80211_CHAN_PASSIVE_SCAN;
2699 +                                       IEEE80211_CHAN_NO_IR;
2700                         if (geo->a[i].flags & LIBIPW_CH_NO_IBSS)
2701                                 a_band->channels[i].flags |=
2702 -                                       IEEE80211_CHAN_NO_IBSS;
2703 +                                       IEEE80211_CHAN_NO_IR;
2704                         if (geo->a[i].flags & LIBIPW_CH_RADAR_DETECT)
2705                                 a_band->channels[i].flags |=
2706                                         IEEE80211_CHAN_RADAR;
2707 --- a/drivers/net/wireless/iwlegacy/3945-mac.c
2708 +++ b/drivers/net/wireless/iwlegacy/3945-mac.c
2709 @@ -1595,7 +1595,7 @@ il3945_get_channels_for_scan(struct il_p
2710                  *  and use long active_dwell time.
2711                  */
2712                 if (!is_active || il_is_channel_passive(ch_info) ||
2713 -                   (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
2714 +                   (chan->flags & IEEE80211_CHAN_NO_IR)) {
2715                         scan_ch->type = 0;      /* passive */
2716                         if (IL_UCODE_API(il->ucode_ver) == 1)
2717                                 scan_ch->active_dwell =
2718 --- a/drivers/net/wireless/iwlegacy/4965-mac.c
2719 +++ b/drivers/net/wireless/iwlegacy/4965-mac.c
2720 @@ -805,7 +805,7 @@ il4965_get_channels_for_scan(struct il_p
2721                 }
2722
2723                 if (!is_active || il_is_channel_passive(ch_info) ||
2724 -                   (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
2725 +                   (chan->flags & IEEE80211_CHAN_NO_IR))
2726                         scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
2727                 else
2728                         scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
2729 --- a/drivers/net/wireless/iwlegacy/common.c
2730 +++ b/drivers/net/wireless/iwlegacy/common.c
2731 @@ -3447,10 +3447,10 @@ il_init_geos(struct il_priv *il)
2732
2733                 if (il_is_channel_valid(ch)) {
2734                         if (!(ch->flags & EEPROM_CHANNEL_IBSS))
2735 -                               geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
2736 +                               geo_ch->flags |= IEEE80211_CHAN_NO_IR;
2737
2738                         if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
2739 -                               geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
2740 +                               geo_ch->flags |= IEEE80211_CHAN_NO_IR;
2741
2742                         if (ch->flags & EEPROM_CHANNEL_RADAR)
2743                                 geo_ch->flags |= IEEE80211_CHAN_RADAR;
2744 --- a/drivers/net/wireless/iwlegacy/debug.c
2745 +++ b/drivers/net/wireless/iwlegacy/debug.c
2746 @@ -567,12 +567,12 @@ il_dbgfs_channels_read(struct file *file
2747                                       flags & IEEE80211_CHAN_RADAR ?
2748                                       " (IEEE 802.11h required)" : "",
2749                                       ((channels[i].
2750 -                                       flags & IEEE80211_CHAN_NO_IBSS) ||
2751 +                                       flags & IEEE80211_CHAN_NO_IR) ||
2752                                        (channels[i].
2753                                         flags & IEEE80211_CHAN_RADAR)) ? "" :
2754                                       ", IBSS",
2755                                       channels[i].
2756 -                                     flags & IEEE80211_CHAN_PASSIVE_SCAN ?
2757 +                                     flags & IEEE80211_CHAN_NO_IR ?
2758                                       "passive only" : "active/passive");
2759         }
2760         supp_band = il_get_hw_mode(il, IEEE80211_BAND_5GHZ);
2761 @@ -594,12 +594,12 @@ il_dbgfs_channels_read(struct file *file
2762                                       flags & IEEE80211_CHAN_RADAR ?
2763                                       " (IEEE 802.11h required)" : "",
2764                                       ((channels[i].
2765 -                                       flags & IEEE80211_CHAN_NO_IBSS) ||
2766 +                                       flags & IEEE80211_CHAN_NO_IR) ||
2767                                        (channels[i].
2768                                         flags & IEEE80211_CHAN_RADAR)) ? "" :
2769                                       ", IBSS",
2770                                       channels[i].
2771 -                                     flags & IEEE80211_CHAN_PASSIVE_SCAN ?
2772 +                                     flags & IEEE80211_CHAN_NO_IR ?
2773                                       "passive only" : "active/passive");
2774         }
2775         ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
2776 --- a/drivers/net/wireless/iwlwifi/dvm/debugfs.c
2777 +++ b/drivers/net/wireless/iwlwifi/dvm/debugfs.c
2778 @@ -352,12 +352,12 @@ static ssize_t iwl_dbgfs_channels_read(s
2779                                         channels[i].max_power,
2780                                         channels[i].flags & IEEE80211_CHAN_RADAR ?
2781                                         " (IEEE 802.11h required)" : "",
2782 -                                       ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
2783 +                                       ((channels[i].flags & IEEE80211_CHAN_NO_IR)
2784                                         || (channels[i].flags &
2785                                         IEEE80211_CHAN_RADAR)) ? "" :
2786                                         ", IBSS",
2787                                         channels[i].flags &
2788 -                                       IEEE80211_CHAN_PASSIVE_SCAN ?
2789 +                                       IEEE80211_CHAN_NO_IR ?
2790                                         "passive only" : "active/passive");
2791         }
2792         supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
2793 @@ -375,12 +375,12 @@ static ssize_t iwl_dbgfs_channels_read(s
2794                                         channels[i].max_power,
2795                                         channels[i].flags & IEEE80211_CHAN_RADAR ?
2796                                         " (IEEE 802.11h required)" : "",
2797 -                                       ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
2798 +                                       ((channels[i].flags & IEEE80211_CHAN_NO_IR)
2799                                         || (channels[i].flags &
2800                                         IEEE80211_CHAN_RADAR)) ? "" :
2801                                         ", IBSS",
2802                                         channels[i].flags &
2803 -                                       IEEE80211_CHAN_PASSIVE_SCAN ?
2804 +                                       IEEE80211_CHAN_NO_IR ?
2805                                         "passive only" : "active/passive");
2806         }
2807         ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
2808 --- a/drivers/net/wireless/iwlwifi/dvm/scan.c
2809 +++ b/drivers/net/wireless/iwlwifi/dvm/scan.c
2810 @@ -544,7 +544,7 @@ static int iwl_get_channels_for_scan(str
2811                 channel = chan->hw_value;
2812                 scan_ch->channel = cpu_to_le16(channel);
2813
2814 -               if (!is_active || (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
2815 +               if (!is_active || (chan->flags & IEEE80211_CHAN_NO_IR))
2816                         scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
2817                 else
2818                         scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
2819 --- a/drivers/net/wireless/iwlwifi/iwl-eeprom-parse.c
2820 +++ b/drivers/net/wireless/iwlwifi/iwl-eeprom-parse.c
2821 @@ -614,10 +614,10 @@ static int iwl_init_channel_map(struct d
2822                         channel->flags = IEEE80211_CHAN_NO_HT40;
2823
2824                         if (!(eeprom_ch->flags & EEPROM_CHANNEL_IBSS))
2825 -                               channel->flags |= IEEE80211_CHAN_NO_IBSS;
2826 +                               channel->flags |= IEEE80211_CHAN_NO_IR;
2827
2828                         if (!(eeprom_ch->flags & EEPROM_CHANNEL_ACTIVE))
2829 -                               channel->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
2830 +                               channel->flags |= IEEE80211_CHAN_NO_IR;
2831
2832                         if (eeprom_ch->flags & EEPROM_CHANNEL_RADAR)
2833                                 channel->flags |= IEEE80211_CHAN_RADAR;
2834 --- a/drivers/net/wireless/iwlwifi/iwl-nvm-parse.c
2835 +++ b/drivers/net/wireless/iwlwifi/iwl-nvm-parse.c
2836 @@ -223,10 +223,10 @@ static int iwl_init_channel_map(struct d
2837                         channel->flags |= IEEE80211_CHAN_NO_160MHZ;
2838
2839                 if (!(ch_flags & NVM_CHANNEL_IBSS))
2840 -                       channel->flags |= IEEE80211_CHAN_NO_IBSS;
2841 +                       channel->flags |= IEEE80211_CHAN_NO_IR;
2842
2843                 if (!(ch_flags & NVM_CHANNEL_ACTIVE))
2844 -                       channel->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
2845 +                       channel->flags |= IEEE80211_CHAN_NO_IR;
2846
2847                 if (ch_flags & NVM_CHANNEL_RADAR)
2848                         channel->flags |= IEEE80211_CHAN_RADAR;
2849 --- a/drivers/net/wireless/iwlwifi/mvm/scan.c
2850 +++ b/drivers/net/wireless/iwlwifi/mvm/scan.c
2851 @@ -192,7 +192,7 @@ static void iwl_mvm_scan_fill_channels(s
2852         for (i = 0; i < cmd->channel_count; i++) {
2853                 chan->channel = cpu_to_le16(req->channels[i]->hw_value);
2854                 chan->type = cpu_to_le32(type);
2855 -               if (req->channels[i]->flags & IEEE80211_CHAN_PASSIVE_SCAN)
2856 +               if (req->channels[i]->flags & IEEE80211_CHAN_NO_IR)
2857                         chan->type &= cpu_to_le32(~SCAN_CHANNEL_TYPE_ACTIVE);
2858                 chan->active_dwell = cpu_to_le16(active_dwell);
2859                 chan->passive_dwell = cpu_to_le16(passive_dwell);
2860 @@ -642,7 +642,7 @@ static void iwl_build_channel_cfg(struct
2861                 channels->iter_count[index] = cpu_to_le16(1);
2862                 channels->iter_interval[index] = 0;
2863
2864 -               if (!(s_band->channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
2865 +               if (!(s_band->channels[i].flags & IEEE80211_CHAN_NO_IR))
2866                         channels->type[index] |=
2867                                 cpu_to_le32(IWL_SCAN_OFFLOAD_CHANNEL_ACTIVE);
2868
2869 --- a/drivers/net/wireless/mac80211_hwsim.c
2870 +++ b/drivers/net/wireless/mac80211_hwsim.c
2871 @@ -159,7 +159,7 @@ static const struct ieee80211_regdomain
2872         .reg_rules = {
2873                 REG_RULE(2412-10, 2462+10, 40, 0, 20, 0),
2874                 REG_RULE(5725-10, 5850+10, 40, 0, 30,
2875 -                       NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS),
2876 +                        NL80211_RRF_NO_IR),
2877         }
2878  };
2879
2880 @@ -1485,7 +1485,7 @@ static void hw_scan_work(struct work_str
2881                     req->channels[hwsim->scan_chan_idx]->center_freq);
2882
2883         hwsim->tmp_chan = req->channels[hwsim->scan_chan_idx];
2884 -       if (hwsim->tmp_chan->flags & IEEE80211_CHAN_PASSIVE_SCAN ||
2885 +       if (hwsim->tmp_chan->flags & IEEE80211_CHAN_NO_IR ||
2886             !req->n_ssids) {
2887                 dwell = 120;
2888         } else {
2889 --- a/drivers/net/wireless/mwifiex/cfg80211.c
2890 +++ b/drivers/net/wireless/mwifiex/cfg80211.c
2891 @@ -50,24 +50,24 @@ static const struct ieee80211_regdomain
2892                 REG_RULE(2412-10, 2462+10, 40, 3, 20, 0),
2893                 /* Channel 12 - 13 */
2894                 REG_RULE(2467-10, 2472+10, 20, 3, 20,
2895 -                        NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS),
2896 +                        NL80211_RRF_NO_IR),
2897                 /* Channel 14 */
2898                 REG_RULE(2484-10, 2484+10, 20, 3, 20,
2899 -                        NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS |
2900 +                        NL80211_RRF_NO_IR |
2901                          NL80211_RRF_NO_OFDM),
2902                 /* Channel 36 - 48 */
2903                 REG_RULE(5180-10, 5240+10, 40, 3, 20,
2904 -                        NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS),
2905 +                        NL80211_RRF_NO_IR),
2906                 /* Channel 149 - 165 */
2907                 REG_RULE(5745-10, 5825+10, 40, 3, 20,
2908 -                        NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS),
2909 +                        NL80211_RRF_NO_IR),
2910                 /* Channel 52 - 64 */
2911                 REG_RULE(5260-10, 5320+10, 40, 3, 30,
2912 -                        NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS |
2913 +                        NL80211_RRF_NO_IR |
2914                          NL80211_RRF_DFS),
2915                 /* Channel 100 - 140 */
2916                 REG_RULE(5500-10, 5700+10, 40, 3, 30,
2917 -                        NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS |
2918 +                        NL80211_RRF_NO_IR |
2919                          NL80211_RRF_DFS),
2920         }
2921  };
2922 @@ -1968,7 +1968,7 @@ mwifiex_cfg80211_scan(struct wiphy *wiph
2923                 user_scan_cfg->chan_list[i].chan_number = chan->hw_value;
2924                 user_scan_cfg->chan_list[i].radio_type = chan->band;
2925
2926 -               if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)
2927 +               if (chan->flags & IEEE80211_CHAN_NO_IR)
2928                         user_scan_cfg->chan_list[i].scan_type =
2929                                                 MWIFIEX_SCAN_TYPE_PASSIVE;
2930                 else
2931 --- a/drivers/net/wireless/mwifiex/scan.c
2932 +++ b/drivers/net/wireless/mwifiex/scan.c
2933 @@ -515,14 +515,14 @@ mwifiex_scan_create_channel_list(struct
2934                                 scan_chan_list[chan_idx].max_scan_time =
2935                                         cpu_to_le16((u16) user_scan_in->
2936                                         chan_list[0].scan_time);
2937 -                       else if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
2938 +                       else if (ch->flags & IEEE80211_CHAN_NO_IR)
2939                                 scan_chan_list[chan_idx].max_scan_time =
2940                                         cpu_to_le16(adapter->passive_scan_time);
2941                         else
2942                                 scan_chan_list[chan_idx].max_scan_time =
2943                                         cpu_to_le16(adapter->active_scan_time);
2944
2945 -                       if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
2946 +                       if (ch->flags & IEEE80211_CHAN_NO_IR)
2947                                 scan_chan_list[chan_idx].chan_scan_mode_bitmap
2948                                         |= MWIFIEX_PASSIVE_SCAN;
2949                         else
2950 --- a/drivers/net/wireless/rt2x00/rt2x00lib.h
2951 +++ b/drivers/net/wireless/rt2x00/rt2x00lib.h
2952 @@ -146,7 +146,7 @@ void rt2x00queue_remove_l2pad(struct sk_
2953   * @local: frame is not from mac80211
2954   */
2955  int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
2956 -                              bool local);
2957 +                              struct ieee80211_sta *sta, bool local);
2958
2959  /**
2960   * rt2x00queue_update_beacon - Send new beacon from mac80211
2961 --- a/drivers/net/wireless/rt2x00/rt2x00mac.c
2962 +++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
2963 @@ -90,7 +90,7 @@ static int rt2x00mac_tx_rts_cts(struct r
2964                                   frag_skb->data, data_length, tx_info,
2965                                   (struct ieee80211_rts *)(skb->data));
2966
2967 -       retval = rt2x00queue_write_tx_frame(queue, skb, true);
2968 +       retval = rt2x00queue_write_tx_frame(queue, skb, NULL, true);
2969         if (retval) {
2970                 dev_kfree_skb_any(skb);
2971                 rt2x00_warn(rt2x00dev, "Failed to send RTS/CTS frame\n");
2972 @@ -151,7 +151,7 @@ void rt2x00mac_tx(struct ieee80211_hw *h
2973                         goto exit_fail;
2974         }
2975
2976 -       if (unlikely(rt2x00queue_write_tx_frame(queue, skb, false)))
2977 +       if (unlikely(rt2x00queue_write_tx_frame(queue, skb, control->sta, false)))
2978                 goto exit_fail;
2979
2980         /*
2981 --- a/drivers/net/wireless/rt2x00/rt2x00queue.c
2982 +++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
2983 @@ -635,7 +635,7 @@ static void rt2x00queue_bar_check(struct
2984  }
2985
2986  int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
2987 -                              bool local)
2988 +                              struct ieee80211_sta *sta, bool local)
2989  {
2990         struct ieee80211_tx_info *tx_info;
2991         struct queue_entry *entry;
2992 @@ -649,7 +649,7 @@ int rt2x00queue_write_tx_frame(struct da
2993          * after that we are free to use the skb->cb array
2994          * for our information.
2995          */
2996 -       rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, NULL);
2997 +       rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta);
2998
2999         /*
3000          * All information is retrieved from the skb->cb array,
3001 --- a/drivers/net/wireless/rtl818x/rtl8187/dev.c
3002 +++ b/drivers/net/wireless/rtl818x/rtl8187/dev.c
3003 @@ -416,7 +416,7 @@ static int rtl8187_init_urbs(struct ieee
3004         struct rtl8187_rx_info *info;
3005         int ret = 0;
3006
3007 -       while (skb_queue_len(&priv->rx_queue) < 16) {
3008 +       while (skb_queue_len(&priv->rx_queue) < 32) {
3009                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
3010                 if (!skb) {
3011                         ret = -ENOMEM;
3012 --- a/drivers/net/wireless/rtlwifi/base.c
3013 +++ b/drivers/net/wireless/rtlwifi/base.c
3014 @@ -1078,8 +1078,8 @@ u8 rtl_is_special_data(struct ieee80211_
3015
3016         ip = (struct iphdr *)((u8 *) skb->data + mac_hdr_len +
3017                               SNAP_SIZE + PROTOC_TYPE_SIZE);
3018 -       ether_type = *(u16 *) ((u8 *) skb->data + mac_hdr_len + SNAP_SIZE);
3019 -       /*      ether_type = ntohs(ether_type); */
3020 +       ether_type = be16_to_cpu(*(__be16 *)((u8 *)skb->data + mac_hdr_len +
3021 +                                            SNAP_SIZE));
3022
3023         if (ETH_P_IP == ether_type) {
3024                 if (IPPROTO_UDP == ip->protocol) {
3025 --- a/drivers/net/wireless/rtlwifi/regd.c
3026 +++ b/drivers/net/wireless/rtlwifi/regd.c
3027 @@ -59,30 +59,27 @@ static struct country_code_to_enum_rd al
3028   */
3029  #define RTL819x_2GHZ_CH12_13   \
3030         REG_RULE(2467-10, 2472+10, 40, 0, 20,\
3031 -       NL80211_RRF_PASSIVE_SCAN)
3032 +       NL80211_RRF_NO_IR)
3033
3034  #define RTL819x_2GHZ_CH14      \
3035         REG_RULE(2484-10, 2484+10, 40, 0, 20, \
3036 -       NL80211_RRF_PASSIVE_SCAN | \
3037 +       NL80211_RRF_NO_IR | \
3038         NL80211_RRF_NO_OFDM)
3039
3040  /* 5G chan 36 - chan 64*/
3041  #define RTL819x_5GHZ_5150_5350 \
3042         REG_RULE(5150-10, 5350+10, 40, 0, 30, \
3043 -       NL80211_RRF_PASSIVE_SCAN | \
3044 -       NL80211_RRF_NO_IBSS)
3045 +       NL80211_RRF_NO_IR)
3046
3047  /* 5G chan 100 - chan 165*/
3048  #define RTL819x_5GHZ_5470_5850 \
3049         REG_RULE(5470-10, 5850+10, 40, 0, 30, \
3050 -       NL80211_RRF_PASSIVE_SCAN | \
3051 -       NL80211_RRF_NO_IBSS)
3052 +       NL80211_RRF_NO_IR)
3053
3054  /* 5G chan 149 - chan 165*/
3055  #define RTL819x_5GHZ_5725_5850 \
3056         REG_RULE(5725-10, 5850+10, 40, 0, 30, \
3057 -       NL80211_RRF_PASSIVE_SCAN | \
3058 -       NL80211_RRF_NO_IBSS)
3059 +       NL80211_RRF_NO_IR)
3060
3061  #define RTL819x_5GHZ_ALL       \
3062         (RTL819x_5GHZ_5150_5350, RTL819x_5GHZ_5470_5850)
3063 @@ -185,16 +182,15 @@ static void _rtl_reg_apply_beaconing_fla
3064                                  *regulatory_hint().
3065                                  */
3066
3067 -                               if (!(reg_rule->flags & NL80211_RRF_NO_IBSS))
3068 -                                       ch->flags &= ~IEEE80211_CHAN_NO_IBSS;
3069 +                               if (!(reg_rule->flags & NL80211_RRF_NO_IR))
3070 +                                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
3071                                 if (!(reg_rule->
3072 -                                    flags & NL80211_RRF_PASSIVE_SCAN))
3073 +                                    flags & NL80211_RRF_NO_IR))
3074                                         ch->flags &=
3075 -                                           ~IEEE80211_CHAN_PASSIVE_SCAN;
3076 +                                           ~IEEE80211_CHAN_NO_IR;
3077                         } else {
3078                                 if (ch->beacon_found)
3079 -                                       ch->flags &= ~(IEEE80211_CHAN_NO_IBSS |
3080 -                                                 IEEE80211_CHAN_PASSIVE_SCAN);
3081 +                                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
3082                         }
3083                 }
3084         }
3085 @@ -219,11 +215,11 @@ static void _rtl_reg_apply_active_scan_f
3086          */
3087         if (initiator != NL80211_REGDOM_SET_BY_COUNTRY_IE) {
3088                 ch = &sband->channels[11];      /* CH 12 */
3089 -               if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3090 -                       ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
3091 +               if (ch->flags & IEEE80211_CHAN_NO_IR)
3092 +                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
3093                 ch = &sband->channels[12];      /* CH 13 */
3094 -               if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3095 -                       ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
3096 +               if (ch->flags & IEEE80211_CHAN_NO_IR)
3097 +                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
3098                 return;
3099         }
3100
3101 @@ -237,17 +233,17 @@ static void _rtl_reg_apply_active_scan_f
3102         ch = &sband->channels[11];      /* CH 12 */
3103         reg_rule = freq_reg_info(wiphy, ch->center_freq);
3104         if (!IS_ERR(reg_rule)) {
3105 -               if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
3106 -                       if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3107 -                               ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
3108 +               if (!(reg_rule->flags & NL80211_RRF_NO_IR))
3109 +                       if (ch->flags & IEEE80211_CHAN_NO_IR)
3110 +                               ch->flags &= ~IEEE80211_CHAN_NO_IR;
3111         }
3112
3113         ch = &sband->channels[12];      /* CH 13 */
3114         reg_rule = freq_reg_info(wiphy, ch->center_freq);
3115         if (!IS_ERR(reg_rule)) {
3116 -               if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
3117 -                       if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3118 -                               ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
3119 +               if (!(reg_rule->flags & NL80211_RRF_NO_IR))
3120 +                       if (ch->flags & IEEE80211_CHAN_NO_IR)
3121 +                               ch->flags &= ~IEEE80211_CHAN_NO_IR;
3122         }
3123  }
3124
3125 @@ -284,8 +280,8 @@ static void _rtl_reg_apply_radar_flags(s
3126                  */
3127                 if (!(ch->flags & IEEE80211_CHAN_DISABLED))
3128                         ch->flags |= IEEE80211_CHAN_RADAR |
3129 -                           IEEE80211_CHAN_NO_IBSS |
3130 -                           IEEE80211_CHAN_PASSIVE_SCAN;
3131 +                           IEEE80211_CHAN_NO_IR |
3132 +                           IEEE80211_CHAN_NO_IR;
3133         }
3134  }
3135
3136 --- a/drivers/net/wireless/ti/wl12xx/scan.c
3137 +++ b/drivers/net/wireless/ti/wl12xx/scan.c
3138 @@ -47,7 +47,7 @@ static int wl1271_get_scan_channels(stru
3139                      * In active scans, we only scan channels not
3140                      * marked as passive.
3141                      */
3142 -                   (passive || !(flags & IEEE80211_CHAN_PASSIVE_SCAN))) {
3143 +                   (passive || !(flags & IEEE80211_CHAN_NO_IR))) {
3144                         wl1271_debug(DEBUG_SCAN, "band %d, center_freq %d ",
3145                                      req->channels[i]->band,
3146                                      req->channels[i]->center_freq);
3147 --- a/drivers/net/wireless/ti/wlcore/cmd.c
3148 +++ b/drivers/net/wireless/ti/wlcore/cmd.c
3149 @@ -1688,7 +1688,7 @@ int wlcore_cmd_regdomain_config_locked(s
3150
3151                         if (channel->flags & (IEEE80211_CHAN_DISABLED |
3152                                               IEEE80211_CHAN_RADAR |
3153 -                                             IEEE80211_CHAN_PASSIVE_SCAN))
3154 +                                             IEEE80211_CHAN_NO_IR))
3155                                 continue;
3156
3157                         ch_bit_idx = wlcore_get_reg_conf_ch_idx(b, ch);
3158 --- a/drivers/net/wireless/ti/wlcore/main.c
3159 +++ b/drivers/net/wireless/ti/wlcore/main.c
3160 @@ -91,8 +91,7 @@ static void wl1271_reg_notify(struct wip
3161                         continue;
3162
3163                 if (ch->flags & IEEE80211_CHAN_RADAR)
3164 -                       ch->flags |= IEEE80211_CHAN_NO_IBSS |
3165 -                                    IEEE80211_CHAN_PASSIVE_SCAN;
3166 +                       ch->flags |= IEEE80211_CHAN_NO_IR;
3167
3168         }
3169
3170 --- a/drivers/net/wireless/ti/wlcore/scan.c
3171 +++ b/drivers/net/wireless/ti/wlcore/scan.c
3172 @@ -189,14 +189,14 @@ wlcore_scan_get_channels(struct wl1271 *
3173                 flags = req_channels[i]->flags;
3174
3175                 if (force_passive)
3176 -                       flags |= IEEE80211_CHAN_PASSIVE_SCAN;
3177 +                       flags |= IEEE80211_CHAN_NO_IR;
3178
3179                 if ((req_channels[i]->band == band) &&
3180                     !(flags & IEEE80211_CHAN_DISABLED) &&
3181                     (!!(flags & IEEE80211_CHAN_RADAR) == radar) &&
3182                     /* if radar is set, we ignore the passive flag */
3183                     (radar ||
3184 -                    !!(flags & IEEE80211_CHAN_PASSIVE_SCAN) == passive)) {
3185 +                    !!(flags & IEEE80211_CHAN_NO_IR) == passive)) {
3186
3187
3188                         if (flags & IEEE80211_CHAN_RADAR) {
3189 @@ -221,7 +221,7 @@ wlcore_scan_get_channels(struct wl1271 *
3190                             (band == IEEE80211_BAND_2GHZ) &&
3191                             (channels[j].channel >= 12) &&
3192                             (channels[j].channel <= 14) &&
3193 -                           (flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
3194 +                           (flags & IEEE80211_CHAN_NO_IR) &&
3195                             !force_passive) {
3196                                 /* pactive channels treated as DFS */
3197                                 channels[j].flags = SCAN_CHANNEL_FLAGS_DFS;
3198 @@ -244,7 +244,7 @@ wlcore_scan_get_channels(struct wl1271 *
3199                                      max_dwell_time_active,
3200                                      flags & IEEE80211_CHAN_RADAR ?
3201                                         ", DFS" : "",
3202 -                                    flags & IEEE80211_CHAN_PASSIVE_SCAN ?
3203 +                                    flags & IEEE80211_CHAN_NO_IR ?
3204                                         ", PASSIVE" : "");
3205                         j++;
3206                 }
3207 --- a/include/net/cfg80211.h
3208 +++ b/include/net/cfg80211.h
3209 @@ -91,9 +91,8 @@ enum ieee80211_band {
3210   * Channel flags set by the regulatory control code.
3211   *
3212   * @IEEE80211_CHAN_DISABLED: This channel is disabled.
3213 - * @IEEE80211_CHAN_PASSIVE_SCAN: Only passive scanning is permitted
3214 - *     on this channel.
3215 - * @IEEE80211_CHAN_NO_IBSS: IBSS is not allowed on this channel.
3216 + * @IEEE80211_CHAN_NO_IR: do not initiate radiation, this includes
3217 + *     sending probe requests or beaconing.
3218   * @IEEE80211_CHAN_RADAR: Radar detection is required on this channel.
3219   * @IEEE80211_CHAN_NO_HT40PLUS: extension channel above this channel
3220   *     is not permitted.
3221 @@ -113,8 +112,8 @@ enum ieee80211_band {
3222   */
3223  enum ieee80211_channel_flags {
3224         IEEE80211_CHAN_DISABLED         = 1<<0,
3225 -       IEEE80211_CHAN_PASSIVE_SCAN     = 1<<1,
3226 -       IEEE80211_CHAN_NO_IBSS          = 1<<2,
3227 +       IEEE80211_CHAN_NO_IR            = 1<<1,
3228 +       /* hole at 1<<2 */
3229         IEEE80211_CHAN_RADAR            = 1<<3,
3230         IEEE80211_CHAN_NO_HT40PLUS      = 1<<4,
3231         IEEE80211_CHAN_NO_HT40MINUS     = 1<<5,
3232 @@ -4149,6 +4148,7 @@ void cfg80211_radar_event(struct wiphy *
3233  /**
3234   * cfg80211_cac_event - Channel availability check (CAC) event
3235   * @netdev: network device
3236 + * @chandef: chandef for the current channel
3237   * @event: type of event
3238   * @gfp: context flags
3239   *
3240 @@ -4157,6 +4157,7 @@ void cfg80211_radar_event(struct wiphy *
3241   * also by full-MAC drivers.
3242   */
3243  void cfg80211_cac_event(struct net_device *netdev,
3244 +                       const struct cfg80211_chan_def *chandef,
3245                         enum nl80211_radar_event event, gfp_t gfp);
3246
3247
3248 @@ -4282,7 +4283,8 @@ bool cfg80211_reg_can_beacon(struct wiph
3249   * @dev: the device which switched channels
3250   * @chandef: the new channel definition
3251   *
3252 - * Acquires wdev_lock, so must only be called from sleepable driver context!
3253 + * Caller must acquire wdev_lock, therefore must only be called from sleepable
3254 + * driver context!
3255   */
3256  void cfg80211_ch_switch_notify(struct net_device *dev,
3257                                struct cfg80211_chan_def *chandef);
3258 --- a/include/uapi/linux/nl80211.h
3259 +++ b/include/uapi/linux/nl80211.h
3260 @@ -1508,6 +1508,12 @@ enum nl80211_commands {
3261   *     to react to radar events, e.g. initiate a channel switch or leave the
3262   *     IBSS network.
3263   *
3264 + * @NL80211_ATTR_SUPPORT_5_MHZ: A flag indicating that the device supports
3265 + *     5 MHz channel bandwidth.
3266 + *
3267 + * @NL80211_ATTR_SUPPORT_10_MHZ: A flag indicating that the device supports
3268 + *     10 MHz channel bandwidth.
3269 + *
3270   * @NL80211_ATTR_MAX: highest attribute number currently defined
3271   * @__NL80211_ATTR_AFTER_LAST: internal use
3272   */
3273 @@ -1824,6 +1830,9 @@ enum nl80211_attrs {
3274
3275         NL80211_ATTR_HANDLE_DFS,
3276
3277 +       NL80211_ATTR_SUPPORT_5_MHZ,
3278 +       NL80211_ATTR_SUPPORT_10_MHZ,
3279 +
3280         /* add attributes here, update the policy in nl80211.c */
3281
3282         __NL80211_ATTR_AFTER_LAST,
3283 @@ -2224,10 +2233,9 @@ enum nl80211_band_attr {
3284   * @NL80211_FREQUENCY_ATTR_FREQ: Frequency in MHz
3285   * @NL80211_FREQUENCY_ATTR_DISABLED: Channel is disabled in current
3286   *     regulatory domain.
3287 - * @NL80211_FREQUENCY_ATTR_PASSIVE_SCAN: Only passive scanning is
3288 - *     permitted on this channel in current regulatory domain.
3289 - * @NL80211_FREQUENCY_ATTR_NO_IBSS: IBSS networks are not permitted
3290 - *     on this channel in current regulatory domain.
3291 + * @NL80211_FREQUENCY_ATTR_NO_IR: no mechanisms that initiate radiation
3292 + *     are permitted on this channel, this includes sending probe
3293 + *     requests, or modes of operation that require beaconing.
3294   * @NL80211_FREQUENCY_ATTR_RADAR: Radar detection is mandatory
3295   *     on this channel in current regulatory domain.
3296   * @NL80211_FREQUENCY_ATTR_MAX_TX_POWER: Maximum transmission power in mBm
3297 @@ -2254,8 +2262,8 @@ enum nl80211_frequency_attr {
3298         __NL80211_FREQUENCY_ATTR_INVALID,
3299         NL80211_FREQUENCY_ATTR_FREQ,
3300         NL80211_FREQUENCY_ATTR_DISABLED,
3301 -       NL80211_FREQUENCY_ATTR_PASSIVE_SCAN,
3302 -       NL80211_FREQUENCY_ATTR_NO_IBSS,
3303 +       NL80211_FREQUENCY_ATTR_NO_IR,
3304 +       __NL80211_FREQUENCY_ATTR_NO_IBSS,
3305         NL80211_FREQUENCY_ATTR_RADAR,
3306         NL80211_FREQUENCY_ATTR_MAX_TX_POWER,
3307         NL80211_FREQUENCY_ATTR_DFS_STATE,
3308 @@ -2271,6 +2279,9 @@ enum nl80211_frequency_attr {
3309  };
3310
3311  #define NL80211_FREQUENCY_ATTR_MAX_TX_POWER NL80211_FREQUENCY_ATTR_MAX_TX_POWER
3312 +#define NL80211_FREQUENCY_ATTR_PASSIVE_SCAN    NL80211_FREQUENCY_ATTR_NO_IR
3313 +#define NL80211_FREQUENCY_ATTR_NO_IBSS         NL80211_FREQUENCY_ATTR_NO_IR
3314 +#define NL80211_FREQUENCY_ATTR_NO_IR           NL80211_FREQUENCY_ATTR_NO_IR
3315
3316  /**
3317   * enum nl80211_bitrate_attr - bitrate attributes
3318 @@ -2413,8 +2424,9 @@ enum nl80211_sched_scan_match_attr {
3319   * @NL80211_RRF_DFS: DFS support is required to be used
3320   * @NL80211_RRF_PTP_ONLY: this is only for Point To Point links
3321   * @NL80211_RRF_PTMP_ONLY: this is only for Point To Multi Point links
3322 - * @NL80211_RRF_PASSIVE_SCAN: passive scan is required
3323 - * @NL80211_RRF_NO_IBSS: no IBSS is allowed
3324 + * @NL80211_RRF_NO_IR: no mechanisms that initiate radiation are allowed,
3325 + *     this includes probe requests or modes of operation that require
3326 + *     beaconing.
3327   */
3328  enum nl80211_reg_rule_flags {
3329         NL80211_RRF_NO_OFDM             = 1<<0,
3330 @@ -2424,10 +2436,17 @@ enum nl80211_reg_rule_flags {
3331         NL80211_RRF_DFS                 = 1<<4,
3332         NL80211_RRF_PTP_ONLY            = 1<<5,
3333         NL80211_RRF_PTMP_ONLY           = 1<<6,
3334 -       NL80211_RRF_PASSIVE_SCAN        = 1<<7,
3335 -       NL80211_RRF_NO_IBSS             = 1<<8,
3336 +       NL80211_RRF_NO_IR               = 1<<7,
3337 +       __NL80211_RRF_NO_IBSS           = 1<<8,
3338  };
3339
3340 +#define NL80211_RRF_PASSIVE_SCAN       NL80211_RRF_NO_IR
3341 +#define NL80211_RRF_NO_IBSS            NL80211_RRF_NO_IR
3342 +#define NL80211_RRF_NO_IR              NL80211_RRF_NO_IR
3343 +
3344 +/* For backport compatibility with older userspace */
3345 +#define NL80211_RRF_NO_IR_ALL          (NL80211_RRF_NO_IR | __NL80211_RRF_NO_IBSS)
3346 +
3347  /**
3348   * enum nl80211_dfs_regions - regulatory DFS regions
3349   *
3350 --- a/net/mac80211/cfg.c
3351 +++ b/net/mac80211/cfg.c
3352 @@ -846,7 +846,7 @@ static int ieee80211_set_probe_resp(stru
3353         if (!resp || !resp_len)
3354                 return 1;
3355
3356 -       old = rtnl_dereference(sdata->u.ap.probe_resp);
3357 +       old = sdata_dereference(sdata->u.ap.probe_resp, sdata);
3358
3359         new = kzalloc(sizeof(struct probe_resp) + resp_len, GFP_KERNEL);
3360         if (!new)
3361 @@ -870,7 +870,8 @@ int ieee80211_assign_beacon(struct ieee8
3362         int size, err;
3363         u32 changed = BSS_CHANGED_BEACON;
3364
3365 -       old = rtnl_dereference(sdata->u.ap.beacon);
3366 +       old = sdata_dereference(sdata->u.ap.beacon, sdata);
3367 +
3368
3369         /* Need to have a beacon head if we don't have one yet */
3370         if (!params->head && !old)
3371 @@ -947,7 +948,7 @@ static int ieee80211_start_ap(struct wip
3372                       BSS_CHANGED_P2P_PS;
3373         int err;
3374
3375 -       old = rtnl_dereference(sdata->u.ap.beacon);
3376 +       old = sdata_dereference(sdata->u.ap.beacon, sdata);
3377         if (old)
3378                 return -EALREADY;
3379
3380 @@ -1001,7 +1002,8 @@ static int ieee80211_start_ap(struct wip
3381
3382         err = drv_start_ap(sdata->local, sdata);
3383         if (err) {
3384 -               old = rtnl_dereference(sdata->u.ap.beacon);
3385 +               old = sdata_dereference(sdata->u.ap.beacon, sdata);
3386 +
3387                 if (old)
3388                         kfree_rcu(old, rcu_head);
3389                 RCU_INIT_POINTER(sdata->u.ap.beacon, NULL);
3390 @@ -1032,7 +1034,7 @@ static int ieee80211_change_beacon(struc
3391         if (sdata->vif.csa_active)
3392                 return -EBUSY;
3393
3394 -       old = rtnl_dereference(sdata->u.ap.beacon);
3395 +       old = sdata_dereference(sdata->u.ap.beacon, sdata);
3396         if (!old)
3397                 return -ENOENT;
3398
3399 @@ -1050,15 +1052,18 @@ static int ieee80211_stop_ap(struct wiph
3400         struct ieee80211_local *local = sdata->local;
3401         struct beacon_data *old_beacon;
3402         struct probe_resp *old_probe_resp;
3403 +       struct cfg80211_chan_def chandef;
3404
3405 -       old_beacon = rtnl_dereference(sdata->u.ap.beacon);
3406 +       old_beacon = sdata_dereference(sdata->u.ap.beacon, sdata);
3407         if (!old_beacon)
3408                 return -ENOENT;
3409 -       old_probe_resp = rtnl_dereference(sdata->u.ap.probe_resp);
3410 +       old_probe_resp = sdata_dereference(sdata->u.ap.probe_resp, sdata);
3411
3412         /* abort any running channel switch */
3413         sdata->vif.csa_active = false;
3414 -       cancel_work_sync(&sdata->csa_finalize_work);
3415 +       kfree(sdata->u.ap.next_beacon);
3416 +       sdata->u.ap.next_beacon = NULL;
3417 +
3418         cancel_work_sync(&sdata->u.ap.request_smps_work);
3419
3420         /* turn off carrier for this interface and dependent VLANs */
3421 @@ -1091,8 +1096,10 @@ static int ieee80211_stop_ap(struct wiph
3422         ieee80211_bss_info_change_notify(sdata, BSS_CHANGED_BEACON_ENABLED);
3423
3424         if (sdata->wdev.cac_started) {
3425 +               chandef = sdata->vif.bss_conf.chandef;
3426                 cancel_delayed_work_sync(&sdata->dfs_cac_timer_work);
3427 -               cfg80211_cac_event(sdata->dev, NL80211_RADAR_CAC_ABORTED,
3428 +               cfg80211_cac_event(sdata->dev, &chandef,
3429 +                                  NL80211_RADAR_CAC_ABORTED,
3430                                    GFP_KERNEL);
3431         }
3432
3433 @@ -1368,7 +1375,7 @@ static int sta_apply_parameters(struct i
3434                         changed |=
3435                               ieee80211_mps_set_sta_local_pm(sta,
3436                                                              params->local_pm);
3437 -               ieee80211_bss_info_change_notify(sdata, changed);
3438 +               ieee80211_mbss_info_change_notify(sdata, changed);
3439  #endif
3440         }
3441
3442 @@ -1953,7 +1960,7 @@ static int ieee80211_change_bss(struct w
3443         enum ieee80211_band band;
3444         u32 changed = 0;
3445
3446 -       if (!rtnl_dereference(sdata->u.ap.beacon))
3447 +       if (!sdata_dereference(sdata->u.ap.beacon, sdata))
3448                 return -ENOENT;
3449
3450         band = ieee80211_get_sdata_band(sdata);
3451 @@ -2964,27 +2971,33 @@ void ieee80211_csa_finalize_work(struct
3452         struct ieee80211_local *local = sdata->local;
3453         int err, changed = 0;
3454
3455 +       sdata_lock(sdata);
3456 +       /* AP might have been stopped while waiting for the lock. */
3457 +       if (!sdata->vif.csa_active)
3458 +               goto unlock;
3459 +
3460         if (!ieee80211_sdata_running(sdata))
3461 -               return;
3462 +               goto unlock;
3463
3464         sdata->radar_required = sdata->csa_radar_required;
3465 -       err = ieee80211_vif_change_channel(sdata, &local->csa_chandef,
3466 -                                          &changed);
3467 +       err = ieee80211_vif_change_channel(sdata, &changed);
3468         if (WARN_ON(err < 0))
3469 -               return;
3470 +               goto unlock;
3471
3472         if (!local->use_chanctx) {
3473 -               local->_oper_chandef = local->csa_chandef;
3474 +               local->_oper_chandef = sdata->csa_chandef;
3475                 ieee80211_hw_config(local, 0);
3476         }
3477
3478         ieee80211_bss_info_change_notify(sdata, changed);
3479
3480 +       sdata->vif.csa_active = false;
3481         switch (sdata->vif.type) {
3482         case NL80211_IFTYPE_AP:
3483                 err = ieee80211_assign_beacon(sdata, sdata->u.ap.next_beacon);
3484                 if (err < 0)
3485 -                       return;
3486 +                       goto unlock;
3487 +
3488                 changed |= err;
3489                 kfree(sdata->u.ap.next_beacon);
3490                 sdata->u.ap.next_beacon = NULL;
3491 @@ -2998,20 +3011,22 @@ void ieee80211_csa_finalize_work(struct
3492         case NL80211_IFTYPE_MESH_POINT:
3493                 err = ieee80211_mesh_finish_csa(sdata);
3494                 if (err < 0)
3495 -                       return;
3496 +                       goto unlock;
3497                 break;
3498  #endif
3499         default:
3500                 WARN_ON(1);
3501 -               return;
3502 +               goto unlock;
3503         }
3504 -       sdata->vif.csa_active = false;
3505
3506         ieee80211_wake_queues_by_reason(&sdata->local->hw,
3507                                         IEEE80211_MAX_QUEUE_MAP,
3508                                         IEEE80211_QUEUE_STOP_REASON_CSA);
3509
3510 -       cfg80211_ch_switch_notify(sdata->dev, &local->csa_chandef);
3511 +       cfg80211_ch_switch_notify(sdata->dev, &sdata->csa_chandef);
3512 +
3513 +unlock:
3514 +       sdata_unlock(sdata);
3515  }
3516
3517  static int ieee80211_channel_switch(struct wiphy *wiphy, struct net_device *dev,
3518 @@ -3024,6 +3039,8 @@ static int ieee80211_channel_switch(stru
3519         struct ieee80211_if_mesh __maybe_unused *ifmsh;
3520         int err, num_chanctx;
3521
3522 +       lockdep_assert_held(&sdata->wdev.mtx);
3523 +
3524         if (!list_empty(&local->roc_list) || local->scanning)
3525                 return -EBUSY;
3526
3527 @@ -3120,9 +3137,17 @@ static int ieee80211_channel_switch(stru
3528                     params->chandef.chan->band)
3529                         return -EINVAL;
3530
3531 +               ifmsh->chsw_init = true;
3532 +               if (!ifmsh->pre_value)
3533 +                       ifmsh->pre_value = 1;
3534 +               else
3535 +                       ifmsh->pre_value++;
3536 +
3537                 err = ieee80211_mesh_csa_beacon(sdata, params, true);
3538 -               if (err < 0)
3539 +               if (err < 0) {
3540 +                       ifmsh->chsw_init = false;
3541                         return err;
3542 +               }
3543                 break;
3544  #endif
3545         default:
3546 @@ -3136,7 +3161,7 @@ static int ieee80211_channel_switch(stru
3547                                 IEEE80211_MAX_QUEUE_MAP,
3548                                 IEEE80211_QUEUE_STOP_REASON_CSA);
3549
3550 -       local->csa_chandef = params->chandef;
3551 +       sdata->csa_chandef = params->chandef;
3552         sdata->vif.csa_active = true;
3553
3554         ieee80211_bss_info_change_notify(sdata, err);
3555 --- a/net/mac80211/iface.c
3556 +++ b/net/mac80211/iface.c
3557 @@ -749,6 +749,7 @@ static void ieee80211_do_stop(struct iee
3558         u32 hw_reconf_flags = 0;
3559         int i, flushed;
3560         struct ps_data *ps;
3561 +       struct cfg80211_chan_def chandef;
3562
3563         clear_bit(SDATA_STATE_RUNNING, &sdata->state);
3564
3565 @@ -828,11 +829,13 @@ static void ieee80211_do_stop(struct iee
3566         cancel_delayed_work_sync(&sdata->dfs_cac_timer_work);
3567
3568         if (sdata->wdev.cac_started) {
3569 +               chandef = sdata->vif.bss_conf.chandef;
3570                 WARN_ON(local->suspended);
3571                 mutex_lock(&local->iflist_mtx);
3572                 ieee80211_vif_release_channel(sdata);
3573                 mutex_unlock(&local->iflist_mtx);
3574 -               cfg80211_cac_event(sdata->dev, NL80211_RADAR_CAC_ABORTED,
3575 +               cfg80211_cac_event(sdata->dev, &chandef,
3576 +                                  NL80211_RADAR_CAC_ABORTED,
3577                                    GFP_KERNEL);
3578         }
3579
3580 @@ -1340,7 +1343,6 @@ static void ieee80211_setup_sdata(struct
3581                 sdata->vif.bss_conf.bssid = NULL;
3582                 break;
3583         case NL80211_IFTYPE_AP_VLAN:
3584 -               break;
3585         case NL80211_IFTYPE_P2P_DEVICE:
3586                 sdata->vif.bss_conf.bssid = sdata->vif.addr;
3587                 break;
3588 --- a/net/mac80211/mlme.c
3589 +++ b/net/mac80211/mlme.c
3590 @@ -886,8 +886,7 @@ static void ieee80211_chswitch_work(stru
3591         if (!ifmgd->associated)
3592                 goto out;
3593
3594 -       ret = ieee80211_vif_change_channel(sdata, &local->csa_chandef,
3595 -                                          &changed);
3596 +       ret = ieee80211_vif_change_channel(sdata, &changed);
3597         if (ret) {
3598                 sdata_info(sdata,
3599                            "vif channel switch failed, disconnecting\n");
3600 @@ -897,7 +896,7 @@ static void ieee80211_chswitch_work(stru
3601         }
3602
3603         if (!local->use_chanctx) {
3604 -               local->_oper_chandef = local->csa_chandef;
3605 +               local->_oper_chandef = sdata->csa_chandef;
3606                 /* Call "hw_config" only if doing sw channel switch.
3607                  * Otherwise update the channel directly
3608                  */
3609 @@ -908,7 +907,7 @@ static void ieee80211_chswitch_work(stru
3610         }
3611
3612         /* XXX: shouldn't really modify cfg80211-owned data! */
3613 -       ifmgd->associated->channel = local->csa_chandef.chan;
3614 +       ifmgd->associated->channel = sdata->csa_chandef.chan;
3615
3616         /* XXX: wait for a beacon first? */
3617         ieee80211_wake_queues_by_reason(&local->hw,
3618 @@ -1035,7 +1034,7 @@ ieee80211_sta_process_chanswitch(struct
3619         }
3620         mutex_unlock(&local->chanctx_mtx);
3621
3622 -       local->csa_chandef = csa_ie.chandef;
3623 +       sdata->csa_chandef = csa_ie.chandef;
3624
3625         if (csa_ie.mode)
3626                 ieee80211_stop_queues_by_reason(&local->hw,
3627 @@ -1398,10 +1397,12 @@ void ieee80211_dfs_cac_timer_work(struct
3628         struct ieee80211_sub_if_data *sdata =
3629                 container_of(delayed_work, struct ieee80211_sub_if_data,
3630                              dfs_cac_timer_work);
3631 +       struct cfg80211_chan_def chandef = sdata->vif.bss_conf.chandef;
3632
3633         ieee80211_vif_release_channel(sdata);
3634 -
3635 -       cfg80211_cac_event(sdata->dev, NL80211_RADAR_CAC_FINISHED, GFP_KERNEL);
3636 +       cfg80211_cac_event(sdata->dev, &chandef,
3637 +                          NL80211_RADAR_CAC_FINISHED,
3638 +                          GFP_KERNEL);
3639  }
3640
3641  /* MLME */
3642 --- a/net/mac80211/rx.c
3643 +++ b/net/mac80211/rx.c
3644 @@ -729,9 +729,7 @@ static void ieee80211_release_reorder_fr
3645         lockdep_assert_held(&tid_agg_rx->reorder_lock);
3646
3647         while (ieee80211_sn_less(tid_agg_rx->head_seq_num, head_seq_num)) {
3648 -               index = ieee80211_sn_sub(tid_agg_rx->head_seq_num,
3649 -                                        tid_agg_rx->ssn) %
3650 -                                                       tid_agg_rx->buf_size;
3651 +               index = tid_agg_rx->head_seq_num % tid_agg_rx->buf_size;
3652                 ieee80211_release_reorder_frame(sdata, tid_agg_rx, index,
3653                                                 frames);
3654         }
3655 @@ -757,8 +755,7 @@ static void ieee80211_sta_reorder_releas
3656         lockdep_assert_held(&tid_agg_rx->reorder_lock);
3657
3658         /* release the buffer until next missing frame */
3659 -       index = ieee80211_sn_sub(tid_agg_rx->head_seq_num,
3660 -                                tid_agg_rx->ssn) % tid_agg_rx->buf_size;
3661 +       index = tid_agg_rx->head_seq_num % tid_agg_rx->buf_size;
3662         if (!tid_agg_rx->reorder_buf[index] &&
3663             tid_agg_rx->stored_mpdu_num) {
3664                 /*
3665 @@ -793,15 +790,11 @@ static void ieee80211_sta_reorder_releas
3666         } else while (tid_agg_rx->reorder_buf[index]) {
3667                 ieee80211_release_reorder_frame(sdata, tid_agg_rx, index,
3668                                                 frames);
3669 -               index = ieee80211_sn_sub(tid_agg_rx->head_seq_num,
3670 -                                        tid_agg_rx->ssn) %
3671 -                                                       tid_agg_rx->buf_size;
3672 +               index = tid_agg_rx->head_seq_num % tid_agg_rx->buf_size;
3673         }
3674
3675         if (tid_agg_rx->stored_mpdu_num) {
3676 -               j = index = ieee80211_sn_sub(tid_agg_rx->head_seq_num,
3677 -                                            tid_agg_rx->ssn) %
3678 -                                                       tid_agg_rx->buf_size;
3679 +               j = index = tid_agg_rx->head_seq_num % tid_agg_rx->buf_size;
3680
3681                 for (; j != (index - 1) % tid_agg_rx->buf_size;
3682                      j = (j + 1) % tid_agg_rx->buf_size) {
3683 @@ -861,8 +854,7 @@ static bool ieee80211_sta_manage_reorder
3684
3685         /* Now the new frame is always in the range of the reordering buffer */
3686
3687 -       index = ieee80211_sn_sub(mpdu_seq_num,
3688 -                                tid_agg_rx->ssn) % tid_agg_rx->buf_size;
3689 +       index = mpdu_seq_num % tid_agg_rx->buf_size;
3690
3691         /* check if we already stored this frame */
3692         if (tid_agg_rx->reorder_buf[index]) {
3693 @@ -911,7 +903,8 @@ static void ieee80211_rx_reorder_ampdu(s
3694         u16 sc;
3695         u8 tid, ack_policy;
3696
3697 -       if (!ieee80211_is_data_qos(hdr->frame_control))
3698 +       if (!ieee80211_is_data_qos(hdr->frame_control) ||
3699 +           is_multicast_ether_addr(hdr->addr1))
3700                 goto dont_reorder;
3701
3702         /*
3703 --- a/net/mac80211/scan.c
3704 +++ b/net/mac80211/scan.c
3705 @@ -526,7 +526,7 @@ static int __ieee80211_start_scan(struct
3706                 ieee80211_hw_config(local, 0);
3707
3708                 if ((req->channels[0]->flags &
3709 -                    IEEE80211_CHAN_PASSIVE_SCAN) ||
3710 +                    IEEE80211_CHAN_NO_IR) ||
3711                     !local->scan_req->n_ssids) {
3712                         next_delay = IEEE80211_PASSIVE_CHANNEL_TIME;
3713                 } else {
3714 @@ -572,7 +572,7 @@ ieee80211_scan_get_channel_time(struct i
3715          * TODO: channel switching also consumes quite some time,
3716          * add that delay as well to get a better estimation
3717          */
3718 -       if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3719 +       if (chan->flags & IEEE80211_CHAN_NO_IR)
3720                 return IEEE80211_PASSIVE_CHANNEL_TIME;
3721         return IEEE80211_PROBE_DELAY + IEEE80211_CHANNEL_TIME;
3722  }
3723 @@ -696,7 +696,7 @@ static void ieee80211_scan_state_set_cha
3724          *
3725          * In any case, it is not necessary for a passive scan.
3726          */
3727 -       if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN ||
3728 +       if (chan->flags & IEEE80211_CHAN_NO_IR ||
3729             !local->scan_req->n_ssids) {
3730                 *next_delay = IEEE80211_PASSIVE_CHANNEL_TIME;
3731                 local->next_scan_state = SCAN_DECISION;
3732 @@ -881,7 +881,7 @@ int ieee80211_request_ibss_scan(struct i
3733                                 struct ieee80211_channel *tmp_ch =
3734                                     &local->hw.wiphy->bands[band]->channels[i];
3735
3736 -                               if (tmp_ch->flags & (IEEE80211_CHAN_NO_IBSS |
3737 +                               if (tmp_ch->flags & (IEEE80211_CHAN_NO_IR |
3738                                                      IEEE80211_CHAN_DISABLED))
3739                                         continue;
3740
3741 @@ -895,7 +895,7 @@ int ieee80211_request_ibss_scan(struct i
3742
3743                 local->int_scan_req->n_channels = n_ch;
3744         } else {
3745 -               if (WARN_ON_ONCE(chan->flags & (IEEE80211_CHAN_NO_IBSS |
3746 +               if (WARN_ON_ONCE(chan->flags & (IEEE80211_CHAN_NO_IR |
3747                                                 IEEE80211_CHAN_DISABLED)))
3748                         goto unlock;
3749
3750 --- a/net/mac80211/tx.c
3751 +++ b/net/mac80211/tx.c
3752 @@ -1728,8 +1728,7 @@ netdev_tx_t ieee80211_monitor_start_xmit
3753          * radar detection by itself. We can do that later by adding a
3754          * monitor flag interfaces used for AP support.
3755          */
3756 -       if ((chan->flags & (IEEE80211_CHAN_NO_IBSS | IEEE80211_CHAN_RADAR |
3757 -                           IEEE80211_CHAN_PASSIVE_SCAN)))
3758 +       if ((chan->flags & (IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_RADAR)))
3759                 goto fail_rcu;
3760
3761         ieee80211_xmit(sdata, skb, chan->band);
3762 --- a/net/mac80211/util.c
3763 +++ b/net/mac80211/util.c
3764 @@ -2259,14 +2259,17 @@ u64 ieee80211_calculate_rx_timestamp(str
3765  void ieee80211_dfs_cac_cancel(struct ieee80211_local *local)
3766  {
3767         struct ieee80211_sub_if_data *sdata;
3768 +       struct cfg80211_chan_def chandef;
3769
3770         mutex_lock(&local->iflist_mtx);
3771         list_for_each_entry(sdata, &local->interfaces, list) {
3772                 cancel_delayed_work_sync(&sdata->dfs_cac_timer_work);
3773
3774                 if (sdata->wdev.cac_started) {
3775 +                       chandef = sdata->vif.bss_conf.chandef;
3776                         ieee80211_vif_release_channel(sdata);
3777                         cfg80211_cac_event(sdata->dev,
3778 +                                          &chandef,
3779                                            NL80211_RADAR_CAC_ABORTED,
3780                                            GFP_KERNEL);
3781                 }
3782 @@ -2459,14 +2462,9 @@ int ieee80211_send_action_csa(struct iee
3783                           WLAN_EID_CHAN_SWITCH_PARAM_TX_RESTRICT : 0x00;
3784                 put_unaligned_le16(WLAN_REASON_MESH_CHAN, pos); /* Reason Cd */
3785                 pos += 2;
3786 -               if (!ifmsh->pre_value)
3787 -                       ifmsh->pre_value = 1;
3788 -               else
3789 -                       ifmsh->pre_value++;
3790                 pre_value = cpu_to_le16(ifmsh->pre_value);
3791                 memcpy(pos, &pre_value, 2);             /* Precedence Value */
3792                 pos += 2;
3793 -               ifmsh->chsw_init = true;
3794         }
3795
3796         ieee80211_tx_skb(sdata, skb);
3797 --- a/net/wireless/chan.c
3798 +++ b/net/wireless/chan.c
3799 @@ -277,6 +277,32 @@ void cfg80211_set_dfs_state(struct wiphy
3800                                      width, dfs_state);
3801  }
3802
3803 +static u32 cfg80211_get_start_freq(u32 center_freq,
3804 +                                  u32 bandwidth)
3805 +{
3806 +       u32 start_freq;
3807 +
3808 +       if (bandwidth <= 20)
3809 +               start_freq = center_freq;
3810 +       else
3811 +               start_freq = center_freq - bandwidth/2 + 10;
3812 +
3813 +       return start_freq;
3814 +}
3815 +
3816 +static u32 cfg80211_get_end_freq(u32 center_freq,
3817 +                                u32 bandwidth)
3818 +{
3819 +       u32 end_freq;
3820 +
3821 +       if (bandwidth <= 20)
3822 +               end_freq = center_freq;
3823 +       else
3824 +               end_freq = center_freq + bandwidth/2 - 10;
3825 +
3826 +       return end_freq;
3827 +}
3828 +
3829  static int cfg80211_get_chans_dfs_required(struct wiphy *wiphy,
3830                                             u32 center_freq,
3831                                             u32 bandwidth)
3832 @@ -284,13 +310,8 @@ static int cfg80211_get_chans_dfs_requir
3833         struct ieee80211_channel *c;
3834         u32 freq, start_freq, end_freq;
3835
3836 -       if (bandwidth <= 20) {
3837 -               start_freq = center_freq;
3838 -               end_freq = center_freq;
3839 -       } else {
3840 -               start_freq = center_freq - bandwidth/2 + 10;
3841 -               end_freq = center_freq + bandwidth/2 - 10;
3842 -       }
3843 +       start_freq = cfg80211_get_start_freq(center_freq, bandwidth);
3844 +       end_freq = cfg80211_get_end_freq(center_freq, bandwidth);
3845
3846         for (freq = start_freq; freq <= end_freq; freq += 20) {
3847                 c = ieee80211_get_channel(wiphy, freq);
3848 @@ -330,33 +351,159 @@ int cfg80211_chandef_dfs_required(struct
3849  }
3850  EXPORT_SYMBOL(cfg80211_chandef_dfs_required);
3851
3852 -static bool cfg80211_secondary_chans_ok(struct wiphy *wiphy,
3853 -                                       u32 center_freq, u32 bandwidth,
3854 -                                       u32 prohibited_flags)
3855 +static int cfg80211_get_chans_dfs_usable(struct wiphy *wiphy,
3856 +                                        u32 center_freq,
3857 +                                        u32 bandwidth)
3858  {
3859         struct ieee80211_channel *c;
3860         u32 freq, start_freq, end_freq;
3861 +       int count = 0;
3862
3863 -       if (bandwidth <= 20) {
3864 -               start_freq = center_freq;
3865 -               end_freq = center_freq;
3866 -       } else {
3867 -               start_freq = center_freq - bandwidth/2 + 10;
3868 -               end_freq = center_freq + bandwidth/2 - 10;
3869 +       start_freq = cfg80211_get_start_freq(center_freq, bandwidth);
3870 +       end_freq = cfg80211_get_end_freq(center_freq, bandwidth);
3871 +
3872 +       /*
3873 +        * Check entire range of channels for the bandwidth.
3874 +        * Check all channels are DFS channels (DFS_USABLE or
3875 +        * DFS_AVAILABLE). Return number of usable channels
3876 +        * (require CAC). Allow DFS and non-DFS channel mix.
3877 +        */
3878 +       for (freq = start_freq; freq <= end_freq; freq += 20) {
3879 +               c = ieee80211_get_channel(wiphy, freq);
3880 +               if (!c)
3881 +                       return -EINVAL;
3882 +
3883 +               if (c->flags & IEEE80211_CHAN_DISABLED)
3884 +                       return -EINVAL;
3885 +
3886 +               if (c->flags & IEEE80211_CHAN_RADAR) {
3887 +                       if (c->dfs_state == NL80211_DFS_UNAVAILABLE)
3888 +                               return -EINVAL;
3889 +
3890 +                       if (c->dfs_state == NL80211_DFS_USABLE)
3891 +                               count++;
3892 +               }
3893 +       }
3894 +
3895 +       return count;
3896 +}
3897 +
3898 +bool cfg80211_chandef_dfs_usable(struct wiphy *wiphy,
3899 +                                const struct cfg80211_chan_def *chandef)
3900 +{
3901 +       int width;
3902 +       int r1, r2 = 0;
3903 +
3904 +       if (WARN_ON(!cfg80211_chandef_valid(chandef)))
3905 +               return false;
3906 +
3907 +       width = cfg80211_chandef_get_width(chandef);
3908 +       if (width < 0)
3909 +               return false;
3910 +
3911 +       r1 = cfg80211_get_chans_dfs_usable(wiphy, chandef->center_freq1,
3912 +                                         width);
3913 +
3914 +       if (r1 < 0)
3915 +               return false;
3916 +
3917 +       switch (chandef->width) {
3918 +       case NL80211_CHAN_WIDTH_80P80:
3919 +               WARN_ON(!chandef->center_freq2);
3920 +               r2 = cfg80211_get_chans_dfs_usable(wiphy,
3921 +                                                  chandef->center_freq2,
3922 +                                                  width);
3923 +               if (r2 < 0)
3924 +                       return false;
3925 +               break;
3926 +       default:
3927 +               WARN_ON(chandef->center_freq2);
3928 +               break;
3929         }
3930
3931 +       return (r1 + r2 > 0);
3932 +}
3933 +
3934 +
3935 +static bool cfg80211_get_chans_dfs_available(struct wiphy *wiphy,
3936 +                                            u32 center_freq,
3937 +                                            u32 bandwidth)
3938 +{
3939 +       struct ieee80211_channel *c;
3940 +       u32 freq, start_freq, end_freq;
3941 +
3942 +       start_freq = cfg80211_get_start_freq(center_freq, bandwidth);
3943 +       end_freq = cfg80211_get_end_freq(center_freq, bandwidth);
3944 +
3945 +       /*
3946 +        * Check entire range of channels for the bandwidth.
3947 +        * If any channel in between is disabled or has not
3948 +        * had gone through CAC return false
3949 +        */
3950         for (freq = start_freq; freq <= end_freq; freq += 20) {
3951                 c = ieee80211_get_channel(wiphy, freq);
3952                 if (!c)
3953                         return false;
3954
3955 -               /* check for radar flags */
3956 -               if ((prohibited_flags & c->flags & IEEE80211_CHAN_RADAR) &&
3957 +               if (c->flags & IEEE80211_CHAN_DISABLED)
3958 +                       return false;
3959 +
3960 +               if ((c->flags & IEEE80211_CHAN_RADAR)  &&
3961                     (c->dfs_state != NL80211_DFS_AVAILABLE))
3962                         return false;
3963 +       }
3964 +
3965 +       return true;
3966 +}
3967 +
3968 +static bool cfg80211_chandef_dfs_available(struct wiphy *wiphy,
3969 +                               const struct cfg80211_chan_def *chandef)
3970 +{
3971 +       int width;
3972 +       int r;
3973 +
3974 +       if (WARN_ON(!cfg80211_chandef_valid(chandef)))
3975 +               return false;
3976
3977 -               /* check for the other flags */
3978 -               if (c->flags & prohibited_flags & ~IEEE80211_CHAN_RADAR)
3979 +       width = cfg80211_chandef_get_width(chandef);
3980 +       if (width < 0)
3981 +               return false;
3982 +
3983 +       r = cfg80211_get_chans_dfs_available(wiphy, chandef->center_freq1,
3984 +                                            width);
3985 +
3986 +       /* If any of channels unavailable for cf1 just return */
3987 +       if (!r)
3988 +               return r;
3989 +
3990 +       switch (chandef->width) {
3991 +       case NL80211_CHAN_WIDTH_80P80:
3992 +               WARN_ON(!chandef->center_freq2);
3993 +               r = cfg80211_get_chans_dfs_available(wiphy,
3994 +                                                    chandef->center_freq2,
3995 +                                                    width);
3996 +       default:
3997 +               WARN_ON(chandef->center_freq2);
3998 +               break;
3999 +       }
4000 +
4001 +       return r;
4002 +}
4003 +
4004 +
4005 +static bool cfg80211_secondary_chans_ok(struct wiphy *wiphy,
4006 +                                       u32 center_freq, u32 bandwidth,
4007 +                                       u32 prohibited_flags)
4008 +{
4009 +       struct ieee80211_channel *c;
4010 +       u32 freq, start_freq, end_freq;
4011 +
4012 +       start_freq = cfg80211_get_start_freq(center_freq, bandwidth);
4013 +       end_freq = cfg80211_get_end_freq(center_freq, bandwidth);
4014 +
4015 +       for (freq = start_freq; freq <= end_freq; freq += 20) {
4016 +               c = ieee80211_get_channel(wiphy, freq);
4017 +               if (!c || c->flags & prohibited_flags)
4018                         return false;
4019         }
4020
4021 @@ -462,14 +609,19 @@ bool cfg80211_reg_can_beacon(struct wiph
4022                              struct cfg80211_chan_def *chandef)
4023  {
4024         bool res;
4025 +       u32 prohibited_flags = IEEE80211_CHAN_DISABLED |
4026 +                              IEEE80211_CHAN_NO_IR |
4027 +                              IEEE80211_CHAN_RADAR;
4028
4029         trace_cfg80211_reg_can_beacon(wiphy, chandef);
4030
4031 -       res = cfg80211_chandef_usable(wiphy, chandef,
4032 -                                     IEEE80211_CHAN_DISABLED |
4033 -                                     IEEE80211_CHAN_PASSIVE_SCAN |
4034 -                                     IEEE80211_CHAN_NO_IBSS |
4035 -                                     IEEE80211_CHAN_RADAR);
4036 +       if (cfg80211_chandef_dfs_required(wiphy, chandef) > 0 &&
4037 +           cfg80211_chandef_dfs_available(wiphy, chandef)) {
4038 +               /* We can skip IEEE80211_CHAN_NO_IR if chandef dfs available */
4039 +               prohibited_flags = IEEE80211_CHAN_DISABLED;
4040 +       }
4041 +
4042 +       res = cfg80211_chandef_usable(wiphy, chandef, prohibited_flags);
4043
4044         trace_cfg80211_return_bool(res);
4045         return res;
4046 --- a/net/wireless/core.h
4047 +++ b/net/wireless/core.h
4048 @@ -382,6 +382,19 @@ int cfg80211_can_use_iftype_chan(struct
4049                                  enum cfg80211_chan_mode chanmode,
4050                                  u8 radar_detect);
4051
4052 +/**
4053 + * cfg80211_chandef_dfs_usable - checks if chandef is DFS usable
4054 + * @wiphy: the wiphy to validate against
4055 + * @chandef: the channel definition to check
4056 + *
4057 + * Checks if chandef is usable and we can/need start CAC on such channel.
4058 + *
4059 + * Return: Return true if all channels available and at least
4060 + *        one channel require CAC (NL80211_DFS_USABLE)
4061 + */
4062 +bool cfg80211_chandef_dfs_usable(struct wiphy *wiphy,
4063 +                                const struct cfg80211_chan_def *chandef);
4064 +
4065  void cfg80211_set_dfs_state(struct wiphy *wiphy,
4066                             const struct cfg80211_chan_def *chandef,
4067                             enum nl80211_dfs_state dfs_state);
4068 --- a/net/wireless/genregdb.awk
4069 +++ b/net/wireless/genregdb.awk
4070 @@ -107,10 +107,13 @@ active && /^[ \t]*\(/ {
4071                 } else if (flagarray[arg] == "PTMP-ONLY") {
4072                         flags = flags "\n\t\t\tNL80211_RRF_PTMP_ONLY | "
4073                 } else if (flagarray[arg] == "PASSIVE-SCAN") {
4074 -                       flags = flags "\n\t\t\tNL80211_RRF_PASSIVE_SCAN | "
4075 +                       flags = flags "\n\t\t\tNL80211_RRF_NO_IR | "
4076                 } else if (flagarray[arg] == "NO-IBSS") {
4077 -                       flags = flags "\n\t\t\tNL80211_RRF_NO_IBSS | "
4078 +                       flags = flags "\n\t\t\tNL80211_RRF_NO_IR | "
4079 +               } else if (flagarray[arg] == "NO-IR") {
4080 +                       flags = flags "\n\t\t\tNL80211_RRF_NO_IR | "
4081                 }
4082 +
4083         }
4084         flags = flags "0"
4085         printf "\t\tREG_RULE(%d, %d, %d, %d, %d, %s),\n", start, end, bw, gain, power, flags
4086 --- a/net/wireless/ibss.c
4087 +++ b/net/wireless/ibss.c
4088 @@ -274,7 +274,7 @@ int cfg80211_ibss_wext_join(struct cfg80
4089
4090                         for (i = 0; i < sband->n_channels; i++) {
4091                                 chan = &sband->channels[i];
4092 -                               if (chan->flags & IEEE80211_CHAN_NO_IBSS)
4093 +                               if (chan->flags & IEEE80211_CHAN_NO_IR)
4094                                         continue;
4095                                 if (chan->flags & IEEE80211_CHAN_DISABLED)
4096                                         continue;
4097 @@ -345,7 +345,7 @@ int cfg80211_ibss_wext_siwfreq(struct ne
4098                 chan = ieee80211_get_channel(wdev->wiphy, freq);
4099                 if (!chan)
4100                         return -EINVAL;
4101 -               if (chan->flags & IEEE80211_CHAN_NO_IBSS ||
4102 +               if (chan->flags & IEEE80211_CHAN_NO_IR ||
4103                     chan->flags & IEEE80211_CHAN_DISABLED)
4104                         return -EINVAL;
4105         }
4106 --- a/net/wireless/mesh.c
4107 +++ b/net/wireless/mesh.c
4108 @@ -141,8 +141,7 @@ int __cfg80211_join_mesh(struct cfg80211
4109
4110                         for (i = 0; i < sband->n_channels; i++) {
4111                                 chan = &sband->channels[i];
4112 -                               if (chan->flags & (IEEE80211_CHAN_NO_IBSS |
4113 -                                                  IEEE80211_CHAN_PASSIVE_SCAN |
4114 +                               if (chan->flags & (IEEE80211_CHAN_NO_IR |
4115                                                    IEEE80211_CHAN_DISABLED |
4116                                                    IEEE80211_CHAN_RADAR))
4117                                         continue;
4118 --- a/net/wireless/mlme.c
4119 +++ b/net/wireless/mlme.c
4120 @@ -763,12 +763,12 @@ void cfg80211_radar_event(struct wiphy *
4121  EXPORT_SYMBOL(cfg80211_radar_event);
4122
4123  void cfg80211_cac_event(struct net_device *netdev,
4124 +                       const struct cfg80211_chan_def *chandef,
4125                         enum nl80211_radar_event event, gfp_t gfp)
4126  {
4127         struct wireless_dev *wdev = netdev->ieee80211_ptr;
4128         struct wiphy *wiphy = wdev->wiphy;
4129         struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
4130 -       struct cfg80211_chan_def chandef;
4131         unsigned long timeout;
4132
4133         trace_cfg80211_cac_event(netdev, event);
4134 @@ -779,14 +779,12 @@ void cfg80211_cac_event(struct net_devic
4135         if (WARN_ON(!wdev->channel))
4136                 return;
4137
4138 -       cfg80211_chandef_create(&chandef, wdev->channel, NL80211_CHAN_NO_HT);
4139 -
4140         switch (event) {
4141         case NL80211_RADAR_CAC_FINISHED:
4142                 timeout = wdev->cac_start_time +
4143                           msecs_to_jiffies(IEEE80211_DFS_MIN_CAC_TIME_MS);
4144                 WARN_ON(!time_after_eq(jiffies, timeout));
4145 -               cfg80211_set_dfs_state(wiphy, &chandef, NL80211_DFS_AVAILABLE);
4146 +               cfg80211_set_dfs_state(wiphy, chandef, NL80211_DFS_AVAILABLE);
4147                 break;
4148         case NL80211_RADAR_CAC_ABORTED:
4149                 break;
4150 @@ -796,6 +794,6 @@ void cfg80211_cac_event(struct net_devic
4151         }
4152         wdev->cac_started = false;
4153
4154 -       nl80211_radar_notify(rdev, &chandef, event, netdev, gfp);
4155 +       nl80211_radar_notify(rdev, chandef, event, netdev, gfp);
4156  }
4157  EXPORT_SYMBOL(cfg80211_cac_event);
4158 --- a/net/wireless/nl80211.c
4159 +++ b/net/wireless/nl80211.c
4160 @@ -545,12 +545,12 @@ static int nl80211_msg_put_channel(struc
4161         if ((chan->flags & IEEE80211_CHAN_DISABLED) &&
4162             nla_put_flag(msg, NL80211_FREQUENCY_ATTR_DISABLED))
4163                 goto nla_put_failure;
4164 -       if ((chan->flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
4165 -           nla_put_flag(msg, NL80211_FREQUENCY_ATTR_PASSIVE_SCAN))
4166 -               goto nla_put_failure;
4167 -       if ((chan->flags & IEEE80211_CHAN_NO_IBSS) &&
4168 -           nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_IBSS))
4169 -               goto nla_put_failure;
4170 +       if (chan->flags & IEEE80211_CHAN_NO_IR) {
4171 +               if (nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_IR))
4172 +                       goto nla_put_failure;
4173 +               if (nla_put_flag(msg, __NL80211_FREQUENCY_ATTR_NO_IBSS))
4174 +                       goto nla_put_failure;
4175 +       }
4176         if (chan->flags & IEEE80211_CHAN_RADAR) {
4177                 if (nla_put_flag(msg, NL80211_FREQUENCY_ATTR_RADAR))
4178                         goto nla_put_failure;
4179 @@ -1229,7 +1229,8 @@ static int nl80211_send_wiphy(struct cfg
4180                     nla_put_flag(msg, NL80211_ATTR_TDLS_EXTERNAL_SETUP))
4181                         goto nla_put_failure;
4182                 if ((dev->wiphy.flags & WIPHY_FLAG_SUPPORTS_5_10_MHZ) &&
4183 -                   nla_put_flag(msg, WIPHY_FLAG_SUPPORTS_5_10_MHZ))
4184 +                   (nla_put_flag(msg, NL80211_ATTR_SUPPORT_5_MHZ) ||
4185 +                    nla_put_flag(msg, NL80211_ATTR_SUPPORT_10_MHZ)))
4186                         goto nla_put_failure;
4187
4188                 state->split_start++;
4189 @@ -2170,7 +2171,7 @@ static inline u64 wdev_id(struct wireles
4190  }
4191
4192  static int nl80211_send_chandef(struct sk_buff *msg,
4193 -                                struct cfg80211_chan_def *chandef)
4194 +                               const struct cfg80211_chan_def *chandef)
4195  {
4196         WARN_ON(!cfg80211_chandef_valid(chandef));
4197
4198 @@ -3219,6 +3220,7 @@ static int nl80211_start_ap(struct sk_bu
4199                         return PTR_ERR(params.acl);
4200         }
4201
4202 +       wdev_lock(wdev);
4203         err = rdev_start_ap(rdev, dev, &params);
4204         if (!err) {
4205                 wdev->preset_chandef = params.chandef;
4206 @@ -3227,6 +3229,7 @@ static int nl80211_start_ap(struct sk_bu
4207                 wdev->ssid_len = params.ssid_len;
4208                 memcpy(wdev->ssid, params.ssid, wdev->ssid_len);
4209         }
4210 +       wdev_unlock(wdev);
4211
4212         kfree(params.acl);
4213
4214 @@ -3255,7 +3258,11 @@ static int nl80211_set_beacon(struct sk_
4215         if (err)
4216                 return err;
4217
4218 -       return rdev_change_beacon(rdev, dev, &params);
4219 +       wdev_lock(wdev);
4220 +       err = rdev_change_beacon(rdev, dev, &params);
4221 +       wdev_unlock(wdev);
4222 +
4223 +       return err;
4224  }
4225
4226  static int nl80211_stop_ap(struct sk_buff *skb, struct genl_info *info)
4227 @@ -4461,7 +4468,9 @@ static int nl80211_set_bss(struct sk_buf
4228  {
4229         struct cfg80211_registered_device *rdev = info->user_ptr[0];
4230         struct net_device *dev = info->user_ptr[1];
4231 +       struct wireless_dev *wdev = dev->ieee80211_ptr;
4232         struct bss_parameters params;
4233 +       int err;
4234
4235         memset(&params, 0, sizeof(params));
4236         /* default to not changing parameters */
4237 @@ -4527,7 +4536,11 @@ static int nl80211_set_bss(struct sk_buf
4238             dev->ieee80211_ptr->iftype != NL80211_IFTYPE_P2P_GO)
4239                 return -EOPNOTSUPP;
4240
4241 -       return rdev_change_bss(rdev, dev, &params);
4242 +       wdev_lock(wdev);
4243 +       err = rdev_change_bss(rdev, dev, &params);
4244 +       wdev_unlock(wdev);
4245 +
4246 +       return err;
4247  }
4248
4249  static const struct nla_policy reg_rule_policy[NL80211_REG_RULE_ATTR_MAX + 1] = {
4250 @@ -5653,7 +5666,7 @@ static int nl80211_start_radar_detection
4251         if (err == 0)
4252                 return -EINVAL;
4253
4254 -       if (chandef.chan->dfs_state != NL80211_DFS_USABLE)
4255 +       if (!cfg80211_chandef_dfs_usable(wdev->wiphy, &chandef))
4256                 return -EINVAL;
4257
4258         if (!rdev->ops->start_radar_detection)
4259 @@ -5793,7 +5806,11 @@ skip_beacons:
4260         if (info->attrs[NL80211_ATTR_CH_SWITCH_BLOCK_TX])
4261                 params.block_tx = true;
4262
4263 -       return rdev_channel_switch(rdev, dev, &params);
4264 +       wdev_lock(wdev);
4265 +       err = rdev_channel_switch(rdev, dev, &params);
4266 +       wdev_unlock(wdev);
4267 +
4268 +       return err;
4269  }
4270
4271  static int nl80211_send_bss(struct sk_buff *msg, struct netlink_callback *cb,
4272 @@ -10809,21 +10826,18 @@ void cfg80211_ch_switch_notify(struct ne
4273         struct wiphy *wiphy = wdev->wiphy;
4274         struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
4275
4276 -       trace_cfg80211_ch_switch_notify(dev, chandef);
4277 +       ASSERT_WDEV_LOCK(wdev);
4278
4279 -       wdev_lock(wdev);
4280 +       trace_cfg80211_ch_switch_notify(dev, chandef);
4281
4282         if (WARN_ON(wdev->iftype != NL80211_IFTYPE_AP &&
4283                     wdev->iftype != NL80211_IFTYPE_P2P_GO &&
4284                     wdev->iftype != NL80211_IFTYPE_ADHOC &&
4285                     wdev->iftype != NL80211_IFTYPE_MESH_POINT))
4286 -               goto out;
4287 +               return;
4288
4289         wdev->channel = chandef->chan;
4290         nl80211_ch_switch_notify(rdev, dev, chandef, GFP_KERNEL);
4291 -out:
4292 -       wdev_unlock(wdev);
4293 -       return;
4294  }
4295  EXPORT_SYMBOL(cfg80211_ch_switch_notify);
4296
4297 @@ -10882,7 +10896,7 @@ EXPORT_SYMBOL(cfg80211_cqm_txe_notify);
4298
4299  void
4300  nl80211_radar_notify(struct cfg80211_registered_device *rdev,
4301 -                    struct cfg80211_chan_def *chandef,
4302 +                    const struct cfg80211_chan_def *chandef,
4303                      enum nl80211_radar_event event,
4304                      struct net_device *netdev, gfp_t gfp)
4305  {
4306 --- a/net/wireless/nl80211.h
4307 +++ b/net/wireless/nl80211.h
4308 @@ -70,7 +70,7 @@ int nl80211_send_mgmt(struct cfg80211_re
4309
4310  void
4311  nl80211_radar_notify(struct cfg80211_registered_device *rdev,
4312 -                    struct cfg80211_chan_def *chandef,
4313 +                    const struct cfg80211_chan_def *chandef,
4314                      enum nl80211_radar_event event,
4315                      struct net_device *netdev, gfp_t gfp);
4316
4317 --- a/net/wireless/reg.c
4318 +++ b/net/wireless/reg.c
4319 @@ -163,35 +163,29 @@ static const struct ieee80211_regdomain
4320                 REG_RULE(2412-10, 2462+10, 40, 6, 20, 0),
4321                 /* IEEE 802.11b/g, channels 12..13. */
4322                 REG_RULE(2467-10, 2472+10, 40, 6, 20,
4323 -                       NL80211_RRF_PASSIVE_SCAN |
4324 -                       NL80211_RRF_NO_IBSS),
4325 +                       NL80211_RRF_NO_IR),
4326                 /* IEEE 802.11 channel 14 - Only JP enables
4327                  * this and for 802.11b only */
4328                 REG_RULE(2484-10, 2484+10, 20, 6, 20,
4329 -                       NL80211_RRF_PASSIVE_SCAN |
4330 -                       NL80211_RRF_NO_IBSS |
4331 +                       NL80211_RRF_NO_IR |
4332                         NL80211_RRF_NO_OFDM),
4333                 /* IEEE 802.11a, channel 36..48 */
4334                 REG_RULE(5180-10, 5240+10, 160, 6, 20,
4335 -                        NL80211_RRF_PASSIVE_SCAN |
4336 -                        NL80211_RRF_NO_IBSS),
4337 +                        NL80211_RRF_NO_IR),
4338
4339                 /* IEEE 802.11a, channel 52..64 - DFS required */
4340                 REG_RULE(5260-10, 5320+10, 160, 6, 20,
4341 -                       NL80211_RRF_PASSIVE_SCAN |
4342 -                       NL80211_RRF_NO_IBSS |
4343 +                       NL80211_RRF_NO_IR |
4344                         NL80211_RRF_DFS),
4345
4346                 /* IEEE 802.11a, channel 100..144 - DFS required */
4347                 REG_RULE(5500-10, 5720+10, 160, 6, 20,
4348 -                       NL80211_RRF_PASSIVE_SCAN |
4349 -                       NL80211_RRF_NO_IBSS |
4350 +                       NL80211_RRF_NO_IR |
4351                         NL80211_RRF_DFS),
4352
4353                 /* IEEE 802.11a, channel 149..165 */
4354                 REG_RULE(5745-10, 5825+10, 80, 6, 20,
4355 -                       NL80211_RRF_PASSIVE_SCAN |
4356 -                       NL80211_RRF_NO_IBSS),
4357 +                       NL80211_RRF_NO_IR),
4358
4359                 /* IEEE 802.11ad (60gHz), channels 1..3 */
4360                 REG_RULE(56160+2160*1-1080, 56160+2160*3+1080, 2160, 0, 0, 0),
4361 @@ -698,10 +692,8 @@ regdom_intersect(const struct ieee80211_
4362  static u32 map_regdom_flags(u32 rd_flags)
4363  {
4364         u32 channel_flags = 0;
4365 -       if (rd_flags & NL80211_RRF_PASSIVE_SCAN)
4366 -               channel_flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4367 -       if (rd_flags & NL80211_RRF_NO_IBSS)
4368 -               channel_flags |= IEEE80211_CHAN_NO_IBSS;
4369 +       if (rd_flags & NL80211_RRF_NO_IR_ALL)
4370 +               channel_flags |= IEEE80211_CHAN_NO_IR;
4371         if (rd_flags & NL80211_RRF_DFS)
4372                 channel_flags |= IEEE80211_CHAN_RADAR;
4373         if (rd_flags & NL80211_RRF_NO_OFDM)
4374 @@ -1066,13 +1058,8 @@ static void handle_reg_beacon(struct wip
4375         chan_before.center_freq = chan->center_freq;
4376         chan_before.flags = chan->flags;
4377
4378 -       if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN) {
4379 -               chan->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
4380 -               channel_changed = true;
4381 -       }
4382 -
4383 -       if (chan->flags & IEEE80211_CHAN_NO_IBSS) {
4384 -               chan->flags &= ~IEEE80211_CHAN_NO_IBSS;
4385 +       if (chan->flags & IEEE80211_CHAN_NO_IR) {
4386 +               chan->flags &= ~IEEE80211_CHAN_NO_IR;
4387                 channel_changed = true;
4388         }
4389
4390 --- /dev/null
4391 +++ b/drivers/net/wireless/ath/ath9k/ar9003_wow.c
4392 @@ -0,0 +1,422 @@
4393 +/*
4394 + * Copyright (c) 2012 Qualcomm Atheros, Inc.
4395 + *
4396 + * Permission to use, copy, modify, and/or distribute this software for any
4397 + * purpose with or without fee is hereby granted, provided that the above
4398 + * copyright notice and this permission notice appear in all copies.
4399 + *
4400 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
4401 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
4402 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
4403 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
4404 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
4405 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
4406 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
4407 + */
4408 +
4409 +#include <linux/export.h>
4410 +#include "ath9k.h"
4411 +#include "reg.h"
4412 +#include "hw-ops.h"
4413 +
4414 +const char *ath9k_hw_wow_event_to_string(u32 wow_event)
4415 +{
4416 +       if (wow_event & AH_WOW_MAGIC_PATTERN_EN)
4417 +               return "Magic pattern";
4418 +       if (wow_event & AH_WOW_USER_PATTERN_EN)
4419 +               return "User pattern";
4420 +       if (wow_event & AH_WOW_LINK_CHANGE)
4421 +               return "Link change";
4422 +       if (wow_event & AH_WOW_BEACON_MISS)
4423 +               return "Beacon miss";
4424 +
4425 +       return  "unknown reason";
4426 +}
4427 +EXPORT_SYMBOL(ath9k_hw_wow_event_to_string);
4428 +
4429 +static void ath9k_hw_set_powermode_wow_sleep(struct ath_hw *ah)
4430 +{
4431 +       struct ath_common *common = ath9k_hw_common(ah);
4432 +
4433 +       REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
4434 +
4435 +       /* set rx disable bit */
4436 +       REG_WRITE(ah, AR_CR, AR_CR_RXD);
4437 +
4438 +       if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0, AH_WAIT_TIMEOUT)) {
4439 +               ath_err(common, "Failed to stop Rx DMA in 10ms AR_CR=0x%08x AR_DIAG_SW=0x%08x\n",
4440 +                       REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW));
4441 +               return;
4442 +       }
4443 +
4444 +       REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON_INT);
4445 +}
4446 +
4447 +static void ath9k_wow_create_keep_alive_pattern(struct ath_hw *ah)
4448 +{
4449 +       struct ath_common *common = ath9k_hw_common(ah);
4450 +       u8 sta_mac_addr[ETH_ALEN], ap_mac_addr[ETH_ALEN];
4451 +       u32 ctl[13] = {0};
4452 +       u32 data_word[KAL_NUM_DATA_WORDS];
4453 +       u8 i;
4454 +       u32 wow_ka_data_word0;
4455 +
4456 +       memcpy(sta_mac_addr, common->macaddr, ETH_ALEN);
4457 +       memcpy(ap_mac_addr, common->curbssid, ETH_ALEN);
4458 +
4459 +       /* set the transmit buffer */
4460 +       ctl[0] = (KAL_FRAME_LEN | (MAX_RATE_POWER << 16));
4461 +       ctl[1] = 0;
4462 +       ctl[3] = 0xb;   /* OFDM_6M hardware value for this rate */
4463 +       ctl[4] = 0;
4464 +       ctl[7] = (ah->txchainmask) << 2;
4465 +       ctl[2] = 0xf << 16; /* tx_tries 0 */
4466 +
4467 +       for (i = 0; i < KAL_NUM_DESC_WORDS; i++)
4468 +               REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
4469 +
4470 +       REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
4471 +
4472 +       data_word[0] = (KAL_FRAME_TYPE << 2) | (KAL_FRAME_SUB_TYPE << 4) |
4473 +                      (KAL_TO_DS << 8) | (KAL_DURATION_ID << 16);
4474 +       data_word[1] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
4475 +                      (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
4476 +       data_word[2] = (sta_mac_addr[1] << 24) | (sta_mac_addr[0] << 16) |
4477 +                      (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
4478 +       data_word[3] = (sta_mac_addr[5] << 24) | (sta_mac_addr[4] << 16) |
4479 +                      (sta_mac_addr[3] << 8) | (sta_mac_addr[2]);
4480 +       data_word[4] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
4481 +                      (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
4482 +       data_word[5] = (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
4483 +
4484 +       if (AR_SREV_9462_20(ah)) {
4485 +               /* AR9462 2.0 has an extra descriptor word (time based
4486 +                * discard) compared to other chips */
4487 +               REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + (12 * 4)), 0);
4488 +               wow_ka_data_word0 = AR_WOW_TXBUF(13);
4489 +       } else {
4490 +               wow_ka_data_word0 = AR_WOW_TXBUF(12);
4491 +       }
4492 +
4493 +       for (i = 0; i < KAL_NUM_DATA_WORDS; i++)
4494 +               REG_WRITE(ah, (wow_ka_data_word0 + i*4), data_word[i]);
4495 +
4496 +}
4497 +
4498 +void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern,
4499 +                               u8 *user_mask, int pattern_count,
4500 +                               int pattern_len)
4501 +{
4502 +       int i;
4503 +       u32 pattern_val, mask_val;
4504 +       u32 set, clr;
4505 +
4506 +       /* FIXME: should check count by querying the hardware capability */
4507 +       if (pattern_count >= MAX_NUM_PATTERN)
4508 +               return;
4509 +
4510 +       REG_SET_BIT(ah, AR_WOW_PATTERN, BIT(pattern_count));
4511 +
4512 +       /* set the registers for pattern */
4513 +       for (i = 0; i < MAX_PATTERN_SIZE; i += 4) {
4514 +               memcpy(&pattern_val, user_pattern, 4);
4515 +               REG_WRITE(ah, (AR_WOW_TB_PATTERN(pattern_count) + i),
4516 +                         pattern_val);
4517 +               user_pattern += 4;
4518 +       }
4519 +
4520 +       /* set the registers for mask */
4521 +       for (i = 0; i < MAX_PATTERN_MASK_SIZE; i += 4) {
4522 +               memcpy(&mask_val, user_mask, 4);
4523 +               REG_WRITE(ah, (AR_WOW_TB_MASK(pattern_count) + i), mask_val);
4524 +               user_mask += 4;
4525 +       }
4526 +
4527 +       /* set the pattern length to be matched
4528 +        *
4529 +        * AR_WOW_LENGTH1_REG1
4530 +        * bit 31:24 pattern 0 length
4531 +        * bit 23:16 pattern 1 length
4532 +        * bit 15:8 pattern 2 length
4533 +        * bit 7:0 pattern 3 length
4534 +        *
4535 +        * AR_WOW_LENGTH1_REG2
4536 +        * bit 31:24 pattern 4 length
4537 +        * bit 23:16 pattern 5 length
4538 +        * bit 15:8 pattern 6 length
4539 +        * bit 7:0 pattern 7 length
4540 +        *
4541 +        * the below logic writes out the new
4542 +        * pattern length for the corresponding
4543 +        * pattern_count, while masking out the
4544 +        * other fields
4545 +        */
4546 +
4547 +       ah->wow_event_mask |= BIT(pattern_count + AR_WOW_PAT_FOUND_SHIFT);
4548 +
4549 +       if (pattern_count < 4) {
4550 +               /* Pattern 0-3 uses AR_WOW_LENGTH1 register */
4551 +               set = (pattern_len & AR_WOW_LENGTH_MAX) <<
4552 +                      AR_WOW_LEN1_SHIFT(pattern_count);
4553 +               clr = AR_WOW_LENGTH1_MASK(pattern_count);
4554 +               REG_RMW(ah, AR_WOW_LENGTH1, set, clr);
4555 +       } else {
4556 +               /* Pattern 4-7 uses AR_WOW_LENGTH2 register */
4557 +               set = (pattern_len & AR_WOW_LENGTH_MAX) <<
4558 +                      AR_WOW_LEN2_SHIFT(pattern_count);
4559 +               clr = AR_WOW_LENGTH2_MASK(pattern_count);
4560 +               REG_RMW(ah, AR_WOW_LENGTH2, set, clr);
4561 +       }
4562 +
4563 +}
4564 +EXPORT_SYMBOL(ath9k_hw_wow_apply_pattern);
4565 +
4566 +u32 ath9k_hw_wow_wakeup(struct ath_hw *ah)
4567 +{
4568 +       u32 wow_status = 0;
4569 +       u32 val = 0, rval;
4570 +
4571 +       /*
4572 +        * read the WoW status register to know
4573 +        * the wakeup reason
4574 +        */
4575 +       rval = REG_READ(ah, AR_WOW_PATTERN);
4576 +       val = AR_WOW_STATUS(rval);
4577 +
4578 +       /*
4579 +        * mask only the WoW events that we have enabled. Sometimes
4580 +        * we have spurious WoW events from the AR_WOW_PATTERN
4581 +        * register. This mask will clean it up.
4582 +        */
4583 +
4584 +       val &= ah->wow_event_mask;
4585 +
4586 +       if (val) {
4587 +               if (val & AR_WOW_MAGIC_PAT_FOUND)
4588 +                       wow_status |= AH_WOW_MAGIC_PATTERN_EN;
4589 +               if (AR_WOW_PATTERN_FOUND(val))
4590 +                       wow_status |= AH_WOW_USER_PATTERN_EN;
4591 +               if (val & AR_WOW_KEEP_ALIVE_FAIL)
4592 +                       wow_status |= AH_WOW_LINK_CHANGE;
4593 +               if (val & AR_WOW_BEACON_FAIL)
4594 +                       wow_status |= AH_WOW_BEACON_MISS;
4595 +       }
4596 +
4597 +       /*
4598 +        * set and clear WOW_PME_CLEAR registers for the chip to
4599 +        * generate next wow signal.
4600 +        * disable D3 before accessing other registers ?
4601 +        */
4602 +
4603 +       /* do we need to check the bit value 0x01000000 (7-10) ?? */
4604 +       REG_RMW(ah, AR_PCIE_PM_CTRL, AR_PMCTRL_WOW_PME_CLR,
4605 +               AR_PMCTRL_PWR_STATE_D1D3);
4606 +
4607 +       /*
4608 +        * clear all events
4609 +        */
4610 +       REG_WRITE(ah, AR_WOW_PATTERN,
4611 +                 AR_WOW_CLEAR_EVENTS(REG_READ(ah, AR_WOW_PATTERN)));
4612 +
4613 +       /*
4614 +        * restore the beacon threshold to init value
4615 +        */
4616 +       REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
4617 +
4618 +       /*
4619 +        * Restore the way the PCI-E reset, Power-On-Reset, external
4620 +        * PCIE_POR_SHORT pins are tied to its original value.
4621 +        * Previously just before WoW sleep, we untie the PCI-E
4622 +        * reset to our Chip's Power On Reset so that any PCI-E
4623 +        * reset from the bus will not reset our chip
4624 +        */
4625 +       if (ah->is_pciexpress)
4626 +               ath9k_hw_configpcipowersave(ah, false);
4627 +
4628 +       ah->wow_event_mask = 0;
4629 +
4630 +       return wow_status;
4631 +}
4632 +EXPORT_SYMBOL(ath9k_hw_wow_wakeup);
4633 +
4634 +void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable)
4635 +{
4636 +       u32 wow_event_mask;
4637 +       u32 set, clr;
4638 +
4639 +       /*
4640 +        * wow_event_mask is a mask to the AR_WOW_PATTERN register to
4641 +        * indicate which WoW events we have enabled. The WoW events
4642 +        * are from the 'pattern_enable' in this function and
4643 +        * 'pattern_count' of ath9k_hw_wow_apply_pattern()
4644 +        */
4645 +       wow_event_mask = ah->wow_event_mask;
4646 +
4647 +       /*
4648 +        * Untie Power-on-Reset from the PCI-E-Reset. When we are in
4649 +        * WOW sleep, we do want the Reset from the PCI-E to disturb
4650 +        * our hw state
4651 +        */
4652 +       if (ah->is_pciexpress) {
4653 +               /*
4654 +                * we need to untie the internal POR (power-on-reset)
4655 +                * to the external PCI-E reset. We also need to tie
4656 +                * the PCI-E Phy reset to the PCI-E reset.
4657 +                */
4658 +               set = AR_WA_RESET_EN | AR_WA_POR_SHORT;
4659 +               clr = AR_WA_UNTIE_RESET_EN | AR_WA_D3_L1_DISABLE;
4660 +               REG_RMW(ah, AR_WA, set, clr);
4661 +       }
4662 +
4663 +       /*
4664 +        * set the power states appropriately and enable PME
4665 +        */
4666 +       set = AR_PMCTRL_HOST_PME_EN | AR_PMCTRL_PWR_PM_CTRL_ENA |
4667 +             AR_PMCTRL_AUX_PWR_DET | AR_PMCTRL_WOW_PME_CLR;
4668 +
4669 +       /*
4670 +        * set and clear WOW_PME_CLEAR registers for the chip
4671 +        * to generate next wow signal.
4672 +        */
4673 +       REG_SET_BIT(ah, AR_PCIE_PM_CTRL, set);
4674 +       clr = AR_PMCTRL_WOW_PME_CLR;
4675 +       REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, clr);
4676 +
4677 +       /*
4678 +        * Setup for:
4679 +        *      - beacon misses
4680 +        *      - magic pattern
4681 +        *      - keep alive timeout
4682 +        *      - pattern matching
4683 +        */
4684 +
4685 +       /*
4686 +        * Program default values for pattern backoff, aifs/slot/KAL count,
4687 +        * beacon miss timeout, KAL timeout, etc.
4688 +        */
4689 +       set = AR_WOW_BACK_OFF_SHIFT(AR_WOW_PAT_BACKOFF);
4690 +       REG_SET_BIT(ah, AR_WOW_PATTERN, set);
4691 +
4692 +       set = AR_WOW_AIFS_CNT(AR_WOW_CNT_AIFS_CNT) |
4693 +             AR_WOW_SLOT_CNT(AR_WOW_CNT_SLOT_CNT) |
4694 +             AR_WOW_KEEP_ALIVE_CNT(AR_WOW_CNT_KA_CNT);
4695 +       REG_SET_BIT(ah, AR_WOW_COUNT, set);
4696 +
4697 +       if (pattern_enable & AH_WOW_BEACON_MISS)
4698 +               set = AR_WOW_BEACON_TIMO;
4699 +       /* We are not using beacon miss, program a large value */
4700 +       else
4701 +               set = AR_WOW_BEACON_TIMO_MAX;
4702 +
4703 +       REG_WRITE(ah, AR_WOW_BCN_TIMO, set);
4704 +
4705 +       /*
4706 +        * Keep alive timo in ms except AR9280
4707 +        */
4708 +       if (!pattern_enable)
4709 +               set = AR_WOW_KEEP_ALIVE_NEVER;
4710 +       else
4711 +               set = KAL_TIMEOUT * 32;
4712 +
4713 +       REG_WRITE(ah, AR_WOW_KEEP_ALIVE_TIMO, set);
4714 +
4715 +       /*
4716 +        * Keep alive delay in us. based on 'power on clock',
4717 +        * therefore in usec
4718 +        */
4719 +       set = KAL_DELAY * 1000;
4720 +       REG_WRITE(ah, AR_WOW_KEEP_ALIVE_DELAY, set);
4721 +
4722 +       /*
4723 +        * Create keep alive pattern to respond to beacons
4724 +        */
4725 +       ath9k_wow_create_keep_alive_pattern(ah);
4726 +
4727 +       /*
4728 +        * Configure MAC WoW Registers
4729 +        */
4730 +       set = 0;
4731 +       /* Send keep alive timeouts anyway */
4732 +       clr = AR_WOW_KEEP_ALIVE_AUTO_DIS;
4733 +
4734 +       if (pattern_enable & AH_WOW_LINK_CHANGE)
4735 +               wow_event_mask |= AR_WOW_KEEP_ALIVE_FAIL;
4736 +       else
4737 +               set = AR_WOW_KEEP_ALIVE_FAIL_DIS;
4738 +
4739 +       set = AR_WOW_KEEP_ALIVE_FAIL_DIS;
4740 +       REG_RMW(ah, AR_WOW_KEEP_ALIVE, set, clr);
4741 +
4742 +       /*
4743 +        * we are relying on a bmiss failure. ensure we have
4744 +        * enough threshold to prevent false positives
4745 +        */
4746 +       REG_RMW_FIELD(ah, AR_RSSI_THR, AR_RSSI_THR_BM_THR,
4747 +                     AR_WOW_BMISSTHRESHOLD);
4748 +
4749 +       set = 0;
4750 +       clr = 0;
4751 +
4752 +       if (pattern_enable & AH_WOW_BEACON_MISS) {
4753 +               set = AR_WOW_BEACON_FAIL_EN;
4754 +               wow_event_mask |= AR_WOW_BEACON_FAIL;
4755 +       } else {
4756 +               clr = AR_WOW_BEACON_FAIL_EN;
4757 +       }
4758 +
4759 +       REG_RMW(ah, AR_WOW_BCN_EN, set, clr);
4760 +
4761 +       set = 0;
4762 +       clr = 0;
4763 +       /*
4764 +        * Enable the magic packet registers
4765 +        */
4766 +       if (pattern_enable & AH_WOW_MAGIC_PATTERN_EN) {
4767 +               set = AR_WOW_MAGIC_EN;
4768 +               wow_event_mask |= AR_WOW_MAGIC_PAT_FOUND;
4769 +       } else {
4770 +               clr = AR_WOW_MAGIC_EN;
4771 +       }
4772 +       set |= AR_WOW_MAC_INTR_EN;
4773 +       REG_RMW(ah, AR_WOW_PATTERN, set, clr);
4774 +
4775 +       REG_WRITE(ah, AR_WOW_PATTERN_MATCH_LT_256B,
4776 +                 AR_WOW_PATTERN_SUPPORTED);
4777 +
4778 +       /*
4779 +        * Set the power states appropriately and enable PME
4780 +        */
4781 +       clr = 0;
4782 +       set = AR_PMCTRL_PWR_STATE_D1D3 | AR_PMCTRL_HOST_PME_EN |
4783 +             AR_PMCTRL_PWR_PM_CTRL_ENA;
4784 +
4785 +       clr = AR_PCIE_PM_CTRL_ENA;
4786 +       REG_RMW(ah, AR_PCIE_PM_CTRL, set, clr);
4787 +
4788 +       /*
4789 +        * this is needed to prevent the chip waking up
4790 +        * the host within 3-4 seconds with certain
4791 +        * platform/BIOS. The fix is to enable
4792 +        * D1 & D3 to match original definition and
4793 +        * also match the OTP value. Anyway this
4794 +        * is more related to SW WOW.
4795 +        */
4796 +       clr = AR_PMCTRL_PWR_STATE_D1D3;
4797 +       REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, clr);
4798 +
4799 +       set = AR_PMCTRL_PWR_STATE_D1D3_REAL;
4800 +       REG_SET_BIT(ah, AR_PCIE_PM_CTRL, set);
4801 +
4802 +       REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PRESERVE_SEQNUM);
4803 +
4804 +       /* to bring down WOW power low margin */
4805 +       set = BIT(13);
4806 +       REG_SET_BIT(ah, AR_PCIE_PHY_REG3, set);
4807 +       /* HW WoW */
4808 +       clr = BIT(5);
4809 +       REG_CLR_BIT(ah, AR_PCU_MISC_MODE3, clr);
4810 +
4811 +       ath9k_hw_set_powermode_wow_sleep(ah);
4812 +       ah->wow_event_mask = wow_event_mask;
4813 +}
4814 +EXPORT_SYMBOL(ath9k_hw_wow_enable);
4815 --- /dev/null
4816 +++ b/drivers/net/wireless/ath/ath9k/tx99.c
4817 @@ -0,0 +1,263 @@
4818 +/*
4819 + * Copyright (c) 2013 Qualcomm Atheros, Inc.
4820 + *
4821 + * Permission to use, copy, modify, and/or distribute this software for any
4822 + * purpose with or without fee is hereby granted, provided that the above
4823 + * copyright notice and this permission notice appear in all copies.
4824 + *
4825 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
4826 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
4827 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
4828 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
4829 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
4830 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
4831 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
4832 + */
4833 +
4834 +#include "ath9k.h"
4835 +
4836 +static void ath9k_tx99_stop(struct ath_softc *sc)
4837 +{
4838 +       struct ath_hw *ah = sc->sc_ah;
4839 +       struct ath_common *common = ath9k_hw_common(ah);
4840 +
4841 +       ath_drain_all_txq(sc);
4842 +       ath_startrecv(sc);
4843 +
4844 +       ath9k_hw_set_interrupts(ah);
4845 +       ath9k_hw_enable_interrupts(ah);
4846 +
4847 +       ieee80211_wake_queues(sc->hw);
4848 +
4849 +       kfree_skb(sc->tx99_skb);
4850 +       sc->tx99_skb = NULL;
4851 +       sc->tx99_state = false;
4852 +
4853 +       ath9k_hw_tx99_stop(sc->sc_ah);
4854 +       ath_dbg(common, XMIT, "TX99 stopped\n");
4855 +}
4856 +
4857 +static struct sk_buff *ath9k_build_tx99_skb(struct ath_softc *sc)
4858 +{
4859 +       static u8 PN9Data[] = {0xff, 0x87, 0xb8, 0x59, 0xb7, 0xa1, 0xcc, 0x24,
4860 +                              0x57, 0x5e, 0x4b, 0x9c, 0x0e, 0xe9, 0xea, 0x50,
4861 +                              0x2a, 0xbe, 0xb4, 0x1b, 0xb6, 0xb0, 0x5d, 0xf1,
4862 +                              0xe6, 0x9a, 0xe3, 0x45, 0xfd, 0x2c, 0x53, 0x18,
4863 +                              0x0c, 0xca, 0xc9, 0xfb, 0x49, 0x37, 0xe5, 0xa8,
4864 +                              0x51, 0x3b, 0x2f, 0x61, 0xaa, 0x72, 0x18, 0x84,
4865 +                              0x02, 0x23, 0x23, 0xab, 0x63, 0x89, 0x51, 0xb3,
4866 +                              0xe7, 0x8b, 0x72, 0x90, 0x4c, 0xe8, 0xfb, 0xc0};
4867 +       u32 len = 1200;
4868 +       struct ieee80211_hw *hw = sc->hw;
4869 +       struct ieee80211_hdr *hdr;
4870 +       struct ieee80211_tx_info *tx_info;
4871 +       struct sk_buff *skb;
4872 +
4873 +       skb = alloc_skb(len, GFP_KERNEL);
4874 +       if (!skb)
4875 +               return NULL;
4876 +
4877 +       skb_put(skb, len);
4878 +
4879 +       memset(skb->data, 0, len);
4880 +
4881 +       hdr = (struct ieee80211_hdr *)skb->data;
4882 +       hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA);
4883 +       hdr->duration_id = 0;
4884 +
4885 +       memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
4886 +       memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
4887 +       memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
4888 +
4889 +       hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
4890 +
4891 +       tx_info = IEEE80211_SKB_CB(skb);
4892 +       memset(tx_info, 0, sizeof(*tx_info));
4893 +       tx_info->band = hw->conf.chandef.chan->band;
4894 +       tx_info->flags = IEEE80211_TX_CTL_NO_ACK;
4895 +       tx_info->control.vif = sc->tx99_vif;
4896 +
4897 +       memcpy(skb->data + sizeof(*hdr), PN9Data, sizeof(PN9Data));
4898 +
4899 +       return skb;
4900 +}
4901 +
4902 +static void ath9k_tx99_deinit(struct ath_softc *sc)
4903 +{
4904 +       ath_reset(sc);
4905 +
4906 +       ath9k_ps_wakeup(sc);
4907 +       ath9k_tx99_stop(sc);
4908 +       ath9k_ps_restore(sc);
4909 +}
4910 +
4911 +static int ath9k_tx99_init(struct ath_softc *sc)
4912 +{
4913 +       struct ieee80211_hw *hw = sc->hw;
4914 +       struct ath_hw *ah = sc->sc_ah;
4915 +       struct ath_common *common = ath9k_hw_common(ah);
4916 +       struct ath_tx_control txctl;
4917 +       int r;
4918 +
4919 +       if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
4920 +               ath_err(common,
4921 +                       "driver is in invalid state unable to use TX99");
4922 +               return -EINVAL;
4923 +       }
4924 +
4925 +       sc->tx99_skb = ath9k_build_tx99_skb(sc);
4926 +       if (!sc->tx99_skb)
4927 +               return -ENOMEM;
4928 +
4929 +       memset(&txctl, 0, sizeof(txctl));
4930 +       txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO];
4931 +
4932 +       ath_reset(sc);
4933 +
4934 +       ath9k_ps_wakeup(sc);
4935 +
4936 +       ath9k_hw_disable_interrupts(ah);
4937 +       atomic_set(&ah->intr_ref_cnt, -1);
4938 +       ath_drain_all_txq(sc);
4939 +       ath_stoprecv(sc);
4940 +
4941 +       sc->tx99_state = true;
4942 +
4943 +       ieee80211_stop_queues(hw);
4944 +
4945 +       if (sc->tx99_power == MAX_RATE_POWER + 1)
4946 +               sc->tx99_power = MAX_RATE_POWER;
4947 +
4948 +       ath9k_hw_tx99_set_txpower(ah, sc->tx99_power);
4949 +       r = ath9k_tx99_send(sc, sc->tx99_skb, &txctl);
4950 +       if (r) {
4951 +               ath_dbg(common, XMIT, "Failed to xmit TX99 skb\n");
4952 +               return r;
4953 +       }
4954 +
4955 +       ath_dbg(common, XMIT, "TX99 xmit started using %d ( %ddBm)\n",
4956 +               sc->tx99_power,
4957 +               sc->tx99_power / 2);
4958 +
4959 +       /* We leave the harware awake as it will be chugging on */
4960 +
4961 +       return 0;
4962 +}
4963 +
4964 +static ssize_t read_file_tx99(struct file *file, char __user *user_buf,
4965 +                             size_t count, loff_t *ppos)
4966 +{
4967 +       struct ath_softc *sc = file->private_data;
4968 +       char buf[3];
4969 +       unsigned int len;
4970 +
4971 +       len = sprintf(buf, "%d\n", sc->tx99_state);
4972 +       return simple_read_from_buffer(user_buf, count, ppos, buf, len);
4973 +}
4974 +
4975 +static ssize_t write_file_tx99(struct file *file, const char __user *user_buf,
4976 +                              size_t count, loff_t *ppos)
4977 +{
4978 +       struct ath_softc *sc = file->private_data;
4979 +       struct ath_common *common = ath9k_hw_common(sc->sc_ah);
4980 +       char buf[32];
4981 +       bool start;
4982 +       ssize_t len;
4983 +       int r;
4984 +
4985 +       if (sc->nvifs > 1)
4986 +               return -EOPNOTSUPP;
4987 +
4988 +       len = min(count, sizeof(buf) - 1);
4989 +       if (copy_from_user(buf, user_buf, len))
4990 +               return -EFAULT;
4991 +
4992 +       if (strtobool(buf, &start))
4993 +               return -EINVAL;
4994 +
4995 +       if (start == sc->tx99_state) {
4996 +               if (!start)
4997 +                       return count;
4998 +               ath_dbg(common, XMIT, "Resetting TX99\n");
4999 +               ath9k_tx99_deinit(sc);
5000 +       }
5001 +
5002 +       if (!start) {
5003 +               ath9k_tx99_deinit(sc);
5004 +               return count;
5005 +       }
5006 +
5007 +       r = ath9k_tx99_init(sc);
5008 +       if (r)
5009 +               return r;
5010 +
5011 +       return count;
5012 +}
5013 +
5014 +static const struct file_operations fops_tx99 = {
5015 +       .read = read_file_tx99,
5016 +       .write = write_file_tx99,
5017 +       .open = simple_open,
5018 +       .owner = THIS_MODULE,
5019 +       .llseek = default_llseek,
5020 +};
5021 +
5022 +static ssize_t read_file_tx99_power(struct file *file,
5023 +                                   char __user *user_buf,
5024 +                                   size_t count, loff_t *ppos)
5025 +{
5026 +       struct ath_softc *sc = file->private_data;
5027 +       char buf[32];
5028 +       unsigned int len;
5029 +
5030 +       len = sprintf(buf, "%d (%d dBm)\n",
5031 +                     sc->tx99_power,
5032 +                     sc->tx99_power / 2);
5033 +
5034 +       return simple_read_from_buffer(user_buf, count, ppos, buf, len);
5035 +}
5036 +
5037 +static ssize_t write_file_tx99_power(struct file *file,
5038 +                                    const char __user *user_buf,
5039 +                                    size_t count, loff_t *ppos)
5040 +{
5041 +       struct ath_softc *sc = file->private_data;
5042 +       int r;
5043 +       u8 tx_power;
5044 +
5045 +       r = kstrtou8_from_user(user_buf, count, 0, &tx_power);
5046 +       if (r)
5047 +               return r;
5048 +
5049 +       if (tx_power > MAX_RATE_POWER)
5050 +               return -EINVAL;
5051 +
5052 +       sc->tx99_power = tx_power;
5053 +
5054 +       ath9k_ps_wakeup(sc);
5055 +       ath9k_hw_tx99_set_txpower(sc->sc_ah, sc->tx99_power);
5056 +       ath9k_ps_restore(sc);
5057 +
5058 +       return count;
5059 +}
5060 +
5061 +static const struct file_operations fops_tx99_power = {
5062 +       .read = read_file_tx99_power,
5063 +       .write = write_file_tx99_power,
5064 +       .open = simple_open,
5065 +       .owner = THIS_MODULE,
5066 +       .llseek = default_llseek,
5067 +};
5068 +
5069 +void ath9k_tx99_init_debug(struct ath_softc *sc)
5070 +{
5071 +       if (!AR_SREV_9300_20_OR_LATER(sc->sc_ah))
5072 +               return;
5073 +
5074 +       debugfs_create_file("tx99", S_IRUSR | S_IWUSR,
5075 +                           sc->debug.debugfs_phy, sc,
5076 +                           &fops_tx99);
5077 +       debugfs_create_file("tx99_power", S_IRUSR | S_IWUSR,
5078 +                           sc->debug.debugfs_phy, sc,
5079 +                           &fops_tx99_power);
5080 +}
5081 --- a/drivers/net/wireless/ath/ath9k/dfs_debug.c
5082 +++ b/drivers/net/wireless/ath/ath9k/dfs_debug.c
5083 @@ -44,14 +44,20 @@ static ssize_t read_file_dfs(struct file
5084         if (buf == NULL)
5085                 return -ENOMEM;
5086
5087 -       if (sc->dfs_detector)
5088 -               dfs_pool_stats = sc->dfs_detector->get_stats(sc->dfs_detector);
5089 -
5090         len += scnprintf(buf + len, size - len, "DFS support for "
5091                          "macVersion = 0x%x, macRev = 0x%x: %s\n",
5092                          hw_ver->macVersion, hw_ver->macRev,
5093                          (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_DFS) ?
5094                                         "enabled" : "disabled");
5095 +
5096 +       if (!sc->dfs_detector) {
5097 +               len += scnprintf(buf + len, size - len,
5098 +                               "DFS detector not enabled\n");
5099 +               goto exit;
5100 +       }
5101 +
5102 +       dfs_pool_stats = sc->dfs_detector->get_stats(sc->dfs_detector);
5103 +
5104         len += scnprintf(buf + len, size - len, "Pulse detector statistics:\n");
5105         ATH9K_DFS_STAT("pulse events reported   ", pulses_total);
5106         ATH9K_DFS_STAT("invalid pulse events    ", pulses_no_dfs);
5107 @@ -76,6 +82,7 @@ static ssize_t read_file_dfs(struct file
5108         ATH9K_DFS_POOL_STAT("Seqs. alloc error       ", pseq_alloc_error);
5109         ATH9K_DFS_POOL_STAT("Seqs. in use            ", pseq_used);
5110
5111 +exit:
5112         if (len > size)
5113                 len = size;
5114
5115 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
5116 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
5117 @@ -641,11 +641,12 @@ static void ar9003_hw_override_ini(struc
5118                 else
5119                         ah->enabled_cals &= ~TX_IQ_CAL;
5120
5121 -               if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
5122 -                       ah->enabled_cals |= TX_CL_CAL;
5123 -               else
5124 -                       ah->enabled_cals &= ~TX_CL_CAL;
5125         }
5126 +
5127 +       if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
5128 +               ah->enabled_cals |= TX_CL_CAL;
5129 +       else
5130 +               ah->enabled_cals &= ~TX_CL_CAL;
5131  }
5132
5133  static void ar9003_hw_prog_ini(struct ath_hw *ah,
5134 @@ -701,6 +702,54 @@ static int ar9550_hw_get_modes_txgain_in
5135         return ret;
5136  }
5137
5138 +static void ar9003_doubler_fix(struct ath_hw *ah)
5139 +{
5140 +       if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9550(ah)) {
5141 +               REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2,
5142 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
5143 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
5144 +               REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2,
5145 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
5146 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
5147 +               REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2,
5148 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
5149 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
5150 +
5151 +               udelay(200);
5152 +
5153 +               REG_CLR_BIT(ah, AR_PHY_65NM_CH0_RXTX2,
5154 +                           AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
5155 +               REG_CLR_BIT(ah, AR_PHY_65NM_CH1_RXTX2,
5156 +                           AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
5157 +               REG_CLR_BIT(ah, AR_PHY_65NM_CH2_RXTX2,
5158 +                           AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
5159 +
5160 +               udelay(1);
5161 +
5162 +               REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX2,
5163 +                             AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
5164 +               REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX2,
5165 +                             AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
5166 +               REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX2,
5167 +                             AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
5168 +
5169 +               udelay(200);
5170 +
5171 +               REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_SYNTH12,
5172 +                             AR_PHY_65NM_CH0_SYNTH12_VREFMUL3, 0xf);
5173 +
5174 +               REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, 0,
5175 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
5176 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
5177 +               REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2, 0,
5178 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
5179 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
5180 +               REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2, 0,
5181 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
5182 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
5183 +       }
5184 +}
5185 +
5186  static int ar9003_hw_process_ini(struct ath_hw *ah,
5187                                  struct ath9k_channel *chan)
5188  {
5189 @@ -726,6 +775,8 @@ static int ar9003_hw_process_ini(struct
5190                                            modesIndex);
5191         }
5192
5193 +       ar9003_doubler_fix(ah);
5194 +
5195         /*
5196          * RXGAIN initvals.
5197          */
5198 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
5199 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
5200 @@ -656,13 +656,24 @@
5201  #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT   ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x00000001 : 0x00000002)
5202  #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT_S ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0 : 1)
5203  #define AR_PHY_65NM_CH0_SYNTH7      0x16098
5204 +#define AR_PHY_65NM_CH0_SYNTH12     0x160ac
5205  #define AR_PHY_65NM_CH0_BIAS1       0x160c0
5206  #define AR_PHY_65NM_CH0_BIAS2       0x160c4
5207  #define AR_PHY_65NM_CH0_BIAS4       0x160cc
5208 +#define AR_PHY_65NM_CH0_RXTX2       0x16104
5209 +#define AR_PHY_65NM_CH1_RXTX2       0x16504
5210 +#define AR_PHY_65NM_CH2_RXTX2       0x16904
5211  #define AR_PHY_65NM_CH0_RXTX4       0x1610c
5212  #define AR_PHY_65NM_CH1_RXTX4       0x1650c
5213  #define AR_PHY_65NM_CH2_RXTX4       0x1690c
5214
5215 +#define AR_PHY_65NM_CH0_SYNTH12_VREFMUL3           0x00780000
5216 +#define AR_PHY_65NM_CH0_SYNTH12_VREFMUL3_S         19
5217 +#define AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK         0x00000004
5218 +#define AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S       2
5219 +#define AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK        0x00000008
5220 +#define AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S      3
5221 +
5222  #define AR_CH0_TOP     (AR_SREV_9300(ah) ? 0x16288 : \
5223                          (((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x1628c : 0x16280)))
5224  #define AR_CH0_TOP_XPABIASLVL (AR_SREV_9550(ah) ? 0x3c0 : 0x300)
5225 --- a/drivers/net/wireless/rt2x00/rt2x00dev.c
5226 +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
5227 @@ -181,6 +181,7 @@ static void rt2x00lib_autowakeup(struct
5228  static void rt2x00lib_bc_buffer_iter(void *data, u8 *mac,
5229                                      struct ieee80211_vif *vif)
5230  {
5231 +       struct ieee80211_tx_control control = {};
5232         struct rt2x00_dev *rt2x00dev = data;
5233         struct sk_buff *skb;
5234
5235 @@ -195,7 +196,7 @@ static void rt2x00lib_bc_buffer_iter(voi
5236          */
5237         skb = ieee80211_get_buffered_bc(rt2x00dev->hw, vif);
5238         while (skb) {
5239 -               rt2x00mac_tx(rt2x00dev->hw, NULL, skb);
5240 +               rt2x00mac_tx(rt2x00dev->hw, &control, skb);
5241                 skb = ieee80211_get_buffered_bc(rt2x00dev->hw, vif);
5242         }
5243  }
5244 --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
5245 +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
5246 @@ -1040,14 +1040,14 @@ static void ar9003_hw_cl_cal_post_proc(s
5247         }
5248  }
5249
5250 -static bool ar9003_hw_init_cal(struct ath_hw *ah,
5251 -                              struct ath9k_channel *chan)
5252 +static bool ar9003_hw_init_cal_pcoem(struct ath_hw *ah,
5253 +                                    struct ath9k_channel *chan)
5254  {
5255         struct ath_common *common = ath9k_hw_common(ah);
5256         struct ath9k_hw_cal_data *caldata = ah->caldata;
5257         bool txiqcal_done = false;
5258         bool is_reusable = true, status = true;
5259 -       bool run_rtt_cal = false, run_agc_cal, sep_iq_cal = false;
5260 +       bool run_rtt_cal = false, run_agc_cal;
5261         bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
5262         u32 rx_delay = 0;
5263         u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
5264 @@ -1119,22 +1119,12 @@ static bool ar9003_hw_init_cal(struct at
5265                         REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
5266                                     AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
5267                 txiqcal_done = run_agc_cal = true;
5268 -       } else if (caldata && !test_bit(TXIQCAL_DONE, &caldata->cal_flags)) {
5269 -               run_agc_cal = true;
5270 -               sep_iq_cal = true;
5271         }
5272
5273  skip_tx_iqcal:
5274         if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
5275                 ar9003_mci_init_cal_req(ah, &is_reusable);
5276
5277 -       if (sep_iq_cal) {
5278 -               txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
5279 -               REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
5280 -               udelay(5);
5281 -               REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
5282 -       }
5283 -
5284         if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) {
5285                 rx_delay = REG_READ(ah, AR_PHY_RX_DELAY);
5286                 /* Disable BB_active */
5287 @@ -1228,13 +1218,109 @@ skip_tx_iqcal:
5288         return true;
5289  }
5290
5291 +static bool ar9003_hw_init_cal_soc(struct ath_hw *ah,
5292 +                                  struct ath9k_channel *chan)
5293 +{
5294 +       struct ath_common *common = ath9k_hw_common(ah);
5295 +       struct ath9k_hw_cal_data *caldata = ah->caldata;
5296 +       bool txiqcal_done = false;
5297 +       bool is_reusable = true, status = true;
5298 +       bool run_agc_cal = false, sep_iq_cal = false;
5299 +
5300 +       /* Use chip chainmask only for calibration */
5301 +       ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask);
5302 +
5303 +       if (ah->enabled_cals & TX_CL_CAL) {
5304 +               REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
5305 +               run_agc_cal = true;
5306 +       }
5307 +
5308 +       if (IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))
5309 +               goto skip_tx_iqcal;
5310 +
5311 +       /* Do Tx IQ Calibration */
5312 +       REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
5313 +                     AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
5314 +                     DELPT);
5315 +
5316 +       /*
5317 +        * For AR9485 or later chips, TxIQ cal runs as part of
5318 +        * AGC calibration. Specifically, AR9550 in SoC chips.
5319 +        */
5320 +       if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) {
5321 +               txiqcal_done = true;
5322 +               run_agc_cal = true;
5323 +       } else {
5324 +               sep_iq_cal = true;
5325 +               run_agc_cal = true;
5326 +       }
5327 +
5328 +       /*
5329 +        * In the SoC family, this will run for AR9300, AR9331 and AR9340.
5330 +        */
5331 +       if (sep_iq_cal) {
5332 +               txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
5333 +               REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
5334 +               udelay(5);
5335 +               REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
5336 +       }
5337 +
5338 +skip_tx_iqcal:
5339 +       if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
5340 +               /* Calibrate the AGC */
5341 +               REG_WRITE(ah, AR_PHY_AGC_CONTROL,
5342 +                         REG_READ(ah, AR_PHY_AGC_CONTROL) |
5343 +                         AR_PHY_AGC_CONTROL_CAL);
5344 +
5345 +               /* Poll for offset calibration complete */
5346 +               status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
5347 +                                      AR_PHY_AGC_CONTROL_CAL,
5348 +                                      0, AH_WAIT_TIMEOUT);
5349 +       }
5350 +
5351 +       if (!status) {
5352 +               ath_dbg(common, CALIBRATE,
5353 +                       "offset calibration failed to complete in %d ms; noisy environment?\n",
5354 +                       AH_WAIT_TIMEOUT / 1000);
5355 +               return false;
5356 +       }
5357 +
5358 +       if (txiqcal_done)
5359 +               ar9003_hw_tx_iq_cal_post_proc(ah, is_reusable);
5360 +
5361 +       /* Revert chainmask to runtime parameters */
5362 +       ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
5363 +
5364 +       /* Initialize list pointers */
5365 +       ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
5366 +
5367 +       INIT_CAL(&ah->iq_caldata);
5368 +       INSERT_CAL(ah, &ah->iq_caldata);
5369 +       ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n");
5370 +
5371 +       /* Initialize current pointer to first element in list */
5372 +       ah->cal_list_curr = ah->cal_list;
5373 +
5374 +       if (ah->cal_list_curr)
5375 +               ath9k_hw_reset_calibration(ah, ah->cal_list_curr);
5376 +
5377 +       if (caldata)
5378 +               caldata->CalValid = 0;
5379 +
5380 +       return true;
5381 +}
5382 +
5383  void ar9003_hw_attach_calib_ops(struct ath_hw *ah)
5384  {
5385         struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
5386         struct ath_hw_ops *ops = ath9k_hw_ops(ah);
5387
5388 +       if (AR_SREV_9485(ah) || AR_SREV_9462(ah) || AR_SREV_9565(ah))
5389 +               priv_ops->init_cal = ar9003_hw_init_cal_pcoem;
5390 +       else
5391 +               priv_ops->init_cal = ar9003_hw_init_cal_soc;
5392 +
5393         priv_ops->init_cal_settings = ar9003_hw_init_cal_settings;
5394 -       priv_ops->init_cal = ar9003_hw_init_cal;
5395         priv_ops->setup_calibration = ar9003_hw_setup_calibration;
5396
5397         ops->calibrate = ar9003_hw_calibrate;
5398 --- a/drivers/net/wireless/ath/ath9k/common.c
5399 +++ b/drivers/net/wireless/ath/ath9k/common.c
5400 @@ -98,10 +98,8 @@ struct ath9k_channel *ath9k_cmn_get_chan
5401  {
5402         struct ieee80211_channel *curchan = chandef->chan;
5403         struct ath9k_channel *channel;
5404 -       u8 chan_idx;
5405
5406 -       chan_idx = curchan->hw_value;
5407 -       channel = &ah->channels[chan_idx];
5408 +       channel = &ah->channels[curchan->hw_value];
5409         ath9k_cmn_update_ichannel(channel, chandef);
5410
5411         return channel;
5412 --- a/net/mac80211/rc80211_minstrel_ht.c
5413 +++ b/net/mac80211/rc80211_minstrel_ht.c
5414 @@ -226,7 +226,7 @@ minstrel_ht_calc_tp(struct minstrel_ht_s
5415                 nsecs = 1000 * mi->overhead / MINSTREL_TRUNC(mi->avg_ampdu_len);
5416
5417         nsecs += minstrel_mcs_groups[group].duration[rate];
5418 -       tp = 1000000 * ((mr->probability * 1000) / nsecs);
5419 +       tp = 1000000 * ((prob * 1000) / nsecs);
5420
5421         mr->cur_tp = MINSTREL_TRUNC(tp);
5422  }
5423 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
5424 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
5425 @@ -3984,18 +3984,20 @@ static void ar9003_hw_quick_drop_apply(s
5426         int quick_drop;
5427         s32 t[3], f[3] = {5180, 5500, 5785};
5428
5429 -       if (!(pBase->miscConfiguration & BIT(1)))
5430 +       if (!(pBase->miscConfiguration & BIT(4)))
5431                 return;
5432
5433 -       if (freq < 4000)
5434 -               quick_drop = eep->modalHeader2G.quick_drop;
5435 -       else {
5436 -               t[0] = eep->base_ext1.quick_drop_low;
5437 -               t[1] = eep->modalHeader5G.quick_drop;
5438 -               t[2] = eep->base_ext1.quick_drop_high;
5439 -               quick_drop = ar9003_hw_power_interpolate(freq, f, t, 3);
5440 +       if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9340(ah)) {
5441 +               if (freq < 4000) {
5442 +                       quick_drop = eep->modalHeader2G.quick_drop;
5443 +               } else {
5444 +                       t[0] = eep->base_ext1.quick_drop_low;
5445 +                       t[1] = eep->modalHeader5G.quick_drop;
5446 +                       t[2] = eep->base_ext1.quick_drop_high;
5447 +                       quick_drop = ar9003_hw_power_interpolate(freq, f, t, 3);
5448 +               }
5449 +               REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
5450         }
5451 -       REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
5452  }
5453
5454  static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
5455 @@ -4035,7 +4037,7 @@ static void ar9003_hw_xlna_bias_strength
5456         struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
5457         u8 bias;
5458
5459 -       if (!(eep->baseEepHeader.featureEnable & 0x40))
5460 +       if (!(eep->baseEepHeader.miscConfiguration & 0x40))
5461                 return;
5462
5463         if (!AR_SREV_9300(ah))
5464 --- a/net/mac80211/ieee80211_i.h
5465 +++ b/net/mac80211/ieee80211_i.h
5466 @@ -735,6 +735,7 @@ struct ieee80211_sub_if_data {
5467         int csa_counter_offset_beacon;
5468         int csa_counter_offset_presp;
5469         bool csa_radar_required;
5470 +       struct cfg80211_chan_def csa_chandef;
5471
5472         /* used to reconfigure hardware SM PS */
5473         struct work_struct recalc_smps;
5474 @@ -811,6 +812,9 @@ static inline void sdata_unlock(struct i
5475         __release(&sdata->wdev.mtx);
5476  }
5477
5478 +#define sdata_dereference(p, sdata) \
5479 +       rcu_dereference_protected(p, lockdep_is_held(&sdata->wdev.mtx))
5480 +
5481  static inline void
5482  sdata_assert_lock(struct ieee80211_sub_if_data *sdata)
5483  {
5484 @@ -1098,7 +1102,6 @@ struct ieee80211_local {
5485         enum mac80211_scan_state next_scan_state;
5486         struct delayed_work scan_work;
5487         struct ieee80211_sub_if_data __rcu *scan_sdata;
5488 -       struct cfg80211_chan_def csa_chandef;
5489         /* For backward compatibility only -- do not use */
5490         struct cfg80211_chan_def _oper_chandef;
5491
5492 @@ -1236,6 +1239,7 @@ struct ieee80211_csa_ie {
5493         u8 mode;
5494         u8 count;
5495         u8 ttl;
5496 +       u16 pre_value;
5497  };
5498
5499  /* Parsed Information Elements */
5500 @@ -1738,7 +1742,6 @@ ieee80211_vif_change_bandwidth(struct ie
5501  /* NOTE: only use ieee80211_vif_change_channel() for channel switch */
5502  int __must_check
5503  ieee80211_vif_change_channel(struct ieee80211_sub_if_data *sdata,
5504 -                            const struct cfg80211_chan_def *chandef,
5505                              u32 *changed);
5506  void ieee80211_vif_release_channel(struct ieee80211_sub_if_data *sdata);
5507  void ieee80211_vif_vlan_copy_chanctx(struct ieee80211_sub_if_data *sdata);
5508 --- a/net/mac80211/chan.c
5509 +++ b/net/mac80211/chan.c
5510 @@ -411,12 +411,12 @@ int ieee80211_vif_use_channel(struct iee
5511  }
5512
5513  int ieee80211_vif_change_channel(struct ieee80211_sub_if_data *sdata,
5514 -                                const struct cfg80211_chan_def *chandef,
5515                                  u32 *changed)
5516  {
5517         struct ieee80211_local *local = sdata->local;
5518         struct ieee80211_chanctx_conf *conf;
5519         struct ieee80211_chanctx *ctx;
5520 +       const struct cfg80211_chan_def *chandef = &sdata->csa_chandef;
5521         int ret;
5522         u32 chanctx_changed = 0;
5523
5524 --- a/net/mac80211/ibss.c
5525 +++ b/net/mac80211/ibss.c
5526 @@ -550,12 +550,12 @@ int ieee80211_ibss_finish_csa(struct iee
5527                                         capability);
5528                 /* XXX: should not really modify cfg80211 data */
5529                 if (cbss) {
5530 -                       cbss->channel = sdata->local->csa_chandef.chan;
5531 +                       cbss->channel = sdata->csa_chandef.chan;
5532                         cfg80211_put_bss(sdata->local->hw.wiphy, cbss);
5533                 }
5534         }
5535
5536 -       ifibss->chandef = sdata->local->csa_chandef;
5537 +       ifibss->chandef = sdata->csa_chandef;
5538
5539         /* generate the beacon */
5540         err = ieee80211_ibss_csa_beacon(sdata, NULL);
5541 @@ -922,7 +922,7 @@ ieee80211_ibss_process_chanswitch(struct
5542                                 IEEE80211_MAX_QUEUE_MAP,
5543                                 IEEE80211_QUEUE_STOP_REASON_CSA);
5544
5545 -       sdata->local->csa_chandef = params.chandef;
5546 +       sdata->csa_chandef = params.chandef;
5547         sdata->vif.csa_active = true;
5548
5549         ieee80211_bss_info_change_notify(sdata, err);
5550 --- a/net/mac80211/mesh.c
5551 +++ b/net/mac80211/mesh.c
5552 @@ -943,14 +943,19 @@ ieee80211_mesh_process_chnswitch(struct
5553                  params.chandef.chan->center_freq);
5554
5555         params.block_tx = csa_ie.mode & WLAN_EID_CHAN_SWITCH_PARAM_TX_RESTRICT;
5556 -       if (beacon)
5557 +       if (beacon) {
5558                 ifmsh->chsw_ttl = csa_ie.ttl - 1;
5559 -       else
5560 -               ifmsh->chsw_ttl = 0;
5561 +               if (ifmsh->pre_value >= csa_ie.pre_value)
5562 +                       return false;
5563 +               ifmsh->pre_value = csa_ie.pre_value;
5564 +       }
5565
5566 -       if (ifmsh->chsw_ttl > 0)
5567 +       if (ifmsh->chsw_ttl < ifmsh->mshcfg.dot11MeshTTL) {
5568                 if (ieee80211_mesh_csa_beacon(sdata, &params, false) < 0)
5569                         return false;
5570 +       } else {
5571 +               return false;
5572 +       }
5573
5574         sdata->csa_radar_required = params.radar_required;
5575
5576 @@ -959,7 +964,7 @@ ieee80211_mesh_process_chnswitch(struct
5577                                 IEEE80211_MAX_QUEUE_MAP,
5578                                 IEEE80211_QUEUE_STOP_REASON_CSA);
5579
5580 -       sdata->local->csa_chandef = params.chandef;
5581 +       sdata->csa_chandef = params.chandef;
5582         sdata->vif.csa_active = true;
5583
5584         ieee80211_bss_info_change_notify(sdata, err);
5585 @@ -1163,7 +1168,6 @@ static int mesh_fwd_csa_frame(struct iee
5586         offset_ttl = (len < 42) ? 7 : 10;
5587         *(pos + offset_ttl) -= 1;
5588         *(pos + offset_ttl + 1) &= ~WLAN_EID_CHAN_SWITCH_PARAM_INITIATOR;
5589 -       sdata->u.mesh.chsw_ttl = *(pos + offset_ttl);
5590
5591         memcpy(mgmt_fwd, mgmt, len);
5592         eth_broadcast_addr(mgmt_fwd->da);
5593 @@ -1182,7 +1186,7 @@ static void mesh_rx_csa_frame(struct iee
5594         u16 pre_value;
5595         bool fwd_csa = true;
5596         size_t baselen;
5597 -       u8 *pos, ttl;
5598 +       u8 *pos;
5599
5600         if (mgmt->u.action.u.measurement.action_code !=
5601             WLAN_ACTION_SPCT_CHL_SWITCH)
5602 @@ -1193,8 +1197,8 @@ static void mesh_rx_csa_frame(struct iee
5603                            u.action.u.chan_switch.variable);
5604         ieee802_11_parse_elems(pos, len - baselen, false, &elems);
5605
5606 -       ttl = elems.mesh_chansw_params_ie->mesh_ttl;
5607 -       if (!--ttl)
5608 +       ifmsh->chsw_ttl = elems.mesh_chansw_params_ie->mesh_ttl;
5609 +       if (!--ifmsh->chsw_ttl)
5610                 fwd_csa = false;
5611
5612         pre_value = le16_to_cpu(elems.mesh_chansw_params_ie->mesh_pre_value);
5613 --- a/net/mac80211/spectmgmt.c
5614 +++ b/net/mac80211/spectmgmt.c
5615 @@ -78,6 +78,8 @@ int ieee80211_parse_ch_switch_ie(struct
5616         if (elems->mesh_chansw_params_ie) {
5617                 csa_ie->ttl = elems->mesh_chansw_params_ie->mesh_ttl;
5618                 csa_ie->mode = elems->mesh_chansw_params_ie->mesh_flags;
5619 +               csa_ie->pre_value = le16_to_cpu(
5620 +                               elems->mesh_chansw_params_ie->mesh_pre_value);
5621         }
5622
5623         new_freq = ieee80211_channel_to_frequency(new_chan_no, new_band);
5624 --- a/drivers/net/wireless/ath/ath6kl/cfg80211.c
5625 +++ b/drivers/net/wireless/ath/ath6kl/cfg80211.c
5626 @@ -1109,7 +1109,9 @@ void ath6kl_cfg80211_ch_switch_notify(st
5627                                 (mode == WMI_11G_HT20) ?
5628                                         NL80211_CHAN_HT20 : NL80211_CHAN_NO_HT);
5629
5630 +       mutex_lock(vif->wdev->mtx);
5631         cfg80211_ch_switch_notify(vif->ndev, &chandef);
5632 +       mutex_unlock(vif->wdev->mtx);
5633  }
5634
5635  static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
5636 --- a/drivers/net/wireless/ath/ath9k/ar9462_2p1_initvals.h
5637 +++ b/drivers/net/wireless/ath/ath9k/ar9462_2p1_initvals.h
5638 @@ -20,6 +20,44 @@
5639
5640  /* AR9462 2.1 */
5641
5642 +#define ar9462_2p1_mac_postamble ar9462_2p0_mac_postamble
5643 +
5644 +#define ar9462_2p1_baseband_core ar9462_2p0_baseband_core
5645 +
5646 +#define ar9462_2p1_radio_core ar9462_2p0_radio_core
5647 +
5648 +#define ar9462_2p1_radio_postamble ar9462_2p0_radio_postamble
5649 +
5650 +#define ar9462_2p1_soc_postamble ar9462_2p0_soc_postamble
5651 +
5652 +#define ar9462_2p1_radio_postamble_sys2ant ar9462_2p0_radio_postamble_sys2ant
5653 +
5654 +#define ar9462_2p1_common_rx_gain ar9462_2p0_common_rx_gain
5655 +
5656 +#define ar9462_2p1_common_mixed_rx_gain ar9462_2p0_common_mixed_rx_gain
5657 +
5658 +#define ar9462_2p1_common_5g_xlna_only_rxgain ar9462_2p0_common_5g_xlna_only_rxgain
5659 +
5660 +#define ar9462_2p1_baseband_core_mix_rxgain ar9462_2p0_baseband_core_mix_rxgain
5661 +
5662 +#define ar9462_2p1_baseband_postamble_mix_rxgain ar9462_2p0_baseband_postamble_mix_rxgain
5663 +
5664 +#define ar9462_2p1_baseband_postamble_5g_xlna ar9462_2p0_baseband_postamble_5g_xlna
5665 +
5666 +#define ar9462_2p1_common_wo_xlna_rx_gain ar9462_2p0_common_wo_xlna_rx_gain
5667 +
5668 +#define ar9462_2p1_modes_low_ob_db_tx_gain ar9462_2p0_modes_low_ob_db_tx_gain
5669 +
5670 +#define ar9462_2p1_modes_high_ob_db_tx_gain ar9462_2p0_modes_high_ob_db_tx_gain
5671 +
5672 +#define ar9462_2p1_modes_mix_ob_db_tx_gain ar9462_2p0_modes_mix_ob_db_tx_gain
5673 +
5674 +#define ar9462_2p1_modes_fast_clock ar9462_2p0_modes_fast_clock
5675 +
5676 +#define ar9462_2p1_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
5677 +
5678 +#define ar9462_2p1_pciephy_clkreq_disable_L1 ar9462_2p0_pciephy_clkreq_disable_L1
5679 +
5680  static const u32 ar9462_2p1_mac_core[][2] = {
5681         /* Addr      allmodes  */
5682         {0x00000008, 0x00000000},
5683 @@ -183,168 +221,6 @@ static const u32 ar9462_2p1_mac_core[][2
5684         {0x000083d0, 0x000301ff},
5685  };
5686
5687 -static const u32 ar9462_2p1_mac_postamble[][5] = {
5688 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
5689 -       {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
5690 -       {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
5691 -       {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
5692 -       {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
5693 -       {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
5694 -       {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
5695 -       {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
5696 -       {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
5697 -};
5698 -
5699 -static const u32 ar9462_2p1_baseband_core[][2] = {
5700 -       /* Addr      allmodes  */
5701 -       {0x00009800, 0xafe68e30},
5702 -       {0x00009804, 0xfd14e000},
5703 -       {0x00009808, 0x9c0a9f6b},
5704 -       {0x0000980c, 0x04900000},
5705 -       {0x00009814, 0x9280c00a},
5706 -       {0x00009818, 0x00000000},
5707 -       {0x0000981c, 0x00020028},
5708 -       {0x00009834, 0x6400a290},
5709 -       {0x00009838, 0x0108ecff},
5710 -       {0x0000983c, 0x0d000600},
5711 -       {0x00009880, 0x201fff00},
5712 -       {0x00009884, 0x00001042},
5713 -       {0x000098a4, 0x00200400},
5714 -       {0x000098b0, 0x32440bbe},
5715 -       {0x000098d0, 0x004b6a8e},
5716 -       {0x000098d4, 0x00000820},
5717 -       {0x000098dc, 0x00000000},
5718 -       {0x000098e4, 0x01ffffff},
5719 -       {0x000098e8, 0x01ffffff},
5720 -       {0x000098ec, 0x01ffffff},
5721 -       {0x000098f0, 0x00000000},
5722 -       {0x000098f4, 0x00000000},
5723 -       {0x00009bf0, 0x80000000},
5724 -       {0x00009c04, 0xff55ff55},
5725 -       {0x00009c08, 0x0320ff55},
5726 -       {0x00009c0c, 0x00000000},
5727 -       {0x00009c10, 0x00000000},
5728 -       {0x00009c14, 0x00046384},
5729 -       {0x00009c18, 0x05b6b440},
5730 -       {0x00009c1c, 0x00b6b440},
5731 -       {0x00009d00, 0xc080a333},
5732 -       {0x00009d04, 0x40206c10},
5733 -       {0x00009d08, 0x009c4060},
5734 -       {0x00009d0c, 0x9883800a},
5735 -       {0x00009d10, 0x01834061},
5736 -       {0x00009d14, 0x00c0040b},
5737 -       {0x00009d18, 0x00000000},
5738 -       {0x00009e08, 0x0038230c},
5739 -       {0x00009e24, 0x990bb515},
5740 -       {0x00009e28, 0x0c6f0000},
5741 -       {0x00009e30, 0x06336f77},
5742 -       {0x00009e34, 0x6af6532f},
5743 -       {0x00009e38, 0x0cc80c00},
5744 -       {0x00009e40, 0x15262820},
5745 -       {0x00009e4c, 0x00001004},
5746 -       {0x00009e50, 0x00ff03f1},
5747 -       {0x00009e54, 0xe4c555c2},
5748 -       {0x00009e58, 0xfd857722},
5749 -       {0x00009e5c, 0xe9198724},
5750 -       {0x00009fc0, 0x803e4788},
5751 -       {0x00009fc4, 0x0001efb5},
5752 -       {0x00009fcc, 0x40000014},
5753 -       {0x00009fd0, 0x0a193b93},
5754 -       {0x0000a20c, 0x00000000},
5755 -       {0x0000a220, 0x00000000},
5756 -       {0x0000a224, 0x00000000},
5757 -       {0x0000a228, 0x10002310},
5758 -       {0x0000a23c, 0x00000000},
5759 -       {0x0000a244, 0x0c000000},
5760 -       {0x0000a2a0, 0x00000001},
5761 -       {0x0000a2c0, 0x00000001},
5762 -       {0x0000a2c8, 0x00000000},
5763 -       {0x0000a2cc, 0x18c43433},
5764 -       {0x0000a2d4, 0x00000000},
5765 -       {0x0000a2ec, 0x00000000},
5766 -       {0x0000a2f0, 0x00000000},
5767 -       {0x0000a2f4, 0x00000000},
5768 -       {0x0000a2f8, 0x00000000},
5769 -       {0x0000a344, 0x00000000},
5770 -       {0x0000a34c, 0x00000000},
5771 -       {0x0000a350, 0x0000a000},
5772 -       {0x0000a364, 0x00000000},
5773 -       {0x0000a370, 0x00000000},
5774 -       {0x0000a390, 0x00000001},
5775 -       {0x0000a394, 0x00000444},
5776 -       {0x0000a398, 0x001f0e0f},
5777 -       {0x0000a39c, 0x0075393f},
5778 -       {0x0000a3a0, 0xb79f6427},
5779 -       {0x0000a3c0, 0x20202020},
5780 -       {0x0000a3c4, 0x22222220},
5781 -       {0x0000a3c8, 0x20200020},
5782 -       {0x0000a3cc, 0x20202020},
5783 -       {0x0000a3d0, 0x20202020},
5784 -       {0x0000a3d4, 0x20202020},
5785 -       {0x0000a3d8, 0x20202020},
5786 -       {0x0000a3dc, 0x20202020},
5787 -       {0x0000a3e0, 0x20202020},
5788 -       {0x0000a3e4, 0x20202020},
5789 -       {0x0000a3e8, 0x20202020},
5790 -       {0x0000a3ec, 0x20202020},
5791 -       {0x0000a3f0, 0x00000000},
5792 -       {0x0000a3f4, 0x00000006},
5793 -       {0x0000a3f8, 0x0c9bd380},
5794 -       {0x0000a3fc, 0x000f0f01},
5795 -       {0x0000a400, 0x8fa91f01},
5796 -       {0x0000a404, 0x00000000},
5797 -       {0x0000a408, 0x0e79e5c6},
5798 -       {0x0000a40c, 0x00820820},
5799 -       {0x0000a414, 0x1ce739ce},
5800 -       {0x0000a418, 0x2d001dce},
5801 -       {0x0000a434, 0x00000000},
5802 -       {0x0000a438, 0x00001801},
5803 -       {0x0000a43c, 0x00100000},
5804 -       {0x0000a444, 0x00000000},
5805 -       {0x0000a448, 0x05000080},
5806 -       {0x0000a44c, 0x00000001},
5807 -       {0x0000a450, 0x00010000},
5808 -       {0x0000a454, 0x07000000},
5809 -       {0x0000a644, 0xbfad9d74},
5810 -       {0x0000a648, 0x0048060a},
5811 -       {0x0000a64c, 0x00002037},
5812 -       {0x0000a670, 0x03020100},
5813 -       {0x0000a674, 0x09080504},
5814 -       {0x0000a678, 0x0d0c0b0a},
5815 -       {0x0000a67c, 0x13121110},
5816 -       {0x0000a680, 0x31301514},
5817 -       {0x0000a684, 0x35343332},
5818 -       {0x0000a688, 0x00000036},
5819 -       {0x0000a690, 0x00000838},
5820 -       {0x0000a6b0, 0x0000000a},
5821 -       {0x0000a6b4, 0x00512c01},
5822 -       {0x0000a7c0, 0x00000000},
5823 -       {0x0000a7c4, 0xfffffffc},
5824 -       {0x0000a7c8, 0x00000000},
5825 -       {0x0000a7cc, 0x00000000},
5826 -       {0x0000a7d0, 0x00000000},
5827 -       {0x0000a7d4, 0x00000004},
5828 -       {0x0000a7dc, 0x00000000},
5829 -       {0x0000a7f0, 0x80000000},
5830 -       {0x0000a8d0, 0x004b6a8e},
5831 -       {0x0000a8d4, 0x00000820},
5832 -       {0x0000a8dc, 0x00000000},
5833 -       {0x0000a8f0, 0x00000000},
5834 -       {0x0000a8f4, 0x00000000},
5835 -       {0x0000abf0, 0x80000000},
5836 -       {0x0000b2d0, 0x00000080},
5837 -       {0x0000b2d4, 0x00000000},
5838 -       {0x0000b2ec, 0x00000000},
5839 -       {0x0000b2f0, 0x00000000},
5840 -       {0x0000b2f4, 0x00000000},
5841 -       {0x0000b2f8, 0x00000000},
5842 -       {0x0000b408, 0x0e79e5c0},
5843 -       {0x0000b40c, 0x00820820},
5844 -       {0x0000b420, 0x00000000},
5845 -       {0x0000b6b0, 0x0000000a},
5846 -       {0x0000b6b4, 0x00000001},
5847 -};
5848 -
5849  static const u32 ar9462_2p1_baseband_postamble[][5] = {
5850         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
5851         {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a800d},
5852 @@ -361,7 +237,7 @@ static const u32 ar9462_2p1_baseband_pos
5853         {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3236605e, 0x32365a5e},
5854         {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
5855         {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
5856 -       {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
5857 +       {0x00009e20, 0x000003a5, 0x000003a5, 0x000003a5, 0x000003a5},
5858         {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
5859         {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c282},
5860         {0x00009e44, 0x62321e27, 0x62321e27, 0xfe291e27, 0xfe291e27},
5861 @@ -400,1375 +276,16 @@ static const u32 ar9462_2p1_baseband_pos
5862         {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
5863         {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
5864         {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
5865 -       {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
5866 +       {0x0000ae20, 0x000001a6, 0x000001a6, 0x000001aa, 0x000001aa},
5867         {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
5868  };
5869
5870 -static const u32 ar9462_2p1_radio_core[][2] = {
5871 -       /* Addr      allmodes  */
5872 -       {0x00016000, 0x36db6db6},
5873 -       {0x00016004, 0x6db6db40},
5874 -       {0x00016008, 0x73f00000},
5875 -       {0x0001600c, 0x00000000},
5876 -       {0x00016010, 0x6d820001},
5877 -       {0x00016040, 0x7f80fff8},
5878 -       {0x0001604c, 0x2699e04f},
5879 -       {0x00016050, 0x6db6db6c},
5880 -       {0x00016058, 0x6c200000},
5881 -       {0x00016080, 0x000c0000},
5882 -       {0x00016084, 0x9a68048c},
5883 -       {0x00016088, 0x54214514},
5884 -       {0x0001608c, 0x1203040b},
5885 -       {0x00016090, 0x24926490},
5886 -       {0x00016098, 0xd2888888},
5887 -       {0x000160a0, 0x0a108ffe},
5888 -       {0x000160a4, 0x812fc491},
5889 -       {0x000160a8, 0x423c8000},
5890 -       {0x000160b4, 0x92000000},
5891 -       {0x000160b8, 0x0285dddc},
5892 -       {0x000160bc, 0x02908888},
5893 -       {0x000160c0, 0x00adb6d0},
5894 -       {0x000160c4, 0x6db6db60},
5895 -       {0x000160c8, 0x6db6db6c},
5896 -       {0x000160cc, 0x0de6c1b0},
5897 -       {0x00016100, 0x3fffbe04},
5898 -       {0x00016104, 0xfff80000},
5899 -       {0x00016108, 0x00200400},
5900 -       {0x00016110, 0x00000000},
5901 -       {0x00016144, 0x02084080},
5902 -       {0x00016148, 0x000080c0},
5903 -       {0x00016280, 0x050a0001},
5904 -       {0x00016284, 0x3d841418},
5905 -       {0x00016288, 0x00000000},
5906 -       {0x0001628c, 0xe3000000},
5907 -       {0x00016290, 0xa1005080},
5908 -       {0x00016294, 0x00000020},
5909 -       {0x00016298, 0x54a82900},
5910 -       {0x00016340, 0x121e4276},
5911 -       {0x00016344, 0x00300000},
5912 -       {0x00016400, 0x36db6db6},
5913 -       {0x00016404, 0x6db6db40},
5914 -       {0x00016408, 0x73f00000},
5915 -       {0x0001640c, 0x00000000},
5916 -       {0x00016410, 0x6c800001},
5917 -       {0x00016440, 0x7f80fff8},
5918 -       {0x0001644c, 0x4699e04f},
5919 -       {0x00016450, 0x6db6db6c},
5920 -       {0x00016500, 0x3fffbe04},
5921 -       {0x00016504, 0xfff80000},
5922 -       {0x00016508, 0x00200400},
5923 -       {0x00016510, 0x00000000},
5924 -       {0x00016544, 0x02084080},
5925 -       {0x00016548, 0x000080c0},
5926 -};
5927 -
5928 -static const u32 ar9462_2p1_radio_postamble[][5] = {
5929 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
5930 -       {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
5931 -       {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
5932 -       {0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
5933 -       {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
5934 -};
5935 -
5936  static const u32 ar9462_2p1_soc_preamble[][2] = {
5937         /* Addr      allmodes  */
5938 -       {0x000040a4, 0x00a0c1c9},
5939 +       {0x000040a4, 0x00a0c9c9},
5940         {0x00007020, 0x00000000},
5941         {0x00007034, 0x00000002},
5942         {0x00007038, 0x000004c2},
5943  };
5944
5945 -static const u32 ar9462_2p1_soc_postamble[][5] = {
5946 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
5947 -       {0x00007010, 0x00000033, 0x00000033, 0x00000033, 0x00000033},
5948 -};
5949 -
5950 -static const u32 ar9462_2p1_radio_postamble_sys2ant[][5] = {
5951 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
5952 -       {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
5953 -       {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
5954 -       {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
5955 -};
5956 -
5957 -static const u32 ar9462_2p1_common_rx_gain[][2] = {
5958 -       /* Addr      allmodes  */
5959 -       {0x0000a000, 0x00010000},
5960 -       {0x0000a004, 0x00030002},
5961 -       {0x0000a008, 0x00050004},
5962 -       {0x0000a00c, 0x00810080},
5963 -       {0x0000a010, 0x00830082},
5964 -       {0x0000a014, 0x01810180},
5965 -       {0x0000a018, 0x01830182},
5966 -       {0x0000a01c, 0x01850184},
5967 -       {0x0000a020, 0x01890188},
5968 -       {0x0000a024, 0x018b018a},
5969 -       {0x0000a028, 0x018d018c},
5970 -       {0x0000a02c, 0x01910190},
5971 -       {0x0000a030, 0x01930192},
5972 -       {0x0000a034, 0x01950194},
5973 -       {0x0000a038, 0x038a0196},
5974 -       {0x0000a03c, 0x038c038b},
5975 -       {0x0000a040, 0x0390038d},
5976 -       {0x0000a044, 0x03920391},
5977 -       {0x0000a048, 0x03940393},
5978 -       {0x0000a04c, 0x03960395},
5979 -       {0x0000a050, 0x00000000},
5980 -       {0x0000a054, 0x00000000},
5981 -       {0x0000a058, 0x00000000},
5982 -       {0x0000a05c, 0x00000000},
5983 -       {0x0000a060, 0x00000000},
5984 -       {0x0000a064, 0x00000000},
5985 -       {0x0000a068, 0x00000000},
5986 -       {0x0000a06c, 0x00000000},
5987 -       {0x0000a070, 0x00000000},
5988 -       {0x0000a074, 0x00000000},
5989 -       {0x0000a078, 0x00000000},
5990 -       {0x0000a07c, 0x00000000},
5991 -       {0x0000a080, 0x22222229},
5992 -       {0x0000a084, 0x1d1d1d1d},
5993 -       {0x0000a088, 0x1d1d1d1d},
5994 -       {0x0000a08c, 0x1d1d1d1d},
5995 -       {0x0000a090, 0x171d1d1d},
5996 -       {0x0000a094, 0x11111717},
5997 -       {0x0000a098, 0x00030311},
5998 -       {0x0000a09c, 0x00000000},
5999 -       {0x0000a0a0, 0x00000000},
6000 -       {0x0000a0a4, 0x00000000},
6001 -       {0x0000a0a8, 0x00000000},
6002 -       {0x0000a0ac, 0x00000000},
6003 -       {0x0000a0b0, 0x00000000},
6004 -       {0x0000a0b4, 0x00000000},
6005 -       {0x0000a0b8, 0x00000000},
6006 -       {0x0000a0bc, 0x00000000},
6007 -       {0x0000a0c0, 0x001f0000},
6008 -       {0x0000a0c4, 0x01000101},
6009 -       {0x0000a0c8, 0x011e011f},
6010 -       {0x0000a0cc, 0x011c011d},
6011 -       {0x0000a0d0, 0x02030204},
6012 -       {0x0000a0d4, 0x02010202},
6013 -       {0x0000a0d8, 0x021f0200},
6014 -       {0x0000a0dc, 0x0302021e},
6015 -       {0x0000a0e0, 0x03000301},
6016 -       {0x0000a0e4, 0x031e031f},
6017 -       {0x0000a0e8, 0x0402031d},
6018 -       {0x0000a0ec, 0x04000401},
6019 -       {0x0000a0f0, 0x041e041f},
6020 -       {0x0000a0f4, 0x0502041d},
6021 -       {0x0000a0f8, 0x05000501},
6022 -       {0x0000a0fc, 0x051e051f},
6023 -       {0x0000a100, 0x06010602},
6024 -       {0x0000a104, 0x061f0600},
6025 -       {0x0000a108, 0x061d061e},
6026 -       {0x0000a10c, 0x07020703},
6027 -       {0x0000a110, 0x07000701},
6028 -       {0x0000a114, 0x00000000},
6029 -       {0x0000a118, 0x00000000},
6030 -       {0x0000a11c, 0x00000000},
6031 -       {0x0000a120, 0x00000000},
6032 -       {0x0000a124, 0x00000000},
6033 -       {0x0000a128, 0x00000000},
6034 -       {0x0000a12c, 0x00000000},
6035 -       {0x0000a130, 0x00000000},
6036 -       {0x0000a134, 0x00000000},
6037 -       {0x0000a138, 0x00000000},
6038 -       {0x0000a13c, 0x00000000},
6039 -       {0x0000a140, 0x001f0000},
6040 -       {0x0000a144, 0x01000101},
6041 -       {0x0000a148, 0x011e011f},
6042 -       {0x0000a14c, 0x011c011d},
6043 -       {0x0000a150, 0x02030204},
6044 -       {0x0000a154, 0x02010202},
6045 -       {0x0000a158, 0x021f0200},
6046 -       {0x0000a15c, 0x0302021e},
6047 -       {0x0000a160, 0x03000301},
6048 -       {0x0000a164, 0x031e031f},
6049 -       {0x0000a168, 0x0402031d},
6050 -       {0x0000a16c, 0x04000401},
6051 -       {0x0000a170, 0x041e041f},
6052 -       {0x0000a174, 0x0502041d},
6053 -       {0x0000a178, 0x05000501},
6054 -       {0x0000a17c, 0x051e051f},
6055 -       {0x0000a180, 0x06010602},
6056 -       {0x0000a184, 0x061f0600},
6057 -       {0x0000a188, 0x061d061e},
6058 -       {0x0000a18c, 0x07020703},
6059 -       {0x0000a190, 0x07000701},
6060 -       {0x0000a194, 0x00000000},
6061 -       {0x0000a198, 0x00000000},
6062 -       {0x0000a19c, 0x00000000},
6063 -       {0x0000a1a0, 0x00000000},
6064 -       {0x0000a1a4, 0x00000000},
6065 -       {0x0000a1a8, 0x00000000},
6066 -       {0x0000a1ac, 0x00000000},
6067 -       {0x0000a1b0, 0x00000000},
6068 -       {0x0000a1b4, 0x00000000},
6069 -       {0x0000a1b8, 0x00000000},
6070 -       {0x0000a1bc, 0x00000000},
6071 -       {0x0000a1c0, 0x00000000},
6072 -       {0x0000a1c4, 0x00000000},
6073 -       {0x0000a1c8, 0x00000000},
6074 -       {0x0000a1cc, 0x00000000},
6075 -       {0x0000a1d0, 0x00000000},
6076 -       {0x0000a1d4, 0x00000000},
6077 -       {0x0000a1d8, 0x00000000},
6078 -       {0x0000a1dc, 0x00000000},
6079 -       {0x0000a1e0, 0x00000000},
6080 -       {0x0000a1e4, 0x00000000},
6081 -       {0x0000a1e8, 0x00000000},
6082 -       {0x0000a1ec, 0x00000000},
6083 -       {0x0000a1f0, 0x00000396},
6084 -       {0x0000a1f4, 0x00000396},
6085 -       {0x0000a1f8, 0x00000396},
6086 -       {0x0000a1fc, 0x00000196},
6087 -       {0x0000b000, 0x00010000},
6088 -       {0x0000b004, 0x00030002},
6089 -       {0x0000b008, 0x00050004},
6090 -       {0x0000b00c, 0x00810080},
6091 -       {0x0000b010, 0x00830082},
6092 -       {0x0000b014, 0x01810180},
6093 -       {0x0000b018, 0x01830182},
6094 -       {0x0000b01c, 0x01850184},
6095 -       {0x0000b020, 0x02810280},
6096 -       {0x0000b024, 0x02830282},
6097 -       {0x0000b028, 0x02850284},
6098 -       {0x0000b02c, 0x02890288},
6099 -       {0x0000b030, 0x028b028a},
6100 -       {0x0000b034, 0x0388028c},
6101 -       {0x0000b038, 0x038a0389},
6102 -       {0x0000b03c, 0x038c038b},
6103 -       {0x0000b040, 0x0390038d},
6104 -       {0x0000b044, 0x03920391},
6105 -       {0x0000b048, 0x03940393},
6106 -       {0x0000b04c, 0x03960395},
6107 -       {0x0000b050, 0x00000000},
6108 -       {0x0000b054, 0x00000000},
6109 -       {0x0000b058, 0x00000000},
6110 -       {0x0000b05c, 0x00000000},
6111 -       {0x0000b060, 0x00000000},
6112 -       {0x0000b064, 0x00000000},
6113 -       {0x0000b068, 0x00000000},
6114 -       {0x0000b06c, 0x00000000},
6115 -       {0x0000b070, 0x00000000},
6116 -       {0x0000b074, 0x00000000},
6117 -       {0x0000b078, 0x00000000},
6118 -       {0x0000b07c, 0x00000000},
6119 -       {0x0000b080, 0x2a2d2f32},
6120 -       {0x0000b084, 0x21232328},
6121 -       {0x0000b088, 0x19191c1e},
6122 -       {0x0000b08c, 0x12141417},
6123 -       {0x0000b090, 0x07070e0e},
6124 -       {0x0000b094, 0x03030305},
6125 -       {0x0000b098, 0x00000003},
6126 -       {0x0000b09c, 0x00000000},
6127 -       {0x0000b0a0, 0x00000000},
6128 -       {0x0000b0a4, 0x00000000},
6129 -       {0x0000b0a8, 0x00000000},
6130 -       {0x0000b0ac, 0x00000000},
6131 -       {0x0000b0b0, 0x00000000},
6132 -       {0x0000b0b4, 0x00000000},
6133 -       {0x0000b0b8, 0x00000000},
6134 -       {0x0000b0bc, 0x00000000},
6135 -       {0x0000b0c0, 0x003f0020},
6136 -       {0x0000b0c4, 0x00400041},
6137 -       {0x0000b0c8, 0x0140005f},
6138 -       {0x0000b0cc, 0x0160015f},
6139 -       {0x0000b0d0, 0x017e017f},
6140 -       {0x0000b0d4, 0x02410242},
6141 -       {0x0000b0d8, 0x025f0240},
6142 -       {0x0000b0dc, 0x027f0260},
6143 -       {0x0000b0e0, 0x0341027e},
6144 -       {0x0000b0e4, 0x035f0340},
6145 -       {0x0000b0e8, 0x037f0360},
6146 -       {0x0000b0ec, 0x04400441},
6147 -       {0x0000b0f0, 0x0460045f},
6148 -       {0x0000b0f4, 0x0541047f},
6149 -       {0x0000b0f8, 0x055f0540},
6150 -       {0x0000b0fc, 0x057f0560},
6151 -       {0x0000b100, 0x06400641},
6152 -       {0x0000b104, 0x0660065f},
6153 -       {0x0000b108, 0x067e067f},
6154 -       {0x0000b10c, 0x07410742},
6155 -       {0x0000b110, 0x075f0740},
6156 -       {0x0000b114, 0x077f0760},
6157 -       {0x0000b118, 0x07800781},
6158 -       {0x0000b11c, 0x07a0079f},
6159 -       {0x0000b120, 0x07c107bf},
6160 -       {0x0000b124, 0x000007c0},
6161 -       {0x0000b128, 0x00000000},
6162 -       {0x0000b12c, 0x00000000},
6163 -       {0x0000b130, 0x00000000},
6164 -       {0x0000b134, 0x00000000},
6165 -       {0x0000b138, 0x00000000},
6166 -       {0x0000b13c, 0x00000000},
6167 -       {0x0000b140, 0x003f0020},
6168 -       {0x0000b144, 0x00400041},
6169 -       {0x0000b148, 0x0140005f},
6170 -       {0x0000b14c, 0x0160015f},
6171 -       {0x0000b150, 0x017e017f},
6172 -       {0x0000b154, 0x02410242},
6173 -       {0x0000b158, 0x025f0240},
6174 -       {0x0000b15c, 0x027f0260},
6175 -       {0x0000b160, 0x0341027e},
6176 -       {0x0000b164, 0x035f0340},
6177 -       {0x0000b168, 0x037f0360},
6178 -       {0x0000b16c, 0x04400441},
6179 -       {0x0000b170, 0x0460045f},
6180 -       {0x0000b174, 0x0541047f},
6181 -       {0x0000b178, 0x055f0540},
6182 -       {0x0000b17c, 0x057f0560},
6183 -       {0x0000b180, 0x06400641},
6184 -       {0x0000b184, 0x0660065f},
6185 -       {0x0000b188, 0x067e067f},
6186 -       {0x0000b18c, 0x07410742},
6187 -       {0x0000b190, 0x075f0740},
6188 -       {0x0000b194, 0x077f0760},
6189 -       {0x0000b198, 0x07800781},
6190 -       {0x0000b19c, 0x07a0079f},
6191 -       {0x0000b1a0, 0x07c107bf},
6192 -       {0x0000b1a4, 0x000007c0},
6193 -       {0x0000b1a8, 0x00000000},
6194 -       {0x0000b1ac, 0x00000000},
6195 -       {0x0000b1b0, 0x00000000},
6196 -       {0x0000b1b4, 0x00000000},
6197 -       {0x0000b1b8, 0x00000000},
6198 -       {0x0000b1bc, 0x00000000},
6199 -       {0x0000b1c0, 0x00000000},
6200 -       {0x0000b1c4, 0x00000000},
6201 -       {0x0000b1c8, 0x00000000},
6202 -       {0x0000b1cc, 0x00000000},
6203 -       {0x0000b1d0, 0x00000000},
6204 -       {0x0000b1d4, 0x00000000},
6205 -       {0x0000b1d8, 0x00000000},
6206 -       {0x0000b1dc, 0x00000000},
6207 -       {0x0000b1e0, 0x00000000},
6208 -       {0x0000b1e4, 0x00000000},
6209 -       {0x0000b1e8, 0x00000000},
6210 -       {0x0000b1ec, 0x00000000},
6211 -       {0x0000b1f0, 0x00000396},
6212 -       {0x0000b1f4, 0x00000396},
6213 -       {0x0000b1f8, 0x00000396},
6214 -       {0x0000b1fc, 0x00000196},
6215 -};
6216 -
6217 -static const u32 ar9462_2p1_common_mixed_rx_gain[][2] = {
6218 -       /* Addr      allmodes  */
6219 -       {0x0000a000, 0x00010000},
6220 -       {0x0000a004, 0x00030002},
6221 -       {0x0000a008, 0x00050004},
6222 -       {0x0000a00c, 0x00810080},
6223 -       {0x0000a010, 0x00830082},
6224 -       {0x0000a014, 0x01810180},
6225 -       {0x0000a018, 0x01830182},
6226 -       {0x0000a01c, 0x01850184},
6227 -       {0x0000a020, 0x01890188},
6228 -       {0x0000a024, 0x018b018a},
6229 -       {0x0000a028, 0x018d018c},
6230 -       {0x0000a02c, 0x03820190},
6231 -       {0x0000a030, 0x03840383},
6232 -       {0x0000a034, 0x03880385},
6233 -       {0x0000a038, 0x038a0389},
6234 -       {0x0000a03c, 0x038c038b},
6235 -       {0x0000a040, 0x0390038d},
6236 -       {0x0000a044, 0x03920391},
6237 -       {0x0000a048, 0x03940393},
6238 -       {0x0000a04c, 0x03960395},
6239 -       {0x0000a050, 0x00000000},
6240 -       {0x0000a054, 0x00000000},
6241 -       {0x0000a058, 0x00000000},
6242 -       {0x0000a05c, 0x00000000},
6243 -       {0x0000a060, 0x00000000},
6244 -       {0x0000a064, 0x00000000},
6245 -       {0x0000a068, 0x00000000},
6246 -       {0x0000a06c, 0x00000000},
6247 -       {0x0000a070, 0x00000000},
6248 -       {0x0000a074, 0x00000000},
6249 -       {0x0000a078, 0x00000000},
6250 -       {0x0000a07c, 0x00000000},
6251 -       {0x0000a080, 0x29292929},
6252 -       {0x0000a084, 0x29292929},
6253 -       {0x0000a088, 0x29292929},
6254 -       {0x0000a08c, 0x29292929},
6255 -       {0x0000a090, 0x22292929},
6256 -       {0x0000a094, 0x1d1d2222},
6257 -       {0x0000a098, 0x0c111117},
6258 -       {0x0000a09c, 0x00030303},
6259 -       {0x0000a0a0, 0x00000000},
6260 -       {0x0000a0a4, 0x00000000},
6261 -       {0x0000a0a8, 0x00000000},
6262 -       {0x0000a0ac, 0x00000000},
6263 -       {0x0000a0b0, 0x00000000},
6264 -       {0x0000a0b4, 0x00000000},
6265 -       {0x0000a0b8, 0x00000000},
6266 -       {0x0000a0bc, 0x00000000},
6267 -       {0x0000a0c0, 0x001f0000},
6268 -       {0x0000a0c4, 0x01000101},
6269 -       {0x0000a0c8, 0x011e011f},
6270 -       {0x0000a0cc, 0x011c011d},
6271 -       {0x0000a0d0, 0x02030204},
6272 -       {0x0000a0d4, 0x02010202},
6273 -       {0x0000a0d8, 0x021f0200},
6274 -       {0x0000a0dc, 0x0302021e},
6275 -       {0x0000a0e0, 0x03000301},
6276 -       {0x0000a0e4, 0x031e031f},
6277 -       {0x0000a0e8, 0x0402031d},
6278 -       {0x0000a0ec, 0x04000401},
6279 -       {0x0000a0f0, 0x041e041f},
6280 -       {0x0000a0f4, 0x0502041d},
6281 -       {0x0000a0f8, 0x05000501},
6282 -       {0x0000a0fc, 0x051e051f},
6283 -       {0x0000a100, 0x06010602},
6284 -       {0x0000a104, 0x061f0600},
6285 -       {0x0000a108, 0x061d061e},
6286 -       {0x0000a10c, 0x07020703},
6287 -       {0x0000a110, 0x07000701},
6288 -       {0x0000a114, 0x00000000},
6289 -       {0x0000a118, 0x00000000},
6290 -       {0x0000a11c, 0x00000000},
6291 -       {0x0000a120, 0x00000000},
6292 -       {0x0000a124, 0x00000000},
6293 -       {0x0000a128, 0x00000000},
6294 -       {0x0000a12c, 0x00000000},
6295 -       {0x0000a130, 0x00000000},
6296 -       {0x0000a134, 0x00000000},
6297 -       {0x0000a138, 0x00000000},
6298 -       {0x0000a13c, 0x00000000},
6299 -       {0x0000a140, 0x001f0000},
6300 -       {0x0000a144, 0x01000101},
6301 -       {0x0000a148, 0x011e011f},
6302 -       {0x0000a14c, 0x011c011d},
6303 -       {0x0000a150, 0x02030204},
6304 -       {0x0000a154, 0x02010202},
6305 -       {0x0000a158, 0x021f0200},
6306 -       {0x0000a15c, 0x0302021e},
6307 -       {0x0000a160, 0x03000301},
6308 -       {0x0000a164, 0x031e031f},
6309 -       {0x0000a168, 0x0402031d},
6310 -       {0x0000a16c, 0x04000401},
6311 -       {0x0000a170, 0x041e041f},
6312 -       {0x0000a174, 0x0502041d},
6313 -       {0x0000a178, 0x05000501},
6314 -       {0x0000a17c, 0x051e051f},
6315 -       {0x0000a180, 0x06010602},
6316 -       {0x0000a184, 0x061f0600},
6317 -       {0x0000a188, 0x061d061e},
6318 -       {0x0000a18c, 0x07020703},
6319 -       {0x0000a190, 0x07000701},
6320 -       {0x0000a194, 0x00000000},
6321 -       {0x0000a198, 0x00000000},
6322 -       {0x0000a19c, 0x00000000},
6323 -       {0x0000a1a0, 0x00000000},
6324 -       {0x0000a1a4, 0x00000000},
6325 -       {0x0000a1a8, 0x00000000},
6326 -       {0x0000a1ac, 0x00000000},
6327 -       {0x0000a1b0, 0x00000000},
6328 -       {0x0000a1b4, 0x00000000},
6329 -       {0x0000a1b8, 0x00000000},
6330 -       {0x0000a1bc, 0x00000000},
6331 -       {0x0000a1c0, 0x00000000},
6332 -       {0x0000a1c4, 0x00000000},
6333 -       {0x0000a1c8, 0x00000000},
6334 -       {0x0000a1cc, 0x00000000},
6335 -       {0x0000a1d0, 0x00000000},
6336 -       {0x0000a1d4, 0x00000000},
6337 -       {0x0000a1d8, 0x00000000},
6338 -       {0x0000a1dc, 0x00000000},
6339 -       {0x0000a1e0, 0x00000000},
6340 -       {0x0000a1e4, 0x00000000},
6341 -       {0x0000a1e8, 0x00000000},
6342 -       {0x0000a1ec, 0x00000000},
6343 -       {0x0000a1f0, 0x00000396},
6344 -       {0x0000a1f4, 0x00000396},
6345 -       {0x0000a1f8, 0x00000396},
6346 -       {0x0000a1fc, 0x00000196},
6347 -       {0x0000b000, 0x00010000},
6348 -       {0x0000b004, 0x00030002},
6349 -       {0x0000b008, 0x00050004},
6350 -       {0x0000b00c, 0x00810080},
6351 -       {0x0000b010, 0x00830082},
6352 -       {0x0000b014, 0x01810180},
6353 -       {0x0000b018, 0x01830182},
6354 -       {0x0000b01c, 0x01850184},
6355 -       {0x0000b020, 0x02810280},
6356 -       {0x0000b024, 0x02830282},
6357 -       {0x0000b028, 0x02850284},
6358 -       {0x0000b02c, 0x02890288},
6359 -       {0x0000b030, 0x028b028a},
6360 -       {0x0000b034, 0x0388028c},
6361 -       {0x0000b038, 0x038a0389},
6362 -       {0x0000b03c, 0x038c038b},
6363 -       {0x0000b040, 0x0390038d},
6364 -       {0x0000b044, 0x03920391},
6365 -       {0x0000b048, 0x03940393},
6366 -       {0x0000b04c, 0x03960395},
6367 -       {0x0000b050, 0x00000000},
6368 -       {0x0000b054, 0x00000000},
6369 -       {0x0000b058, 0x00000000},
6370 -       {0x0000b05c, 0x00000000},
6371 -       {0x0000b060, 0x00000000},
6372 -       {0x0000b064, 0x00000000},
6373 -       {0x0000b068, 0x00000000},
6374 -       {0x0000b06c, 0x00000000},
6375 -       {0x0000b070, 0x00000000},
6376 -       {0x0000b074, 0x00000000},
6377 -       {0x0000b078, 0x00000000},
6378 -       {0x0000b07c, 0x00000000},
6379 -       {0x0000b080, 0x2a2d2f32},
6380 -       {0x0000b084, 0x21232328},
6381 -       {0x0000b088, 0x19191c1e},
6382 -       {0x0000b08c, 0x12141417},
6383 -       {0x0000b090, 0x07070e0e},
6384 -       {0x0000b094, 0x03030305},
6385 -       {0x0000b098, 0x00000003},
6386 -       {0x0000b09c, 0x00000000},
6387 -       {0x0000b0a0, 0x00000000},
6388 -       {0x0000b0a4, 0x00000000},
6389 -       {0x0000b0a8, 0x00000000},
6390 -       {0x0000b0ac, 0x00000000},
6391 -       {0x0000b0b0, 0x00000000},
6392 -       {0x0000b0b4, 0x00000000},
6393 -       {0x0000b0b8, 0x00000000},
6394 -       {0x0000b0bc, 0x00000000},
6395 -       {0x0000b0c0, 0x003f0020},
6396 -       {0x0000b0c4, 0x00400041},
6397 -       {0x0000b0c8, 0x0140005f},
6398 -       {0x0000b0cc, 0x0160015f},
6399 -       {0x0000b0d0, 0x017e017f},
6400 -       {0x0000b0d4, 0x02410242},
6401 -       {0x0000b0d8, 0x025f0240},
6402 -       {0x0000b0dc, 0x027f0260},
6403 -       {0x0000b0e0, 0x0341027e},
6404 -       {0x0000b0e4, 0x035f0340},
6405 -       {0x0000b0e8, 0x037f0360},
6406 -       {0x0000b0ec, 0x04400441},
6407 -       {0x0000b0f0, 0x0460045f},
6408 -       {0x0000b0f4, 0x0541047f},
6409 -       {0x0000b0f8, 0x055f0540},
6410 -       {0x0000b0fc, 0x057f0560},
6411 -       {0x0000b100, 0x06400641},
6412 -       {0x0000b104, 0x0660065f},
6413 -       {0x0000b108, 0x067e067f},
6414 -       {0x0000b10c, 0x07410742},
6415 -       {0x0000b110, 0x075f0740},
6416 -       {0x0000b114, 0x077f0760},
6417 -       {0x0000b118, 0x07800781},
6418 -       {0x0000b11c, 0x07a0079f},
6419 -       {0x0000b120, 0x07c107bf},
6420 -       {0x0000b124, 0x000007c0},
6421 -       {0x0000b128, 0x00000000},
6422 -       {0x0000b12c, 0x00000000},
6423 -       {0x0000b130, 0x00000000},
6424 -       {0x0000b134, 0x00000000},
6425 -       {0x0000b138, 0x00000000},
6426 -       {0x0000b13c, 0x00000000},
6427 -       {0x0000b140, 0x003f0020},
6428 -       {0x0000b144, 0x00400041},
6429 -       {0x0000b148, 0x0140005f},
6430 -       {0x0000b14c, 0x0160015f},
6431 -       {0x0000b150, 0x017e017f},
6432 -       {0x0000b154, 0x02410242},
6433 -       {0x0000b158, 0x025f0240},
6434 -       {0x0000b15c, 0x027f0260},
6435 -       {0x0000b160, 0x0341027e},
6436 -       {0x0000b164, 0x035f0340},
6437 -       {0x0000b168, 0x037f0360},
6438 -       {0x0000b16c, 0x04400441},
6439 -       {0x0000b170, 0x0460045f},
6440 -       {0x0000b174, 0x0541047f},
6441 -       {0x0000b178, 0x055f0540},
6442 -       {0x0000b17c, 0x057f0560},
6443 -       {0x0000b180, 0x06400641},
6444 -       {0x0000b184, 0x0660065f},
6445 -       {0x0000b188, 0x067e067f},
6446 -       {0x0000b18c, 0x07410742},
6447 -       {0x0000b190, 0x075f0740},
6448 -       {0x0000b194, 0x077f0760},
6449 -       {0x0000b198, 0x07800781},
6450 -       {0x0000b19c, 0x07a0079f},
6451 -       {0x0000b1a0, 0x07c107bf},
6452 -       {0x0000b1a4, 0x000007c0},
6453 -       {0x0000b1a8, 0x00000000},
6454 -       {0x0000b1ac, 0x00000000},
6455 -       {0x0000b1b0, 0x00000000},
6456 -       {0x0000b1b4, 0x00000000},
6457 -       {0x0000b1b8, 0x00000000},
6458 -       {0x0000b1bc, 0x00000000},
6459 -       {0x0000b1c0, 0x00000000},
6460 -       {0x0000b1c4, 0x00000000},
6461 -       {0x0000b1c8, 0x00000000},
6462 -       {0x0000b1cc, 0x00000000},
6463 -       {0x0000b1d0, 0x00000000},
6464 -       {0x0000b1d4, 0x00000000},
6465 -       {0x0000b1d8, 0x00000000},
6466 -       {0x0000b1dc, 0x00000000},
6467 -       {0x0000b1e0, 0x00000000},
6468 -       {0x0000b1e4, 0x00000000},
6469 -       {0x0000b1e8, 0x00000000},
6470 -       {0x0000b1ec, 0x00000000},
6471 -       {0x0000b1f0, 0x00000396},
6472 -       {0x0000b1f4, 0x00000396},
6473 -       {0x0000b1f8, 0x00000396},
6474 -       {0x0000b1fc, 0x00000196},
6475 -};
6476 -
6477 -static const u32 ar9462_2p1_baseband_core_mix_rxgain[][2] = {
6478 -       /* Addr      allmodes  */
6479 -       {0x00009fd0, 0x0a2d6b93},
6480 -};
6481 -
6482 -static const u32 ar9462_2p1_baseband_postamble_mix_rxgain[][5] = {
6483 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
6484 -       {0x00009820, 0x206a022e, 0x206a022e, 0x206a01ae, 0x206a01ae},
6485 -       {0x00009824, 0x63c640de, 0x5ac640d0, 0x63c640da, 0x63c640da},
6486 -       {0x00009828, 0x0796be89, 0x0696b081, 0x0916be81, 0x0916be81},
6487 -       {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000d8, 0x6c4000d8},
6488 -       {0x00009e10, 0x92c88d2e, 0x7ec88d2e, 0x7ec86d2e, 0x7ec86d2e},
6489 -       {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3236605e, 0x32395c5e},
6490 -};
6491 -
6492 -static const u32 ar9462_2p1_baseband_postamble_5g_xlna[][5] = {
6493 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
6494 -       {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c282},
6495 -};
6496 -
6497 -static const u32 ar9462_2p1_common_wo_xlna_rx_gain[][2] = {
6498 -       /* Addr      allmodes  */
6499 -       {0x0000a000, 0x00010000},
6500 -       {0x0000a004, 0x00030002},
6501 -       {0x0000a008, 0x00050004},
6502 -       {0x0000a00c, 0x00810080},
6503 -       {0x0000a010, 0x00830082},
6504 -       {0x0000a014, 0x01810180},
6505 -       {0x0000a018, 0x01830182},
6506 -       {0x0000a01c, 0x01850184},
6507 -       {0x0000a020, 0x01890188},
6508 -       {0x0000a024, 0x018b018a},
6509 -       {0x0000a028, 0x018d018c},
6510 -       {0x0000a02c, 0x03820190},
6511 -       {0x0000a030, 0x03840383},
6512 -       {0x0000a034, 0x03880385},
6513 -       {0x0000a038, 0x038a0389},
6514 -       {0x0000a03c, 0x038c038b},
6515 -       {0x0000a040, 0x0390038d},
6516 -       {0x0000a044, 0x03920391},
6517 -       {0x0000a048, 0x03940393},
6518 -       {0x0000a04c, 0x03960395},
6519 -       {0x0000a050, 0x00000000},
6520 -       {0x0000a054, 0x00000000},
6521 -       {0x0000a058, 0x00000000},
6522 -       {0x0000a05c, 0x00000000},
6523 -       {0x0000a060, 0x00000000},
6524 -       {0x0000a064, 0x00000000},
6525 -       {0x0000a068, 0x00000000},
6526 -       {0x0000a06c, 0x00000000},
6527 -       {0x0000a070, 0x00000000},
6528 -       {0x0000a074, 0x00000000},
6529 -       {0x0000a078, 0x00000000},
6530 -       {0x0000a07c, 0x00000000},
6531 -       {0x0000a080, 0x29292929},
6532 -       {0x0000a084, 0x29292929},
6533 -       {0x0000a088, 0x29292929},
6534 -       {0x0000a08c, 0x29292929},
6535 -       {0x0000a090, 0x22292929},
6536 -       {0x0000a094, 0x1d1d2222},
6537 -       {0x0000a098, 0x0c111117},
6538 -       {0x0000a09c, 0x00030303},
6539 -       {0x0000a0a0, 0x00000000},
6540 -       {0x0000a0a4, 0x00000000},
6541 -       {0x0000a0a8, 0x00000000},
6542 -       {0x0000a0ac, 0x00000000},
6543 -       {0x0000a0b0, 0x00000000},
6544 -       {0x0000a0b4, 0x00000000},
6545 -       {0x0000a0b8, 0x00000000},
6546 -       {0x0000a0bc, 0x00000000},
6547 -       {0x0000a0c0, 0x001f0000},
6548 -       {0x0000a0c4, 0x01000101},
6549 -       {0x0000a0c8, 0x011e011f},
6550 -       {0x0000a0cc, 0x011c011d},
6551 -       {0x0000a0d0, 0x02030204},
6552 -       {0x0000a0d4, 0x02010202},
6553 -       {0x0000a0d8, 0x021f0200},
6554 -       {0x0000a0dc, 0x0302021e},
6555 -       {0x0000a0e0, 0x03000301},
6556 -       {0x0000a0e4, 0x031e031f},
6557 -       {0x0000a0e8, 0x0402031d},
6558 -       {0x0000a0ec, 0x04000401},
6559 -       {0x0000a0f0, 0x041e041f},
6560 -       {0x0000a0f4, 0x0502041d},
6561 -       {0x0000a0f8, 0x05000501},
6562 -       {0x0000a0fc, 0x051e051f},
6563 -       {0x0000a100, 0x06010602},
6564 -       {0x0000a104, 0x061f0600},
6565 -       {0x0000a108, 0x061d061e},
6566 -       {0x0000a10c, 0x07020703},
6567 -       {0x0000a110, 0x07000701},
6568 -       {0x0000a114, 0x00000000},
6569 -       {0x0000a118, 0x00000000},
6570 -       {0x0000a11c, 0x00000000},
6571 -       {0x0000a120, 0x00000000},
6572 -       {0x0000a124, 0x00000000},
6573 -       {0x0000a128, 0x00000000},
6574 -       {0x0000a12c, 0x00000000},
6575 -       {0x0000a130, 0x00000000},
6576 -       {0x0000a134, 0x00000000},
6577 -       {0x0000a138, 0x00000000},
6578 -       {0x0000a13c, 0x00000000},
6579 -       {0x0000a140, 0x001f0000},
6580 -       {0x0000a144, 0x01000101},
6581 -       {0x0000a148, 0x011e011f},
6582 -       {0x0000a14c, 0x011c011d},
6583 -       {0x0000a150, 0x02030204},
6584 -       {0x0000a154, 0x02010202},
6585 -       {0x0000a158, 0x021f0200},
6586 -       {0x0000a15c, 0x0302021e},
6587 -       {0x0000a160, 0x03000301},
6588 -       {0x0000a164, 0x031e031f},
6589 -       {0x0000a168, 0x0402031d},
6590 -       {0x0000a16c, 0x04000401},
6591 -       {0x0000a170, 0x041e041f},
6592 -       {0x0000a174, 0x0502041d},
6593 -       {0x0000a178, 0x05000501},
6594 -       {0x0000a17c, 0x051e051f},
6595 -       {0x0000a180, 0x06010602},
6596 -       {0x0000a184, 0x061f0600},
6597 -       {0x0000a188, 0x061d061e},
6598 -       {0x0000a18c, 0x07020703},
6599 -       {0x0000a190, 0x07000701},
6600 -       {0x0000a194, 0x00000000},
6601 -       {0x0000a198, 0x00000000},
6602 -       {0x0000a19c, 0x00000000},
6603 -       {0x0000a1a0, 0x00000000},
6604 -       {0x0000a1a4, 0x00000000},
6605 -       {0x0000a1a8, 0x00000000},
6606 -       {0x0000a1ac, 0x00000000},
6607 -       {0x0000a1b0, 0x00000000},
6608 -       {0x0000a1b4, 0x00000000},
6609 -       {0x0000a1b8, 0x00000000},
6610 -       {0x0000a1bc, 0x00000000},
6611 -       {0x0000a1c0, 0x00000000},
6612 -       {0x0000a1c4, 0x00000000},
6613 -       {0x0000a1c8, 0x00000000},
6614 -       {0x0000a1cc, 0x00000000},
6615 -       {0x0000a1d0, 0x00000000},
6616 -       {0x0000a1d4, 0x00000000},
6617 -       {0x0000a1d8, 0x00000000},
6618 -       {0x0000a1dc, 0x00000000},
6619 -       {0x0000a1e0, 0x00000000},
6620 -       {0x0000a1e4, 0x00000000},
6621 -       {0x0000a1e8, 0x00000000},
6622 -       {0x0000a1ec, 0x00000000},
6623 -       {0x0000a1f0, 0x00000396},
6624 -       {0x0000a1f4, 0x00000396},
6625 -       {0x0000a1f8, 0x00000396},
6626 -       {0x0000a1fc, 0x00000196},
6627 -       {0x0000b000, 0x00010000},
6628 -       {0x0000b004, 0x00030002},
6629 -       {0x0000b008, 0x00050004},
6630 -       {0x0000b00c, 0x00810080},
6631 -       {0x0000b010, 0x00830082},
6632 -       {0x0000b014, 0x01810180},
6633 -       {0x0000b018, 0x01830182},
6634 -       {0x0000b01c, 0x01850184},
6635 -       {0x0000b020, 0x02810280},
6636 -       {0x0000b024, 0x02830282},
6637 -       {0x0000b028, 0x02850284},
6638 -       {0x0000b02c, 0x02890288},
6639 -       {0x0000b030, 0x028b028a},
6640 -       {0x0000b034, 0x0388028c},
6641 -       {0x0000b038, 0x038a0389},
6642 -       {0x0000b03c, 0x038c038b},
6643 -       {0x0000b040, 0x0390038d},
6644 -       {0x0000b044, 0x03920391},
6645 -       {0x0000b048, 0x03940393},
6646 -       {0x0000b04c, 0x03960395},
6647 -       {0x0000b050, 0x00000000},
6648 -       {0x0000b054, 0x00000000},
6649 -       {0x0000b058, 0x00000000},
6650 -       {0x0000b05c, 0x00000000},
6651 -       {0x0000b060, 0x00000000},
6652 -       {0x0000b064, 0x00000000},
6653 -       {0x0000b068, 0x00000000},
6654 -       {0x0000b06c, 0x00000000},
6655 -       {0x0000b070, 0x00000000},
6656 -       {0x0000b074, 0x00000000},
6657 -       {0x0000b078, 0x00000000},
6658 -       {0x0000b07c, 0x00000000},
6659 -       {0x0000b080, 0x32323232},
6660 -       {0x0000b084, 0x2f2f3232},
6661 -       {0x0000b088, 0x23282a2d},
6662 -       {0x0000b08c, 0x1c1e2123},
6663 -       {0x0000b090, 0x14171919},
6664 -       {0x0000b094, 0x0e0e1214},
6665 -       {0x0000b098, 0x03050707},
6666 -       {0x0000b09c, 0x00030303},
6667 -       {0x0000b0a0, 0x00000000},
6668 -       {0x0000b0a4, 0x00000000},
6669 -       {0x0000b0a8, 0x00000000},
6670 -       {0x0000b0ac, 0x00000000},
6671 -       {0x0000b0b0, 0x00000000},
6672 -       {0x0000b0b4, 0x00000000},
6673 -       {0x0000b0b8, 0x00000000},
6674 -       {0x0000b0bc, 0x00000000},
6675 -       {0x0000b0c0, 0x003f0020},
6676 -       {0x0000b0c4, 0x00400041},
6677 -       {0x0000b0c8, 0x0140005f},
6678 -       {0x0000b0cc, 0x0160015f},
6679 -       {0x0000b0d0, 0x017e017f},
6680 -       {0x0000b0d4, 0x02410242},
6681 -       {0x0000b0d8, 0x025f0240},
6682 -       {0x0000b0dc, 0x027f0260},
6683 -       {0x0000b0e0, 0x0341027e},
6684 -       {0x0000b0e4, 0x035f0340},
6685 -       {0x0000b0e8, 0x037f0360},
6686 -       {0x0000b0ec, 0x04400441},
6687 -       {0x0000b0f0, 0x0460045f},
6688 -       {0x0000b0f4, 0x0541047f},
6689 -       {0x0000b0f8, 0x055f0540},
6690 -       {0x0000b0fc, 0x057f0560},
6691 -       {0x0000b100, 0x06400641},
6692 -       {0x0000b104, 0x0660065f},
6693 -       {0x0000b108, 0x067e067f},
6694 -       {0x0000b10c, 0x07410742},
6695 -       {0x0000b110, 0x075f0740},
6696 -       {0x0000b114, 0x077f0760},
6697 -       {0x0000b118, 0x07800781},
6698 -       {0x0000b11c, 0x07a0079f},
6699 -       {0x0000b120, 0x07c107bf},
6700 -       {0x0000b124, 0x000007c0},
6701 -       {0x0000b128, 0x00000000},
6702 -       {0x0000b12c, 0x00000000},
6703 -       {0x0000b130, 0x00000000},
6704 -       {0x0000b134, 0x00000000},
6705 -       {0x0000b138, 0x00000000},
6706 -       {0x0000b13c, 0x00000000},
6707 -       {0x0000b140, 0x003f0020},
6708 -       {0x0000b144, 0x00400041},
6709 -       {0x0000b148, 0x0140005f},
6710 -       {0x0000b14c, 0x0160015f},
6711 -       {0x0000b150, 0x017e017f},
6712 -       {0x0000b154, 0x02410242},
6713 -       {0x0000b158, 0x025f0240},
6714 -       {0x0000b15c, 0x027f0260},
6715 -       {0x0000b160, 0x0341027e},
6716 -       {0x0000b164, 0x035f0340},
6717 -       {0x0000b168, 0x037f0360},
6718 -       {0x0000b16c, 0x04400441},
6719 -       {0x0000b170, 0x0460045f},
6720 -       {0x0000b174, 0x0541047f},
6721 -       {0x0000b178, 0x055f0540},
6722 -       {0x0000b17c, 0x057f0560},
6723 -       {0x0000b180, 0x06400641},
6724 -       {0x0000b184, 0x0660065f},
6725 -       {0x0000b188, 0x067e067f},
6726 -       {0x0000b18c, 0x07410742},
6727 -       {0x0000b190, 0x075f0740},
6728 -       {0x0000b194, 0x077f0760},
6729 -       {0x0000b198, 0x07800781},
6730 -       {0x0000b19c, 0x07a0079f},
6731 -       {0x0000b1a0, 0x07c107bf},
6732 -       {0x0000b1a4, 0x000007c0},
6733 -       {0x0000b1a8, 0x00000000},
6734 -       {0x0000b1ac, 0x00000000},
6735 -       {0x0000b1b0, 0x00000000},
6736 -       {0x0000b1b4, 0x00000000},
6737 -       {0x0000b1b8, 0x00000000},
6738 -       {0x0000b1bc, 0x00000000},
6739 -       {0x0000b1c0, 0x00000000},
6740 -       {0x0000b1c4, 0x00000000},
6741 -       {0x0000b1c8, 0x00000000},
6742 -       {0x0000b1cc, 0x00000000},
6743 -       {0x0000b1d0, 0x00000000},
6744 -       {0x0000b1d4, 0x00000000},
6745 -       {0x0000b1d8, 0x00000000},
6746 -       {0x0000b1dc, 0x00000000},
6747 -       {0x0000b1e0, 0x00000000},
6748 -       {0x0000b1e4, 0x00000000},
6749 -       {0x0000b1e8, 0x00000000},
6750 -       {0x0000b1ec, 0x00000000},
6751 -       {0x0000b1f0, 0x00000396},
6752 -       {0x0000b1f4, 0x00000396},
6753 -       {0x0000b1f8, 0x00000396},
6754 -       {0x0000b1fc, 0x00000196},
6755 -};
6756 -
6757 -static const u32 ar9462_2p1_common_5g_xlna_only_rx_gain[][2] = {
6758 -       /* Addr      allmodes  */
6759 -       {0x0000a000, 0x00010000},
6760 -       {0x0000a004, 0x00030002},
6761 -       {0x0000a008, 0x00050004},
6762 -       {0x0000a00c, 0x00810080},
6763 -       {0x0000a010, 0x00830082},
6764 -       {0x0000a014, 0x01810180},
6765 -       {0x0000a018, 0x01830182},
6766 -       {0x0000a01c, 0x01850184},
6767 -       {0x0000a020, 0x01890188},
6768 -       {0x0000a024, 0x018b018a},
6769 -       {0x0000a028, 0x018d018c},
6770 -       {0x0000a02c, 0x03820190},
6771 -       {0x0000a030, 0x03840383},
6772 -       {0x0000a034, 0x03880385},
6773 -       {0x0000a038, 0x038a0389},
6774 -       {0x0000a03c, 0x038c038b},
6775 -       {0x0000a040, 0x0390038d},
6776 -       {0x0000a044, 0x03920391},
6777 -       {0x0000a048, 0x03940393},
6778 -       {0x0000a04c, 0x03960395},
6779 -       {0x0000a050, 0x00000000},
6780 -       {0x0000a054, 0x00000000},
6781 -       {0x0000a058, 0x00000000},
6782 -       {0x0000a05c, 0x00000000},
6783 -       {0x0000a060, 0x00000000},
6784 -       {0x0000a064, 0x00000000},
6785 -       {0x0000a068, 0x00000000},
6786 -       {0x0000a06c, 0x00000000},
6787 -       {0x0000a070, 0x00000000},
6788 -       {0x0000a074, 0x00000000},
6789 -       {0x0000a078, 0x00000000},
6790 -       {0x0000a07c, 0x00000000},
6791 -       {0x0000a080, 0x29292929},
6792 -       {0x0000a084, 0x29292929},
6793 -       {0x0000a088, 0x29292929},
6794 -       {0x0000a08c, 0x29292929},
6795 -       {0x0000a090, 0x22292929},
6796 -       {0x0000a094, 0x1d1d2222},
6797 -       {0x0000a098, 0x0c111117},
6798 -       {0x0000a09c, 0x00030303},
6799 -       {0x0000a0a0, 0x00000000},
6800 -       {0x0000a0a4, 0x00000000},
6801 -       {0x0000a0a8, 0x00000000},
6802 -       {0x0000a0ac, 0x00000000},
6803 -       {0x0000a0b0, 0x00000000},
6804 -       {0x0000a0b4, 0x00000000},
6805 -       {0x0000a0b8, 0x00000000},
6806 -       {0x0000a0bc, 0x00000000},
6807 -       {0x0000a0c0, 0x001f0000},
6808 -       {0x0000a0c4, 0x01000101},
6809 -       {0x0000a0c8, 0x011e011f},
6810 -       {0x0000a0cc, 0x011c011d},
6811 -       {0x0000a0d0, 0x02030204},
6812 -       {0x0000a0d4, 0x02010202},
6813 -       {0x0000a0d8, 0x021f0200},
6814 -       {0x0000a0dc, 0x0302021e},
6815 -       {0x0000a0e0, 0x03000301},
6816 -       {0x0000a0e4, 0x031e031f},
6817 -       {0x0000a0e8, 0x0402031d},
6818 -       {0x0000a0ec, 0x04000401},
6819 -       {0x0000a0f0, 0x041e041f},
6820 -       {0x0000a0f4, 0x0502041d},
6821 -       {0x0000a0f8, 0x05000501},
6822 -       {0x0000a0fc, 0x051e051f},
6823 -       {0x0000a100, 0x06010602},
6824 -       {0x0000a104, 0x061f0600},
6825 -       {0x0000a108, 0x061d061e},
6826 -       {0x0000a10c, 0x07020703},
6827 -       {0x0000a110, 0x07000701},
6828 -       {0x0000a114, 0x00000000},
6829 -       {0x0000a118, 0x00000000},
6830 -       {0x0000a11c, 0x00000000},
6831 -       {0x0000a120, 0x00000000},
6832 -       {0x0000a124, 0x00000000},
6833 -       {0x0000a128, 0x00000000},
6834 -       {0x0000a12c, 0x00000000},
6835 -       {0x0000a130, 0x00000000},
6836 -       {0x0000a134, 0x00000000},
6837 -       {0x0000a138, 0x00000000},
6838 -       {0x0000a13c, 0x00000000},
6839 -       {0x0000a140, 0x001f0000},
6840 -       {0x0000a144, 0x01000101},
6841 -       {0x0000a148, 0x011e011f},
6842 -       {0x0000a14c, 0x011c011d},
6843 -       {0x0000a150, 0x02030204},
6844 -       {0x0000a154, 0x02010202},
6845 -       {0x0000a158, 0x021f0200},
6846 -       {0x0000a15c, 0x0302021e},
6847 -       {0x0000a160, 0x03000301},
6848 -       {0x0000a164, 0x031e031f},
6849 -       {0x0000a168, 0x0402031d},
6850 -       {0x0000a16c, 0x04000401},
6851 -       {0x0000a170, 0x041e041f},
6852 -       {0x0000a174, 0x0502041d},
6853 -       {0x0000a178, 0x05000501},
6854 -       {0x0000a17c, 0x051e051f},
6855 -       {0x0000a180, 0x06010602},
6856 -       {0x0000a184, 0x061f0600},
6857 -       {0x0000a188, 0x061d061e},
6858 -       {0x0000a18c, 0x07020703},
6859 -       {0x0000a190, 0x07000701},
6860 -       {0x0000a194, 0x00000000},
6861 -       {0x0000a198, 0x00000000},
6862 -       {0x0000a19c, 0x00000000},
6863 -       {0x0000a1a0, 0x00000000},
6864 -       {0x0000a1a4, 0x00000000},
6865 -       {0x0000a1a8, 0x00000000},
6866 -       {0x0000a1ac, 0x00000000},
6867 -       {0x0000a1b0, 0x00000000},
6868 -       {0x0000a1b4, 0x00000000},
6869 -       {0x0000a1b8, 0x00000000},
6870 -       {0x0000a1bc, 0x00000000},
6871 -       {0x0000a1c0, 0x00000000},
6872 -       {0x0000a1c4, 0x00000000},
6873 -       {0x0000a1c8, 0x00000000},
6874 -       {0x0000a1cc, 0x00000000},
6875 -       {0x0000a1d0, 0x00000000},
6876 -       {0x0000a1d4, 0x00000000},
6877 -       {0x0000a1d8, 0x00000000},
6878 -       {0x0000a1dc, 0x00000000},
6879 -       {0x0000a1e0, 0x00000000},
6880 -       {0x0000a1e4, 0x00000000},
6881 -       {0x0000a1e8, 0x00000000},
6882 -       {0x0000a1ec, 0x00000000},
6883 -       {0x0000a1f0, 0x00000396},
6884 -       {0x0000a1f4, 0x00000396},
6885 -       {0x0000a1f8, 0x00000396},
6886 -       {0x0000a1fc, 0x00000196},
6887 -       {0x0000b000, 0x00010000},
6888 -       {0x0000b004, 0x00030002},
6889 -       {0x0000b008, 0x00050004},
6890 -       {0x0000b00c, 0x00810080},
6891 -       {0x0000b010, 0x00830082},
6892 -       {0x0000b014, 0x01810180},
6893 -       {0x0000b018, 0x01830182},
6894 -       {0x0000b01c, 0x01850184},
6895 -       {0x0000b020, 0x02810280},
6896 -       {0x0000b024, 0x02830282},
6897 -       {0x0000b028, 0x02850284},
6898 -       {0x0000b02c, 0x02890288},
6899 -       {0x0000b030, 0x028b028a},
6900 -       {0x0000b034, 0x0388028c},
6901 -       {0x0000b038, 0x038a0389},
6902 -       {0x0000b03c, 0x038c038b},
6903 -       {0x0000b040, 0x0390038d},
6904 -       {0x0000b044, 0x03920391},
6905 -       {0x0000b048, 0x03940393},
6906 -       {0x0000b04c, 0x03960395},
6907 -       {0x0000b050, 0x00000000},
6908 -       {0x0000b054, 0x00000000},
6909 -       {0x0000b058, 0x00000000},
6910 -       {0x0000b05c, 0x00000000},
6911 -       {0x0000b060, 0x00000000},
6912 -       {0x0000b064, 0x00000000},
6913 -       {0x0000b068, 0x00000000},
6914 -       {0x0000b06c, 0x00000000},
6915 -       {0x0000b070, 0x00000000},
6916 -       {0x0000b074, 0x00000000},
6917 -       {0x0000b078, 0x00000000},
6918 -       {0x0000b07c, 0x00000000},
6919 -       {0x0000b080, 0x2a2d2f32},
6920 -       {0x0000b084, 0x21232328},
6921 -       {0x0000b088, 0x19191c1e},
6922 -       {0x0000b08c, 0x12141417},
6923 -       {0x0000b090, 0x07070e0e},
6924 -       {0x0000b094, 0x03030305},
6925 -       {0x0000b098, 0x00000003},
6926 -       {0x0000b09c, 0x00000000},
6927 -       {0x0000b0a0, 0x00000000},
6928 -       {0x0000b0a4, 0x00000000},
6929 -       {0x0000b0a8, 0x00000000},
6930 -       {0x0000b0ac, 0x00000000},
6931 -       {0x0000b0b0, 0x00000000},
6932 -       {0x0000b0b4, 0x00000000},
6933 -       {0x0000b0b8, 0x00000000},
6934 -       {0x0000b0bc, 0x00000000},
6935 -       {0x0000b0c0, 0x003f0020},
6936 -       {0x0000b0c4, 0x00400041},
6937 -       {0x0000b0c8, 0x0140005f},
6938 -       {0x0000b0cc, 0x0160015f},
6939 -       {0x0000b0d0, 0x017e017f},
6940 -       {0x0000b0d4, 0x02410242},
6941 -       {0x0000b0d8, 0x025f0240},
6942 -       {0x0000b0dc, 0x027f0260},
6943 -       {0x0000b0e0, 0x0341027e},
6944 -       {0x0000b0e4, 0x035f0340},
6945 -       {0x0000b0e8, 0x037f0360},
6946 -       {0x0000b0ec, 0x04400441},
6947 -       {0x0000b0f0, 0x0460045f},
6948 -       {0x0000b0f4, 0x0541047f},
6949 -       {0x0000b0f8, 0x055f0540},
6950 -       {0x0000b0fc, 0x057f0560},
6951 -       {0x0000b100, 0x06400641},
6952 -       {0x0000b104, 0x0660065f},
6953 -       {0x0000b108, 0x067e067f},
6954 -       {0x0000b10c, 0x07410742},
6955 -       {0x0000b110, 0x075f0740},
6956 -       {0x0000b114, 0x077f0760},
6957 -       {0x0000b118, 0x07800781},
6958 -       {0x0000b11c, 0x07a0079f},
6959 -       {0x0000b120, 0x07c107bf},
6960 -       {0x0000b124, 0x000007c0},
6961 -       {0x0000b128, 0x00000000},
6962 -       {0x0000b12c, 0x00000000},
6963 -       {0x0000b130, 0x00000000},
6964 -       {0x0000b134, 0x00000000},
6965 -       {0x0000b138, 0x00000000},
6966 -       {0x0000b13c, 0x00000000},
6967 -       {0x0000b140, 0x003f0020},
6968 -       {0x0000b144, 0x00400041},
6969 -       {0x0000b148, 0x0140005f},
6970 -       {0x0000b14c, 0x0160015f},
6971 -       {0x0000b150, 0x017e017f},
6972 -       {0x0000b154, 0x02410242},
6973 -       {0x0000b158, 0x025f0240},
6974 -       {0x0000b15c, 0x027f0260},
6975 -       {0x0000b160, 0x0341027e},
6976 -       {0x0000b164, 0x035f0340},
6977 -       {0x0000b168, 0x037f0360},
6978 -       {0x0000b16c, 0x04400441},
6979 -       {0x0000b170, 0x0460045f},
6980 -       {0x0000b174, 0x0541047f},
6981 -       {0x0000b178, 0x055f0540},
6982 -       {0x0000b17c, 0x057f0560},
6983 -       {0x0000b180, 0x06400641},
6984 -       {0x0000b184, 0x0660065f},
6985 -       {0x0000b188, 0x067e067f},
6986 -       {0x0000b18c, 0x07410742},
6987 -       {0x0000b190, 0x075f0740},
6988 -       {0x0000b194, 0x077f0760},
6989 -       {0x0000b198, 0x07800781},
6990 -       {0x0000b19c, 0x07a0079f},
6991 -       {0x0000b1a0, 0x07c107bf},
6992 -       {0x0000b1a4, 0x000007c0},
6993 -       {0x0000b1a8, 0x00000000},
6994 -       {0x0000b1ac, 0x00000000},
6995 -       {0x0000b1b0, 0x00000000},
6996 -       {0x0000b1b4, 0x00000000},
6997 -       {0x0000b1b8, 0x00000000},
6998 -       {0x0000b1bc, 0x00000000},
6999 -       {0x0000b1c0, 0x00000000},
7000 -       {0x0000b1c4, 0x00000000},
7001 -       {0x0000b1c8, 0x00000000},
7002 -       {0x0000b1cc, 0x00000000},
7003 -       {0x0000b1d0, 0x00000000},
7004 -       {0x0000b1d4, 0x00000000},
7005 -       {0x0000b1d8, 0x00000000},
7006 -       {0x0000b1dc, 0x00000000},
7007 -       {0x0000b1e0, 0x00000000},
7008 -       {0x0000b1e4, 0x00000000},
7009 -       {0x0000b1e8, 0x00000000},
7010 -       {0x0000b1ec, 0x00000000},
7011 -       {0x0000b1f0, 0x00000396},
7012 -       {0x0000b1f4, 0x00000396},
7013 -       {0x0000b1f8, 0x00000396},
7014 -       {0x0000b1fc, 0x00000196},
7015 -};
7016 -
7017 -static const u32 ar9462_2p1_modes_low_ob_db_tx_gain[][5] = {
7018 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7019 -       {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
7020 -       {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
7021 -       {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
7022 -       {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
7023 -       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7024 -       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
7025 -       {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7026 -       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7027 -       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
7028 -       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
7029 -       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
7030 -       {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
7031 -       {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
7032 -       {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
7033 -       {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
7034 -       {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
7035 -       {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
7036 -       {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
7037 -       {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
7038 -       {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
7039 -       {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
7040 -       {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
7041 -       {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
7042 -       {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
7043 -       {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
7044 -       {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
7045 -       {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
7046 -       {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
7047 -       {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
7048 -       {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
7049 -       {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
7050 -       {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
7051 -       {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7052 -       {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7053 -       {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7054 -       {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7055 -       {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7056 -       {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7057 -       {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7058 -       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7059 -       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7060 -       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7061 -       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7062 -       {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7063 -       {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
7064 -       {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
7065 -       {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
7066 -       {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
7067 -       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
7068 -       {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
7069 -       {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
7070 -       {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
7071 -       {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
7072 -       {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
7073 -       {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
7074 -       {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
7075 -       {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
7076 -       {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
7077 -       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7078 -       {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
7079 -       {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
7080 -       {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
7081 -       {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
7082 -       {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
7083 -       {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
7084 -};
7085 -
7086 -static const u32 ar9462_2p1_modes_high_ob_db_tx_gain[][5] = {
7087 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7088 -       {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
7089 -       {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
7090 -       {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
7091 -       {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
7092 -       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7093 -       {0x0000a410, 0x000050da, 0x000050da, 0x000050de, 0x000050de},
7094 -       {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7095 -       {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
7096 -       {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
7097 -       {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
7098 -       {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
7099 -       {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
7100 -       {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
7101 -       {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
7102 -       {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
7103 -       {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
7104 -       {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
7105 -       {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
7106 -       {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
7107 -       {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
7108 -       {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
7109 -       {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
7110 -       {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
7111 -       {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
7112 -       {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
7113 -       {0x0000a548, 0x55025eb3, 0x55025eb3, 0x3e001a81, 0x3e001a81},
7114 -       {0x0000a54c, 0x58025ef3, 0x58025ef3, 0x42001a83, 0x42001a83},
7115 -       {0x0000a550, 0x5d025ef6, 0x5d025ef6, 0x44001a84, 0x44001a84},
7116 -       {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
7117 -       {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
7118 -       {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
7119 -       {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
7120 -       {0x0000a564, 0x751ffff6, 0x751ffff6, 0x56001eec, 0x56001eec},
7121 -       {0x0000a568, 0x751ffff6, 0x751ffff6, 0x58001ef0, 0x58001ef0},
7122 -       {0x0000a56c, 0x751ffff6, 0x751ffff6, 0x5a001ef4, 0x5a001ef4},
7123 -       {0x0000a570, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
7124 -       {0x0000a574, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
7125 -       {0x0000a578, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
7126 -       {0x0000a57c, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
7127 -       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7128 -       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7129 -       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7130 -       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7131 -       {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
7132 -       {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
7133 -       {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
7134 -       {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
7135 -       {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
7136 -       {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
7137 -       {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
7138 -       {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7139 -       {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7140 -       {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7141 -       {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7142 -       {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7143 -       {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
7144 -       {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
7145 -       {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
7146 -       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7147 -       {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
7148 -       {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
7149 -       {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
7150 -       {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
7151 -       {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
7152 -       {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
7153 -};
7154 -
7155 -static const u32 ar9462_2p1_modes_mix_ob_db_tx_gain[][5] = {
7156 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7157 -       {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
7158 -       {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
7159 -       {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
7160 -       {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
7161 -       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7162 -       {0x0000a410, 0x0000d0da, 0x0000d0da, 0x0000d0de, 0x0000d0de},
7163 -       {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7164 -       {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
7165 -       {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
7166 -       {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
7167 -       {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
7168 -       {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
7169 -       {0x0000a514, 0x18022622, 0x18022622, 0x12000400, 0x12000400},
7170 -       {0x0000a518, 0x1b022822, 0x1b022822, 0x16000402, 0x16000402},
7171 -       {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
7172 -       {0x0000a520, 0x22022c41, 0x22022c41, 0x1c000603, 0x1c000603},
7173 -       {0x0000a524, 0x28023042, 0x28023042, 0x21000a02, 0x21000a02},
7174 -       {0x0000a528, 0x2c023044, 0x2c023044, 0x25000a04, 0x25000a04},
7175 -       {0x0000a52c, 0x2f023644, 0x2f023644, 0x28000a20, 0x28000a20},
7176 -       {0x0000a530, 0x34025643, 0x34025643, 0x2c000e20, 0x2c000e20},
7177 -       {0x0000a534, 0x38025a44, 0x38025a44, 0x30000e22, 0x30000e22},
7178 -       {0x0000a538, 0x3b025e45, 0x3b025e45, 0x34000e24, 0x34000e24},
7179 -       {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x38001640, 0x38001640},
7180 -       {0x0000a540, 0x48025e6c, 0x48025e6c, 0x3c001660, 0x3c001660},
7181 -       {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3f001861, 0x3f001861},
7182 -       {0x0000a548, 0x55025eb3, 0x55025eb3, 0x43001a81, 0x43001a81},
7183 -       {0x0000a54c, 0x58025ef3, 0x58025ef3, 0x47001a83, 0x47001a83},
7184 -       {0x0000a550, 0x5d025ef6, 0x5d025ef6, 0x4a001c84, 0x4a001c84},
7185 -       {0x0000a554, 0x62025f56, 0x62025f56, 0x4e001ce3, 0x4e001ce3},
7186 -       {0x0000a558, 0x66027f56, 0x66027f56, 0x52001ce5, 0x52001ce5},
7187 -       {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x56001ce9, 0x56001ce9},
7188 -       {0x0000a560, 0x70049f56, 0x70049f56, 0x5a001ceb, 0x5a001ceb},
7189 -       {0x0000a564, 0x751ffff6, 0x751ffff6, 0x5c001eec, 0x5c001eec},
7190 -       {0x0000a568, 0x751ffff6, 0x751ffff6, 0x5e001ef0, 0x5e001ef0},
7191 -       {0x0000a56c, 0x751ffff6, 0x751ffff6, 0x60001ef4, 0x60001ef4},
7192 -       {0x0000a570, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
7193 -       {0x0000a574, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
7194 -       {0x0000a578, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
7195 -       {0x0000a57c, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
7196 -       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7197 -       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7198 -       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7199 -       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7200 -       {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
7201 -       {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
7202 -       {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
7203 -       {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
7204 -       {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
7205 -       {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
7206 -       {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
7207 -       {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7208 -       {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7209 -       {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7210 -       {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7211 -       {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7212 -       {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
7213 -       {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
7214 -       {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
7215 -       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7216 -};
7217 -
7218 -static const u32 ar9462_2p1_modes_fast_clock[][3] = {
7219 -       /* Addr      5G_HT20     5G_HT40   */
7220 -       {0x00001030, 0x00000268, 0x000004d0},
7221 -       {0x00001070, 0x0000018c, 0x00000318},
7222 -       {0x000010b0, 0x00000fd0, 0x00001fa0},
7223 -       {0x00008014, 0x044c044c, 0x08980898},
7224 -       {0x0000801c, 0x148ec02b, 0x148ec057},
7225 -       {0x00008318, 0x000044c0, 0x00008980},
7226 -       {0x00009e00, 0x0372131c, 0x0372131c},
7227 -       {0x0000a230, 0x0000400b, 0x00004016},
7228 -       {0x0000a254, 0x00000898, 0x00001130},
7229 -};
7230 -
7231 -static const u32 ar9462_2p1_baseband_core_txfir_coeff_japan_2484[][2] = {
7232 -       /* Addr      allmodes  */
7233 -       {0x0000a398, 0x00000000},
7234 -       {0x0000a39c, 0x6f7f0301},
7235 -       {0x0000a3a0, 0xca9228ee},
7236 -};
7237 -
7238  #endif /* INITVALS_9462_2P1_H */
7239 --- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
7240 +++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
7241 @@ -32,13 +32,6 @@ static const u32 ar9485_1_1_mac_postambl
7242         {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
7243  };
7244
7245 -static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2] = {
7246 -       /* Addr      allmodes  */
7247 -       {0x00018c00, 0x18012e5e},
7248 -       {0x00018c04, 0x000801d8},
7249 -       {0x00018c08, 0x0000080c},
7250 -};
7251 -
7252  static const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2] = {
7253         /* Addr      allmodes  */
7254         {0x00009e00, 0x037216a0},
7255 @@ -1101,20 +1094,6 @@ static const u32 ar9485_common_rx_gain_1
7256         {0x0000a1fc, 0x00000296},
7257  };
7258
7259 -static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1[][2] = {
7260 -       /* Addr      allmodes  */
7261 -       {0x00018c00, 0x18052e5e},
7262 -       {0x00018c04, 0x000801d8},
7263 -       {0x00018c08, 0x0000080c},
7264 -};
7265 -
7266 -static const u32 ar9485_1_1_pcie_phy_clkreq_enable_L1[][2] = {
7267 -       /* Addr      allmodes  */
7268 -       {0x00018c00, 0x18053e5e},
7269 -       {0x00018c04, 0x000801d8},
7270 -       {0x00018c08, 0x0000080c},
7271 -};
7272 -
7273  static const u32 ar9485_1_1_soc_preamble[][2] = {
7274         /* Addr      allmodes  */
7275         {0x00004014, 0xba280400},
7276 @@ -1173,13 +1152,6 @@ static const u32 ar9485_1_1_baseband_pos
7277         {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7278  };
7279
7280 -static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
7281 -       /* Addr      allmodes  */
7282 -       {0x00018c00, 0x18013e5e},
7283 -       {0x00018c04, 0x000801d8},
7284 -       {0x00018c08, 0x0000080c},
7285 -};
7286 -
7287  static const u32 ar9485_1_1_radio_postamble[][2] = {
7288         /* Addr      allmodes  */
7289         {0x0001609c, 0x0b283f31},
7290 @@ -1358,4 +1330,18 @@ static const u32 ar9485_1_1_baseband_cor
7291         {0x0000a3a0, 0xca9228ee},
7292  };
7293
7294 +static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
7295 +       /* Addr      allmodes  */
7296 +       {0x00018c00, 0x18013e5e},
7297 +       {0x00018c04, 0x000801d8},
7298 +       {0x00018c08, 0x0000080c},
7299 +};
7300 +
7301 +static const u32 ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1[][2] = {
7302 +       /* Addr      allmodes  */
7303 +       {0x00018c00, 0x1801265e},
7304 +       {0x00018c04, 0x000801d8},
7305 +       {0x00018c08, 0x0000080c},
7306 +};
7307 +
7308  #endif /* INITVALS_9485_H */
7309 --- a/drivers/net/wireless/ath/ath9k/pci.c
7310 +++ b/drivers/net/wireless/ath/ath9k/pci.c
7311 @@ -195,6 +195,93 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_i
7312                          0x3219),
7313           .driver_data = ATH9K_PCI_BT_ANT_DIV },
7314
7315 +       /* AR9485 cards with PLL power-save disabled by default. */
7316 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7317 +                        0x0032,
7318 +                        PCI_VENDOR_ID_AZWAVE,
7319 +                        0x2C97),
7320 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7321 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7322 +                        0x0032,
7323 +                        PCI_VENDOR_ID_AZWAVE,
7324 +                        0x2100),
7325 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7326 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7327 +                        0x0032,
7328 +                        0x1C56, /* ASKEY */
7329 +                        0x4001),
7330 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7331 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7332 +                        0x0032,
7333 +                        0x11AD, /* LITEON */
7334 +                        0x6627),
7335 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7336 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7337 +                        0x0032,
7338 +                        0x11AD, /* LITEON */
7339 +                        0x6628),
7340 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7341 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7342 +                        0x0032,
7343 +                        PCI_VENDOR_ID_FOXCONN,
7344 +                        0xE04E),
7345 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7346 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7347 +                        0x0032,
7348 +                        PCI_VENDOR_ID_FOXCONN,
7349 +                        0xE04F),
7350 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7351 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7352 +                        0x0032,
7353 +                        0x144F, /* ASKEY */
7354 +                        0x7197),
7355 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7356 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7357 +                        0x0032,
7358 +                        0x1B9A, /* XAVI */
7359 +                        0x2000),
7360 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7361 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7362 +                        0x0032,
7363 +                        0x1B9A, /* XAVI */
7364 +                        0x2001),
7365 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7366 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7367 +                        0x0032,
7368 +                        PCI_VENDOR_ID_AZWAVE,
7369 +                        0x1186),
7370 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7371 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7372 +                        0x0032,
7373 +                        PCI_VENDOR_ID_AZWAVE,
7374 +                        0x1F86),
7375 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7376 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7377 +                        0x0032,
7378 +                        PCI_VENDOR_ID_AZWAVE,
7379 +                        0x1195),
7380 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7381 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7382 +                        0x0032,
7383 +                        PCI_VENDOR_ID_AZWAVE,
7384 +                        0x1F95),
7385 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7386 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7387 +                        0x0032,
7388 +                        0x1B9A, /* XAVI */
7389 +                        0x1C00),
7390 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7391 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7392 +                        0x0032,
7393 +                        0x1B9A, /* XAVI */
7394 +                        0x1C01),
7395 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7396 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
7397 +                        0x0032,
7398 +                        PCI_VENDOR_ID_ASUSTEK,
7399 +                        0x850D),
7400 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
7401 +
7402         { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E  AR9485 */
7403         { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E  AR9580 */
7404
7405 --- a/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
7406 +++ b/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
7407 @@ -20,7 +20,7 @@
7408
7409  /* AR9462 2.0 */
7410
7411 -static const u32 ar9462_modes_fast_clock_2p0[][3] = {
7412 +static const u32 ar9462_2p0_modes_fast_clock[][3] = {
7413         /* Addr      5G_HT20     5G_HT40   */
7414         {0x00001030, 0x00000268, 0x000004d0},
7415         {0x00001070, 0x0000018c, 0x00000318},
7416 @@ -33,13 +33,6 @@ static const u32 ar9462_modes_fast_clock
7417         {0x0000a254, 0x00000898, 0x00001130},
7418  };
7419
7420 -static const u32 ar9462_pciephy_clkreq_enable_L1_2p0[][2] = {
7421 -       /* Addr      allmodes  */
7422 -       {0x00018c00, 0x18253ede},
7423 -       {0x00018c04, 0x000801d8},
7424 -       {0x00018c08, 0x0003780c},
7425 -};
7426 -
7427  static const u32 ar9462_2p0_baseband_postamble[][5] = {
7428         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7429         {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a800d},
7430 @@ -99,7 +92,7 @@ static const u32 ar9462_2p0_baseband_pos
7431         {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
7432  };
7433
7434 -static const u32 ar9462_common_rx_gain_table_2p0[][2] = {
7435 +static const u32 ar9462_2p0_common_rx_gain[][2] = {
7436         /* Addr      allmodes  */
7437         {0x0000a000, 0x00010000},
7438         {0x0000a004, 0x00030002},
7439 @@ -359,20 +352,13 @@ static const u32 ar9462_common_rx_gain_t
7440         {0x0000b1fc, 0x00000196},
7441  };
7442
7443 -static const u32 ar9462_pciephy_clkreq_disable_L1_2p0[][2] = {
7444 +static const u32 ar9462_2p0_pciephy_clkreq_disable_L1[][2] = {
7445         /* Addr      allmodes  */
7446         {0x00018c00, 0x18213ede},
7447         {0x00018c04, 0x000801d8},
7448         {0x00018c08, 0x0003780c},
7449  };
7450
7451 -static const u32 ar9462_pciephy_pll_on_clkreq_disable_L1_2p0[][2] = {
7452 -       /* Addr      allmodes  */
7453 -       {0x00018c00, 0x18212ede},
7454 -       {0x00018c04, 0x000801d8},
7455 -       {0x00018c08, 0x0003780c},
7456 -};
7457 -
7458  static const u32 ar9462_2p0_radio_postamble_sys2ant[][5] = {
7459         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7460         {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
7461 @@ -380,7 +366,7 @@ static const u32 ar9462_2p0_radio_postam
7462         {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
7463  };
7464
7465 -static const u32 ar9462_common_wo_xlna_rx_gain_table_2p0[][2] = {
7466 +static const u32 ar9462_2p0_common_wo_xlna_rx_gain[][2] = {
7467         /* Addr      allmodes  */
7468         {0x0000a000, 0x00010000},
7469         {0x0000a004, 0x00030002},
7470 @@ -647,7 +633,7 @@ static const u32 ar9462_2p0_baseband_cor
7471         {0x0000a3a0, 0xca9228ee},
7472  };
7473
7474 -static const u32 ar9462_modes_low_ob_db_tx_gain_table_2p0[][5] = {
7475 +static const u32 ar9462_2p0_modes_low_ob_db_tx_gain[][5] = {
7476         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7477         {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
7478         {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
7479 @@ -879,7 +865,7 @@ static const u32 ar9462_2p0_radio_postam
7480         {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
7481  };
7482
7483 -static const u32 ar9462_modes_mix_ob_db_tx_gain_table_2p0[][5] = {
7484 +static const u32 ar9462_2p0_modes_mix_ob_db_tx_gain[][5] = {
7485         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7486         {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
7487         {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
7488 @@ -942,7 +928,7 @@ static const u32 ar9462_modes_mix_ob_db_
7489         {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7490  };
7491
7492 -static const u32 ar9462_modes_high_ob_db_tx_gain_table_2p0[][5] = {
7493 +static const u32 ar9462_2p0_modes_high_ob_db_tx_gain[][5] = {
7494         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7495         {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
7496         {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
7497 @@ -1252,7 +1238,7 @@ static const u32 ar9462_2p0_mac_postambl
7498         {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
7499  };
7500
7501 -static const u32 ar9462_common_mixed_rx_gain_table_2p0[][2] = {
7502 +static const u32 ar9462_2p0_common_mixed_rx_gain[][2] = {
7503         /* Addr      allmodes  */
7504         {0x0000a000, 0x00010000},
7505         {0x0000a004, 0x00030002},
7506 @@ -1517,7 +1503,7 @@ static const u32 ar9462_2p0_baseband_pos
7507         {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c282},
7508  };
7509
7510 -static const u32 ar9462_2p0_5g_xlna_only_rxgain[][2] = {
7511 +static const u32 ar9462_2p0_common_5g_xlna_only_rxgain[][2] = {
7512         /* Addr      allmodes  */
7513         {0x0000a000, 0x00010000},
7514         {0x0000a004, 0x00030002},
7515 --- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
7516 +++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
7517 @@ -352,7 +352,7 @@ static const u32 ar9300_2p2_baseband_pos
7518         {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
7519         {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
7520         {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
7521 -       {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
7522 +       {0x0000a2d0, 0x00041983, 0x00041983, 0x00041981, 0x00041982},
7523         {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
7524         {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7525         {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
7526 @@ -378,9 +378,9 @@ static const u32 ar9300_2p2_baseband_cor
7527         {0x00009814, 0x9280c00a},
7528         {0x00009818, 0x00000000},
7529         {0x0000981c, 0x00020028},
7530 -       {0x00009834, 0x6400a290},
7531 +       {0x00009834, 0x6400a190},
7532         {0x00009838, 0x0108ecff},
7533 -       {0x0000983c, 0x0d000600},
7534 +       {0x0000983c, 0x14000600},
7535         {0x00009880, 0x201fff00},
7536         {0x00009884, 0x00001042},
7537         {0x000098a4, 0x00200400},
7538 @@ -401,7 +401,7 @@ static const u32 ar9300_2p2_baseband_cor
7539         {0x00009d04, 0x40206c10},
7540         {0x00009d08, 0x009c4060},
7541         {0x00009d0c, 0x9883800a},
7542 -       {0x00009d10, 0x01834061},
7543 +       {0x00009d10, 0x01884061},
7544         {0x00009d14, 0x00c0040b},
7545         {0x00009d18, 0x00000000},
7546         {0x00009e08, 0x0038230c},
7547 @@ -459,7 +459,7 @@ static const u32 ar9300_2p2_baseband_cor
7548         {0x0000a3e8, 0x20202020},
7549         {0x0000a3ec, 0x20202020},
7550         {0x0000a3f0, 0x00000000},
7551 -       {0x0000a3f4, 0x00000246},
7552 +       {0x0000a3f4, 0x00000000},
7553         {0x0000a3f8, 0x0c9bd380},
7554         {0x0000a3fc, 0x000f0f01},
7555         {0x0000a400, 0x8fa91f01},
7556 @@ -644,7 +644,7 @@ static const u32 ar9300Modes_high_ob_db_
7557         {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
7558         {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
7559         {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7560 -       {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
7561 +       {0x0000a410, 0x000050d4, 0x000050d4, 0x000050d9, 0x000050d9},
7562         {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
7563         {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
7564         {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
7565 @@ -1086,8 +1086,8 @@ static const u32 ar9300Common_rx_gain_ta
7566         {0x0000b074, 0x00000000},
7567         {0x0000b078, 0x00000000},
7568         {0x0000b07c, 0x00000000},
7569 -       {0x0000b080, 0x2a2d2f32},
7570 -       {0x0000b084, 0x21232328},
7571 +       {0x0000b080, 0x23232323},
7572 +       {0x0000b084, 0x21232323},
7573         {0x0000b088, 0x19191c1e},
7574         {0x0000b08c, 0x12141417},
7575         {0x0000b090, 0x07070e0e},
7576 @@ -1385,9 +1385,9 @@ static const u32 ar9300_2p2_mac_core[][2
7577         {0x000081f8, 0x00000000},
7578         {0x000081fc, 0x00000000},
7579         {0x00008240, 0x00100000},
7580 -       {0x00008244, 0x0010f424},
7581 +       {0x00008244, 0x0010f400},
7582         {0x00008248, 0x00000800},
7583 -       {0x0000824c, 0x0001e848},
7584 +       {0x0000824c, 0x0001e800},
7585         {0x00008250, 0x00000000},
7586         {0x00008254, 0x00000000},
7587         {0x00008258, 0x00000000},
7588 @@ -1726,14 +1726,14 @@ static const u32 ar9300PciePhy_pll_on_cl
7589
7590  static const u32 ar9300PciePhy_clkreq_enable_L1_2p2[][2] = {
7591         /* Addr      allmodes  */
7592 -       {0x00004040, 0x08253e5e},
7593 +       {0x00004040, 0x0825365e},
7594         {0x00004040, 0x0008003b},
7595         {0x00004044, 0x00000000},
7596  };
7597
7598  static const u32 ar9300PciePhy_clkreq_disable_L1_2p2[][2] = {
7599         /* Addr      allmodes  */
7600 -       {0x00004040, 0x08213e5e},
7601 +       {0x00004040, 0x0821365e},
7602         {0x00004040, 0x0008003b},
7603         {0x00004044, 0x00000000},
7604  };
7605 --- /dev/null
7606 +++ b/drivers/net/wireless/ath/ath9k/ar9565_1p1_initvals.h
7607 @@ -0,0 +1,64 @@
7608 +/*
7609 + * Copyright (c) 2010-2011 Atheros Communications Inc.
7610 + * Copyright (c) 2011-2012 Qualcomm Atheros Inc.
7611 + *
7612 + * Permission to use, copy, modify, and/or distribute this software for any
7613 + * purpose with or without fee is hereby granted, provided that the above
7614 + * copyright notice and this permission notice appear in all copies.
7615 + *
7616 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
7617 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
7618 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
7619 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
7620 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
7621 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
7622 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
7623 + */
7624 +
7625 +#ifndef INITVALS_9565_1P1_H
7626 +#define INITVALS_9565_1P1_H
7627 +
7628 +/* AR9565 1.1 */
7629 +
7630 +#define ar9565_1p1_mac_core ar9565_1p0_mac_core
7631 +
7632 +#define ar9565_1p1_mac_postamble ar9565_1p0_mac_postamble
7633 +
7634 +#define ar9565_1p1_baseband_core ar9565_1p0_baseband_core
7635 +
7636 +#define ar9565_1p1_baseband_postamble ar9565_1p0_baseband_postamble
7637 +
7638 +#define ar9565_1p1_radio_core ar9565_1p0_radio_core
7639 +
7640 +#define ar9565_1p1_soc_preamble ar9565_1p0_soc_preamble
7641 +
7642 +#define ar9565_1p1_soc_postamble ar9565_1p0_soc_postamble
7643 +
7644 +#define ar9565_1p1_Common_rx_gain_table ar9565_1p0_Common_rx_gain_table
7645 +
7646 +#define ar9565_1p1_Modes_lowest_ob_db_tx_gain_table ar9565_1p0_Modes_lowest_ob_db_tx_gain_table
7647 +
7648 +#define ar9565_1p1_pciephy_clkreq_disable_L1 ar9565_1p0_pciephy_clkreq_disable_L1
7649 +
7650 +#define ar9565_1p1_modes_fast_clock ar9565_1p0_modes_fast_clock
7651 +
7652 +#define ar9565_1p1_common_wo_xlna_rx_gain_table ar9565_1p0_common_wo_xlna_rx_gain_table
7653 +
7654 +#define ar9565_1p1_modes_low_ob_db_tx_gain_table ar9565_1p0_modes_low_ob_db_tx_gain_table
7655 +
7656 +#define ar9565_1p1_modes_high_ob_db_tx_gain_table ar9565_1p0_modes_high_ob_db_tx_gain_table
7657 +
7658 +#define ar9565_1p1_modes_high_power_tx_gain_table ar9565_1p0_modes_high_power_tx_gain_table
7659 +
7660 +#define ar9565_1p1_baseband_core_txfir_coeff_japan_2484 ar9565_1p0_baseband_core_txfir_coeff_japan_2484
7661 +
7662 +static const u32 ar9565_1p1_radio_postamble[][5] = {
7663 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7664 +       {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
7665 +       {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
7666 +       {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
7667 +       {0x0001610c, 0x40000000, 0x40000000, 0x40000000, 0x40000000},
7668 +       {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
7669 +};
7670 +
7671 +#endif /* INITVALS_9565_1P1_H */
7672 --- a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
7673 +++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
7674 @@ -20,18 +20,34 @@
7675
7676  /* AR9580 1.0 */
7677
7678 +#define ar9580_1p0_soc_preamble ar9300_2p2_soc_preamble
7679 +
7680 +#define ar9580_1p0_soc_postamble ar9300_2p2_soc_postamble
7681 +
7682 +#define ar9580_1p0_radio_core ar9300_2p2_radio_core
7683 +
7684 +#define ar9580_1p0_mac_postamble ar9300_2p2_mac_postamble
7685 +
7686 +#define ar9580_1p0_wo_xlna_rx_gain_table ar9300Common_wo_xlna_rx_gain_table_2p2
7687 +
7688 +#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
7689 +
7690 +#define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
7691 +
7692  #define ar9580_1p0_modes_fast_clock ar9300Modes_fast_clock_2p2
7693
7694 +#define ar9580_1p0_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
7695 +
7696  static const u32 ar9580_1p0_radio_postamble[][5] = {
7697         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7698         {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31},
7699         {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800},
7700         {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20},
7701 -       {0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
7702 +       {0x0001610c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
7703         {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
7704 -       {0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
7705 +       {0x0001650c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
7706         {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
7707 -       {0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
7708 +       {0x0001690c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
7709         {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
7710  };
7711
7712 @@ -44,9 +60,9 @@ static const u32 ar9580_1p0_baseband_cor
7713         {0x00009814, 0x3280c00a},
7714         {0x00009818, 0x00000000},
7715         {0x0000981c, 0x00020028},
7716 -       {0x00009834, 0x6400a290},
7717 +       {0x00009834, 0x6400a190},
7718         {0x00009838, 0x0108ecff},
7719 -       {0x0000983c, 0x0d000600},
7720 +       {0x0000983c, 0x14000600},
7721         {0x00009880, 0x201fff00},
7722         {0x00009884, 0x00001042},
7723         {0x000098a4, 0x00200400},
7724 @@ -67,7 +83,7 @@ static const u32 ar9580_1p0_baseband_cor
7725         {0x00009d04, 0x40206c10},
7726         {0x00009d08, 0x009c4060},
7727         {0x00009d0c, 0x9883800a},
7728 -       {0x00009d10, 0x01834061},
7729 +       {0x00009d10, 0x01884061},
7730         {0x00009d14, 0x00c0040b},
7731         {0x00009d18, 0x00000000},
7732         {0x00009e08, 0x0038230c},
7733 @@ -198,8 +214,6 @@ static const u32 ar9580_1p0_baseband_cor
7734         {0x0000c420, 0x00000000},
7735  };
7736
7737 -#define ar9580_1p0_mac_postamble ar9300_2p2_mac_postamble
7738 -
7739  static const u32 ar9580_1p0_low_ob_db_tx_gain_table[][5] = {
7740         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7741         {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
7742 @@ -306,7 +320,112 @@ static const u32 ar9580_1p0_low_ob_db_tx
7743         {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
7744  };
7745
7746 -#define ar9580_1p0_high_power_tx_gain_table ar9580_1p0_low_ob_db_tx_gain_table
7747 +static const u32 ar9580_1p0_high_power_tx_gain_table[][5] = {
7748 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7749 +       {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
7750 +       {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
7751 +       {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
7752 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7753 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
7754 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7755 +       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
7756 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
7757 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
7758 +       {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
7759 +       {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
7760 +       {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
7761 +       {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
7762 +       {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
7763 +       {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
7764 +       {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
7765 +       {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
7766 +       {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
7767 +       {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
7768 +       {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
7769 +       {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
7770 +       {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
7771 +       {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
7772 +       {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
7773 +       {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
7774 +       {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
7775 +       {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
7776 +       {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
7777 +       {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
7778 +       {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
7779 +       {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
7780 +       {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
7781 +       {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
7782 +       {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
7783 +       {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
7784 +       {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
7785 +       {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
7786 +       {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
7787 +       {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
7788 +       {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
7789 +       {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
7790 +       {0x0000a590, 0x15800028, 0x15800028, 0x0f800202, 0x0f800202},
7791 +       {0x0000a594, 0x1b80002b, 0x1b80002b, 0x12800400, 0x12800400},
7792 +       {0x0000a598, 0x1f820028, 0x1f820028, 0x16800402, 0x16800402},
7793 +       {0x0000a59c, 0x2582002b, 0x2582002b, 0x19800404, 0x19800404},
7794 +       {0x0000a5a0, 0x2a84002a, 0x2a84002a, 0x1c800603, 0x1c800603},
7795 +       {0x0000a5a4, 0x2e86002a, 0x2e86002a, 0x21800a02, 0x21800a02},
7796 +       {0x0000a5a8, 0x3382202d, 0x3382202d, 0x25800a04, 0x25800a04},
7797 +       {0x0000a5ac, 0x3884202c, 0x3884202c, 0x28800a20, 0x28800a20},
7798 +       {0x0000a5b0, 0x3c86202c, 0x3c86202c, 0x2c800e20, 0x2c800e20},
7799 +       {0x0000a5b4, 0x4188202d, 0x4188202d, 0x30800e22, 0x30800e22},
7800 +       {0x0000a5b8, 0x4586402d, 0x4586402d, 0x34800e24, 0x34800e24},
7801 +       {0x0000a5bc, 0x4986222d, 0x4986222d, 0x38801640, 0x38801640},
7802 +       {0x0000a5c0, 0x4d862231, 0x4d862231, 0x3c801660, 0x3c801660},
7803 +       {0x0000a5c4, 0x50882231, 0x50882231, 0x3f801861, 0x3f801861},
7804 +       {0x0000a5c8, 0x5688422e, 0x5688422e, 0x43801a81, 0x43801a81},
7805 +       {0x0000a5cc, 0x5a88442e, 0x5a88442e, 0x47801a83, 0x47801a83},
7806 +       {0x0000a5d0, 0x5e8a4431, 0x5e8a4431, 0x4a801c84, 0x4a801c84},
7807 +       {0x0000a5d4, 0x648a4432, 0x648a4432, 0x4e801ce3, 0x4e801ce3},
7808 +       {0x0000a5d8, 0x688a4434, 0x688a4434, 0x52801ce5, 0x52801ce5},
7809 +       {0x0000a5dc, 0x6c8a6434, 0x6c8a6434, 0x56801ce9, 0x56801ce9},
7810 +       {0x0000a5e0, 0x6f8a6633, 0x6f8a6633, 0x5a801ceb, 0x5a801ceb},
7811 +       {0x0000a5e4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
7812 +       {0x0000a5e8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
7813 +       {0x0000a5ec, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
7814 +       {0x0000a5f0, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
7815 +       {0x0000a5f4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
7816 +       {0x0000a5f8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
7817 +       {0x0000a5fc, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
7818 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7819 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7820 +       {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
7821 +       {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
7822 +       {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
7823 +       {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
7824 +       {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
7825 +       {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
7826 +       {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
7827 +       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
7828 +       {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
7829 +       {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
7830 +       {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
7831 +       {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
7832 +       {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
7833 +       {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
7834 +       {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
7835 +       {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
7836 +       {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
7837 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7838 +       {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
7839 +       {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
7840 +       {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
7841 +       {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7842 +       {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
7843 +       {0x00016048, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
7844 +       {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
7845 +       {0x00016288, 0x05a2040a, 0x05a2040a, 0x05a20408, 0x05a20408},
7846 +       {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
7847 +       {0x00016448, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
7848 +       {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
7849 +       {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
7850 +       {0x00016848, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
7851 +       {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
7852 +};
7853
7854  static const u32 ar9580_1p0_lowest_ob_db_tx_gain_table[][5] = {
7855         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7856 @@ -414,8 +533,6 @@ static const u32 ar9580_1p0_lowest_ob_db
7857         {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
7858  };
7859
7860 -#define ar9580_1p0_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
7861 -
7862  static const u32 ar9580_1p0_mac_core[][2] = {
7863         /* Addr      allmodes  */
7864         {0x00000008, 0x00000000},
7865 @@ -679,14 +796,6 @@ static const u32 ar9580_1p0_mixed_ob_db_
7866         {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
7867  };
7868
7869 -#define ar9580_1p0_wo_xlna_rx_gain_table ar9300Common_wo_xlna_rx_gain_table_2p2
7870 -
7871 -#define ar9580_1p0_soc_postamble ar9300_2p2_soc_postamble
7872 -
7873 -#define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
7874 -
7875 -#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
7876 -
7877  static const u32 ar9580_1p0_type6_tx_gain_table[][5] = {
7878         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7879         {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
7880 @@ -761,160 +870,264 @@ static const u32 ar9580_1p0_type6_tx_gai
7881         {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
7882  };
7883
7884 -static const u32 ar9580_1p0_soc_preamble[][2] = {
7885 -       /* Addr      allmodes  */
7886 -       {0x000040a4, 0x00a0c1c9},
7887 -       {0x00007008, 0x00000000},
7888 -       {0x00007020, 0x00000000},
7889 -       {0x00007034, 0x00000002},
7890 -       {0x00007038, 0x000004c2},
7891 -       {0x00007048, 0x00000008},
7892 -};
7893 -
7894 -#define ar9580_1p0_rx_gain_table ar9462_common_rx_gain_table_2p0
7895 -
7896 -static const u32 ar9580_1p0_radio_core[][2] = {
7897 +static const u32 ar9580_1p0_rx_gain_table[][2] = {
7898         /* Addr      allmodes  */
7899 -       {0x00016000, 0x36db6db6},
7900 -       {0x00016004, 0x6db6db40},
7901 -       {0x00016008, 0x73f00000},
7902 -       {0x0001600c, 0x00000000},
7903 -       {0x00016040, 0x7f80fff8},
7904 -       {0x0001604c, 0x76d005b5},
7905 -       {0x00016050, 0x556cf031},
7906 -       {0x00016054, 0x13449440},
7907 -       {0x00016058, 0x0c51c92c},
7908 -       {0x0001605c, 0x3db7fffc},
7909 -       {0x00016060, 0xfffffffc},
7910 -       {0x00016064, 0x000f0278},
7911 -       {0x0001606c, 0x6db60000},
7912 -       {0x00016080, 0x00000000},
7913 -       {0x00016084, 0x0e48048c},
7914 -       {0x00016088, 0x54214514},
7915 -       {0x0001608c, 0x119f481e},
7916 -       {0x00016090, 0x24926490},
7917 -       {0x00016098, 0xd2888888},
7918 -       {0x000160a0, 0x0a108ffe},
7919 -       {0x000160a4, 0x812fc370},
7920 -       {0x000160a8, 0x423c8000},
7921 -       {0x000160b4, 0x92480080},
7922 -       {0x000160c0, 0x00adb6d0},
7923 -       {0x000160c4, 0x6db6db60},
7924 -       {0x000160c8, 0x6db6db6c},
7925 -       {0x000160cc, 0x01e6c000},
7926 -       {0x00016100, 0x3fffbe01},
7927 -       {0x00016104, 0xfff80000},
7928 -       {0x00016108, 0x00080010},
7929 -       {0x00016144, 0x02084080},
7930 -       {0x00016148, 0x00000000},
7931 -       {0x00016280, 0x058a0001},
7932 -       {0x00016284, 0x3d840208},
7933 -       {0x00016288, 0x05a20408},
7934 -       {0x0001628c, 0x00038c07},
7935 -       {0x00016290, 0x00000004},
7936 -       {0x00016294, 0x458aa14f},
7937 -       {0x00016380, 0x00000000},
7938 -       {0x00016384, 0x00000000},
7939 -       {0x00016388, 0x00800700},
7940 -       {0x0001638c, 0x00800700},
7941 -       {0x00016390, 0x00800700},
7942 -       {0x00016394, 0x00000000},
7943 -       {0x00016398, 0x00000000},
7944 -       {0x0001639c, 0x00000000},
7945 -       {0x000163a0, 0x00000001},
7946 -       {0x000163a4, 0x00000001},
7947 -       {0x000163a8, 0x00000000},
7948 -       {0x000163ac, 0x00000000},
7949 -       {0x000163b0, 0x00000000},
7950 -       {0x000163b4, 0x00000000},
7951 -       {0x000163b8, 0x00000000},
7952 -       {0x000163bc, 0x00000000},
7953 -       {0x000163c0, 0x000000a0},
7954 -       {0x000163c4, 0x000c0000},
7955 -       {0x000163c8, 0x14021402},
7956 -       {0x000163cc, 0x00001402},
7957 -       {0x000163d0, 0x00000000},
7958 -       {0x000163d4, 0x00000000},
7959 -       {0x00016400, 0x36db6db6},
7960 -       {0x00016404, 0x6db6db40},
7961 -       {0x00016408, 0x73f00000},
7962 -       {0x0001640c, 0x00000000},
7963 -       {0x00016440, 0x7f80fff8},
7964 -       {0x0001644c, 0x76d005b5},
7965 -       {0x00016450, 0x556cf031},
7966 -       {0x00016454, 0x13449440},
7967 -       {0x00016458, 0x0c51c92c},
7968 -       {0x0001645c, 0x3db7fffc},
7969 -       {0x00016460, 0xfffffffc},
7970 -       {0x00016464, 0x000f0278},
7971 -       {0x0001646c, 0x6db60000},
7972 -       {0x00016500, 0x3fffbe01},
7973 -       {0x00016504, 0xfff80000},
7974 -       {0x00016508, 0x00080010},
7975 -       {0x00016544, 0x02084080},
7976 -       {0x00016548, 0x00000000},
7977 -       {0x00016780, 0x00000000},
7978 -       {0x00016784, 0x00000000},
7979 -       {0x00016788, 0x00800700},
7980 -       {0x0001678c, 0x00800700},
7981 -       {0x00016790, 0x00800700},
7982 -       {0x00016794, 0x00000000},
7983 -       {0x00016798, 0x00000000},
7984 -       {0x0001679c, 0x00000000},
7985 -       {0x000167a0, 0x00000001},
7986 -       {0x000167a4, 0x00000001},
7987 -       {0x000167a8, 0x00000000},
7988 -       {0x000167ac, 0x00000000},
7989 -       {0x000167b0, 0x00000000},
7990 -       {0x000167b4, 0x00000000},
7991 -       {0x000167b8, 0x00000000},
7992 -       {0x000167bc, 0x00000000},
7993 -       {0x000167c0, 0x000000a0},
7994 -       {0x000167c4, 0x000c0000},
7995 -       {0x000167c8, 0x14021402},
7996 -       {0x000167cc, 0x00001402},
7997 -       {0x000167d0, 0x00000000},
7998 -       {0x000167d4, 0x00000000},
7999 -       {0x00016800, 0x36db6db6},
8000 -       {0x00016804, 0x6db6db40},
8001 -       {0x00016808, 0x73f00000},
8002 -       {0x0001680c, 0x00000000},
8003 -       {0x00016840, 0x7f80fff8},
8004 -       {0x0001684c, 0x76d005b5},
8005 -       {0x00016850, 0x556cf031},
8006 -       {0x00016854, 0x13449440},
8007 -       {0x00016858, 0x0c51c92c},
8008 -       {0x0001685c, 0x3db7fffc},
8009 -       {0x00016860, 0xfffffffc},
8010 -       {0x00016864, 0x000f0278},
8011 -       {0x0001686c, 0x6db60000},
8012 -       {0x00016900, 0x3fffbe01},
8013 -       {0x00016904, 0xfff80000},
8014 -       {0x00016908, 0x00080010},
8015 -       {0x00016944, 0x02084080},
8016 -       {0x00016948, 0x00000000},
8017 -       {0x00016b80, 0x00000000},
8018 -       {0x00016b84, 0x00000000},
8019 -       {0x00016b88, 0x00800700},
8020 -       {0x00016b8c, 0x00800700},
8021 -       {0x00016b90, 0x00800700},
8022 -       {0x00016b94, 0x00000000},
8023 -       {0x00016b98, 0x00000000},
8024 -       {0x00016b9c, 0x00000000},
8025 -       {0x00016ba0, 0x00000001},
8026 -       {0x00016ba4, 0x00000001},
8027 -       {0x00016ba8, 0x00000000},
8028 -       {0x00016bac, 0x00000000},
8029 -       {0x00016bb0, 0x00000000},
8030 -       {0x00016bb4, 0x00000000},
8031 -       {0x00016bb8, 0x00000000},
8032 -       {0x00016bbc, 0x00000000},
8033 -       {0x00016bc0, 0x000000a0},
8034 -       {0x00016bc4, 0x000c0000},
8035 -       {0x00016bc8, 0x14021402},
8036 -       {0x00016bcc, 0x00001402},
8037 -       {0x00016bd0, 0x00000000},
8038 -       {0x00016bd4, 0x00000000},
8039 +       {0x0000a000, 0x00010000},
8040 +       {0x0000a004, 0x00030002},
8041 +       {0x0000a008, 0x00050004},
8042 +       {0x0000a00c, 0x00810080},
8043 +       {0x0000a010, 0x00830082},
8044 +       {0x0000a014, 0x01810180},
8045 +       {0x0000a018, 0x01830182},
8046 +       {0x0000a01c, 0x01850184},
8047 +       {0x0000a020, 0x01890188},
8048 +       {0x0000a024, 0x018b018a},
8049 +       {0x0000a028, 0x018d018c},
8050 +       {0x0000a02c, 0x01910190},
8051 +       {0x0000a030, 0x01930192},
8052 +       {0x0000a034, 0x01950194},
8053 +       {0x0000a038, 0x038a0196},
8054 +       {0x0000a03c, 0x038c038b},
8055 +       {0x0000a040, 0x0390038d},
8056 +       {0x0000a044, 0x03920391},
8057 +       {0x0000a048, 0x03940393},
8058 +       {0x0000a04c, 0x03960395},
8059 +       {0x0000a050, 0x00000000},
8060 +       {0x0000a054, 0x00000000},
8061 +       {0x0000a058, 0x00000000},
8062 +       {0x0000a05c, 0x00000000},
8063 +       {0x0000a060, 0x00000000},
8064 +       {0x0000a064, 0x00000000},
8065 +       {0x0000a068, 0x00000000},
8066 +       {0x0000a06c, 0x00000000},
8067 +       {0x0000a070, 0x00000000},
8068 +       {0x0000a074, 0x00000000},
8069 +       {0x0000a078, 0x00000000},
8070 +       {0x0000a07c, 0x00000000},
8071 +       {0x0000a080, 0x22222229},
8072 +       {0x0000a084, 0x1d1d1d1d},
8073 +       {0x0000a088, 0x1d1d1d1d},
8074 +       {0x0000a08c, 0x1d1d1d1d},
8075 +       {0x0000a090, 0x171d1d1d},
8076 +       {0x0000a094, 0x11111717},
8077 +       {0x0000a098, 0x00030311},
8078 +       {0x0000a09c, 0x00000000},
8079 +       {0x0000a0a0, 0x00000000},
8080 +       {0x0000a0a4, 0x00000000},
8081 +       {0x0000a0a8, 0x00000000},
8082 +       {0x0000a0ac, 0x00000000},
8083 +       {0x0000a0b0, 0x00000000},
8084 +       {0x0000a0b4, 0x00000000},
8085 +       {0x0000a0b8, 0x00000000},
8086 +       {0x0000a0bc, 0x00000000},
8087 +       {0x0000a0c0, 0x001f0000},
8088 +       {0x0000a0c4, 0x01000101},
8089 +       {0x0000a0c8, 0x011e011f},
8090 +       {0x0000a0cc, 0x011c011d},
8091 +       {0x0000a0d0, 0x02030204},
8092 +       {0x0000a0d4, 0x02010202},
8093 +       {0x0000a0d8, 0x021f0200},
8094 +       {0x0000a0dc, 0x0302021e},
8095 +       {0x0000a0e0, 0x03000301},
8096 +       {0x0000a0e4, 0x031e031f},
8097 +       {0x0000a0e8, 0x0402031d},
8098 +       {0x0000a0ec, 0x04000401},
8099 +       {0x0000a0f0, 0x041e041f},
8100 +       {0x0000a0f4, 0x0502041d},
8101 +       {0x0000a0f8, 0x05000501},
8102 +       {0x0000a0fc, 0x051e051f},
8103 +       {0x0000a100, 0x06010602},
8104 +       {0x0000a104, 0x061f0600},
8105 +       {0x0000a108, 0x061d061e},
8106 +       {0x0000a10c, 0x07020703},
8107 +       {0x0000a110, 0x07000701},
8108 +       {0x0000a114, 0x00000000},
8109 +       {0x0000a118, 0x00000000},
8110 +       {0x0000a11c, 0x00000000},
8111 +       {0x0000a120, 0x00000000},
8112 +       {0x0000a124, 0x00000000},
8113 +       {0x0000a128, 0x00000000},
8114 +       {0x0000a12c, 0x00000000},
8115 +       {0x0000a130, 0x00000000},
8116 +       {0x0000a134, 0x00000000},
8117 +       {0x0000a138, 0x00000000},
8118 +       {0x0000a13c, 0x00000000},
8119 +       {0x0000a140, 0x001f0000},
8120 +       {0x0000a144, 0x01000101},
8121 +       {0x0000a148, 0x011e011f},
8122 +       {0x0000a14c, 0x011c011d},
8123 +       {0x0000a150, 0x02030204},
8124 +       {0x0000a154, 0x02010202},
8125 +       {0x0000a158, 0x021f0200},
8126 +       {0x0000a15c, 0x0302021e},
8127 +       {0x0000a160, 0x03000301},
8128 +       {0x0000a164, 0x031e031f},
8129 +       {0x0000a168, 0x0402031d},
8130 +       {0x0000a16c, 0x04000401},
8131 +       {0x0000a170, 0x041e041f},
8132 +       {0x0000a174, 0x0502041d},
8133 +       {0x0000a178, 0x05000501},
8134 +       {0x0000a17c, 0x051e051f},
8135 +       {0x0000a180, 0x06010602},
8136 +       {0x0000a184, 0x061f0600},
8137 +       {0x0000a188, 0x061d061e},
8138 +       {0x0000a18c, 0x07020703},
8139 +       {0x0000a190, 0x07000701},
8140 +       {0x0000a194, 0x00000000},
8141 +       {0x0000a198, 0x00000000},
8142 +       {0x0000a19c, 0x00000000},
8143 +       {0x0000a1a0, 0x00000000},
8144 +       {0x0000a1a4, 0x00000000},
8145 +       {0x0000a1a8, 0x00000000},
8146 +       {0x0000a1ac, 0x00000000},
8147 +       {0x0000a1b0, 0x00000000},
8148 +       {0x0000a1b4, 0x00000000},
8149 +       {0x0000a1b8, 0x00000000},
8150 +       {0x0000a1bc, 0x00000000},
8151 +       {0x0000a1c0, 0x00000000},
8152 +       {0x0000a1c4, 0x00000000},
8153 +       {0x0000a1c8, 0x00000000},
8154 +       {0x0000a1cc, 0x00000000},
8155 +       {0x0000a1d0, 0x00000000},
8156 +       {0x0000a1d4, 0x00000000},
8157 +       {0x0000a1d8, 0x00000000},
8158 +       {0x0000a1dc, 0x00000000},
8159 +       {0x0000a1e0, 0x00000000},
8160 +       {0x0000a1e4, 0x00000000},
8161 +       {0x0000a1e8, 0x00000000},
8162 +       {0x0000a1ec, 0x00000000},
8163 +       {0x0000a1f0, 0x00000396},
8164 +       {0x0000a1f4, 0x00000396},
8165 +       {0x0000a1f8, 0x00000396},
8166 +       {0x0000a1fc, 0x00000196},
8167 +       {0x0000b000, 0x00010000},
8168 +       {0x0000b004, 0x00030002},
8169 +       {0x0000b008, 0x00050004},
8170 +       {0x0000b00c, 0x00810080},
8171 +       {0x0000b010, 0x00830082},
8172 +       {0x0000b014, 0x01810180},
8173 +       {0x0000b018, 0x01830182},
8174 +       {0x0000b01c, 0x01850184},
8175 +       {0x0000b020, 0x02810280},
8176 +       {0x0000b024, 0x02830282},
8177 +       {0x0000b028, 0x02850284},
8178 +       {0x0000b02c, 0x02890288},
8179 +       {0x0000b030, 0x028b028a},
8180 +       {0x0000b034, 0x0388028c},
8181 +       {0x0000b038, 0x038a0389},
8182 +       {0x0000b03c, 0x038c038b},
8183 +       {0x0000b040, 0x0390038d},
8184 +       {0x0000b044, 0x03920391},
8185 +       {0x0000b048, 0x03940393},
8186 +       {0x0000b04c, 0x03960395},
8187 +       {0x0000b050, 0x00000000},
8188 +       {0x0000b054, 0x00000000},
8189 +       {0x0000b058, 0x00000000},
8190 +       {0x0000b05c, 0x00000000},
8191 +       {0x0000b060, 0x00000000},
8192 +       {0x0000b064, 0x00000000},
8193 +       {0x0000b068, 0x00000000},
8194 +       {0x0000b06c, 0x00000000},
8195 +       {0x0000b070, 0x00000000},
8196 +       {0x0000b074, 0x00000000},
8197 +       {0x0000b078, 0x00000000},
8198 +       {0x0000b07c, 0x00000000},
8199 +       {0x0000b080, 0x23232323},
8200 +       {0x0000b084, 0x21232323},
8201 +       {0x0000b088, 0x19191c1e},
8202 +       {0x0000b08c, 0x12141417},
8203 +       {0x0000b090, 0x07070e0e},
8204 +       {0x0000b094, 0x03030305},
8205 +       {0x0000b098, 0x00000003},
8206 +       {0x0000b09c, 0x00000000},
8207 +       {0x0000b0a0, 0x00000000},
8208 +       {0x0000b0a4, 0x00000000},
8209 +       {0x0000b0a8, 0x00000000},
8210 +       {0x0000b0ac, 0x00000000},
8211 +       {0x0000b0b0, 0x00000000},
8212 +       {0x0000b0b4, 0x00000000},
8213 +       {0x0000b0b8, 0x00000000},
8214 +       {0x0000b0bc, 0x00000000},
8215 +       {0x0000b0c0, 0x003f0020},
8216 +       {0x0000b0c4, 0x00400041},
8217 +       {0x0000b0c8, 0x0140005f},
8218 +       {0x0000b0cc, 0x0160015f},
8219 +       {0x0000b0d0, 0x017e017f},
8220 +       {0x0000b0d4, 0x02410242},
8221 +       {0x0000b0d8, 0x025f0240},
8222 +       {0x0000b0dc, 0x027f0260},
8223 +       {0x0000b0e0, 0x0341027e},
8224 +       {0x0000b0e4, 0x035f0340},
8225 +       {0x0000b0e8, 0x037f0360},
8226 +       {0x0000b0ec, 0x04400441},
8227 +       {0x0000b0f0, 0x0460045f},
8228 +       {0x0000b0f4, 0x0541047f},
8229 +       {0x0000b0f8, 0x055f0540},
8230 +       {0x0000b0fc, 0x057f0560},
8231 +       {0x0000b100, 0x06400641},
8232 +       {0x0000b104, 0x0660065f},
8233 +       {0x0000b108, 0x067e067f},
8234 +       {0x0000b10c, 0x07410742},
8235 +       {0x0000b110, 0x075f0740},
8236 +       {0x0000b114, 0x077f0760},
8237 +       {0x0000b118, 0x07800781},
8238 +       {0x0000b11c, 0x07a0079f},
8239 +       {0x0000b120, 0x07c107bf},
8240 +       {0x0000b124, 0x000007c0},
8241 +       {0x0000b128, 0x00000000},
8242 +       {0x0000b12c, 0x00000000},
8243 +       {0x0000b130, 0x00000000},
8244 +       {0x0000b134, 0x00000000},
8245 +       {0x0000b138, 0x00000000},
8246 +       {0x0000b13c, 0x00000000},
8247 +       {0x0000b140, 0x003f0020},
8248 +       {0x0000b144, 0x00400041},
8249 +       {0x0000b148, 0x0140005f},
8250 +       {0x0000b14c, 0x0160015f},
8251 +       {0x0000b150, 0x017e017f},
8252 +       {0x0000b154, 0x02410242},
8253 +       {0x0000b158, 0x025f0240},
8254 +       {0x0000b15c, 0x027f0260},
8255 +       {0x0000b160, 0x0341027e},
8256 +       {0x0000b164, 0x035f0340},
8257 +       {0x0000b168, 0x037f0360},
8258 +       {0x0000b16c, 0x04400441},
8259 +       {0x0000b170, 0x0460045f},
8260 +       {0x0000b174, 0x0541047f},
8261 +       {0x0000b178, 0x055f0540},
8262 +       {0x0000b17c, 0x057f0560},
8263 +       {0x0000b180, 0x06400641},
8264 +       {0x0000b184, 0x0660065f},
8265 +       {0x0000b188, 0x067e067f},
8266 +       {0x0000b18c, 0x07410742},
8267 +       {0x0000b190, 0x075f0740},
8268 +       {0x0000b194, 0x077f0760},
8269 +       {0x0000b198, 0x07800781},
8270 +       {0x0000b19c, 0x07a0079f},
8271 +       {0x0000b1a0, 0x07c107bf},
8272 +       {0x0000b1a4, 0x000007c0},
8273 +       {0x0000b1a8, 0x00000000},
8274 +       {0x0000b1ac, 0x00000000},
8275 +       {0x0000b1b0, 0x00000000},
8276 +       {0x0000b1b4, 0x00000000},
8277 +       {0x0000b1b8, 0x00000000},
8278 +       {0x0000b1bc, 0x00000000},
8279 +       {0x0000b1c0, 0x00000000},
8280 +       {0x0000b1c4, 0x00000000},
8281 +       {0x0000b1c8, 0x00000000},
8282 +       {0x0000b1cc, 0x00000000},
8283 +       {0x0000b1d0, 0x00000000},
8284 +       {0x0000b1d4, 0x00000000},
8285 +       {0x0000b1d8, 0x00000000},
8286 +       {0x0000b1dc, 0x00000000},
8287 +       {0x0000b1e0, 0x00000000},
8288 +       {0x0000b1e4, 0x00000000},
8289 +       {0x0000b1e8, 0x00000000},
8290 +       {0x0000b1ec, 0x00000000},
8291 +       {0x0000b1f0, 0x00000396},
8292 +       {0x0000b1f4, 0x00000396},
8293 +       {0x0000b1f8, 0x00000396},
8294 +       {0x0000b1fc, 0x00000196},
8295  };
8296
8297  static const u32 ar9580_1p0_baseband_postamble[][5] = {
8298 @@ -956,7 +1169,7 @@ static const u32 ar9580_1p0_baseband_pos
8299         {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
8300         {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
8301         {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
8302 -       {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
8303 +       {0x0000a2d0, 0x00041983, 0x00041983, 0x00041981, 0x00041982},
8304         {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
8305         {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8306         {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
8307 --- a/drivers/net/wireless/ath/ath9k/reg.h
8308 +++ b/drivers/net/wireless/ath/ath9k/reg.h
8309 @@ -809,6 +809,8 @@
8310  #define AR_SREV_REVISION_9462_21       3
8311  #define AR_SREV_VERSION_9565            0x2C0
8312  #define AR_SREV_REVISION_9565_10        0
8313 +#define AR_SREV_REVISION_9565_101       1
8314 +#define AR_SREV_REVISION_9565_11        2
8315  #define AR_SREV_VERSION_9550           0x400
8316
8317  #define AR_SREV_5416(_ah) \
8318 @@ -927,10 +929,18 @@
8319
8320  #define AR_SREV_9565(_ah) \
8321         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565))
8322 -
8323  #define AR_SREV_9565_10(_ah) \
8324         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
8325          ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_10))
8326 +#define AR_SREV_9565_101(_ah) \
8327 +       (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
8328 +        ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_101))
8329 +#define AR_SREV_9565_11(_ah) \
8330 +       (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
8331 +        ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_11))
8332 +#define AR_SREV_9565_11_OR_LATER(_ah) \
8333 +       (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
8334 +        ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9565_11))
8335
8336  #define AR_SREV_9550(_ah) \
8337         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9550))