ar71xx: add support for compex wpj344
authorLuka Perkov <luka@openwrt.org>
Mon, 20 Apr 2015 20:47:48 +0000 (20:47 +0000)
committerLuka Perkov <luka@openwrt.org>
Mon, 20 Apr 2015 20:47:48 +0000 (20:47 +0000)
Signed-off-by: Christian Mehlis <christian@m3hlis.de>
Signed-off-by: Luka Perkov <luka@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45527 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/ar71xx/base-files/etc/diag.sh
target/linux/ar71xx/base-files/etc/uci-defaults/02_network
target/linux/ar71xx/base-files/lib/ar71xx.sh
target/linux/ar71xx/base-files/lib/upgrade/platform.sh
target/linux/ar71xx/config-3.18
target/linux/ar71xx/files/arch/mips/ath79/mach-wpj344.c [new file with mode: 0644]
target/linux/ar71xx/generic/profiles/compex.mk
target/linux/ar71xx/image/Makefile
target/linux/ar71xx/patches-3.18/610-MIPS-ath79-openwrt-machines.patch

index 52a73ee..a56f70e 100644 (file)
@@ -296,6 +296,9 @@ get_status_led() {
        wp543)
                status_led="wp543:green:diag"
                ;;
+       wpj344)
+               status_led="wpj344:green:status"
+               ;;
        wpj558)
                status_led="wpj558:green:sig3"
                ;;
index 9789834..fa3f66f 100644 (file)
@@ -360,6 +360,13 @@ wpe72)
        ucidef_set_interfaces_lan_wan "eth1" "eth0"
        ;;
 
+wpj344)
+       ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
+       ucidef_add_switch "switch0" "1" "1"
+       ucidef_add_switch_vlan "switch0" "1" "0t 3"
+       ucidef_add_switch_vlan "switch0" "2" "0t 2"
+       ;;
+
 wpj558)
        ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
        ucidef_add_switch "switch0" "1" "1"
index b3dbcf5..c796224 100755 (executable)
@@ -801,6 +801,9 @@ ar71xx_board_detect() {
        *WPE72)
                name="wpe72"
                ;;
+       *WPJ344)
+               name="wpj344"
+               ;;
        *WPJ558)
                name="wpj558"
                ;;
index 0cbee1d..1c349fe 100755 (executable)
@@ -184,6 +184,7 @@ platform_check_image() {
        db120 | \
        f9k1115v2 |\
        hornet-ub | \
+       wpj344 | \
        wpj558 | \
        zcn-1523h-2 | \
        zcn-1523h-5)
index 1ee99f4..36b8bb6 100644 (file)
@@ -136,6 +136,7 @@ CONFIG_ATH79_MACH_WNR2000_V4=y
 CONFIG_ATH79_MACH_WNR2200=y
 CONFIG_ATH79_MACH_WP543=y
 CONFIG_ATH79_MACH_WPE72=y
+CONFIG_ATH79_MACH_WPJ344=y
 CONFIG_ATH79_MACH_WPJ558=y
 CONFIG_ATH79_MACH_WRT160NL=y
 CONFIG_ATH79_MACH_WRT400N=y
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj344.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj344.c
new file mode 100644 (file)
index 0000000..fd718bd
--- /dev/null
@@ -0,0 +1,177 @@
+/*
+ * Compex WPJ344 board support
+ *
+ * Copyright (c) 2011 Qualcomm Atheros
+ * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "pci.h"
+#include "dev-ap9x-pci.h"
+#include "dev-gpio-buttons.h"
+#include "dev-eth.h"
+#include "dev-usb.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define WPJ344_GPIO_LED_USB            11
+#define WPJ344_GPIO_LED_WLAN_5G        12
+#define WPJ344_GPIO_LED_WLAN_2G        13
+#define WPJ344_GPIO_LED_STATUS 14
+#define WPJ344_GPIO_LED_WPS            15
+
+#define WPJ344_GPIO_BTN_RESET  16
+
+#define WPJ344_KEYS_POLL_INTERVAL      20      /* msecs */
+#define WPJ344_KEYS_DEBOUNCE_INTERVAL  (3 * WPJ344_KEYS_POLL_INTERVAL)
+
+#define WPJ344_MAC0_OFFSET             0
+#define WPJ344_MAC1_OFFSET             6
+#define WPJ344_WMAC_CALDATA_OFFSET     0x1000
+#define WPJ344_PCIE_CALDATA_OFFSET     0x5000
+
+static struct gpio_led wpj344_leds_gpio[] __initdata = {
+       {
+               .name           = "wpj344:green:status",
+               .gpio           = WPJ344_GPIO_LED_STATUS,
+               .active_low     = 1,
+       },
+       {
+               .name           = "wpj344:green:wps",
+               .gpio           = WPJ344_GPIO_LED_WPS,
+               .active_low     = 1,
+       },
+       {
+               .name           = "wpj344:green:wlan-5g",
+               .gpio           = WPJ344_GPIO_LED_WLAN_5G,
+               .active_low     = 1,
+       },
+       {
+               .name           = "wpj344:green:wlan-2g",
+               .gpio           = WPJ344_GPIO_LED_WLAN_2G,
+               .active_low     = 1,
+       },
+       {
+               .name           = "wpj344:green:usb",
+               .gpio           = WPJ344_GPIO_LED_USB,
+               .active_low     = 1,
+       }
+};
+
+static struct gpio_keys_button wpj344_gpio_keys[] __initdata = {
+       {
+               .desc           = "reset",
+               .type           = EV_KEY,
+               .code           = KEY_RESTART,
+               .debounce_interval = WPJ344_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = WPJ344_GPIO_BTN_RESET,
+               .active_low     = 1,
+       },
+};
+
+static struct ar8327_pad_cfg wpj344_ar8327_pad0_cfg = {
+       .mode = AR8327_PAD_MAC_RGMII,
+       .txclk_delay_en = true,
+       .rxclk_delay_en = true,
+       .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
+       .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+};
+
+static struct ar8327_led_cfg wpj344_ar8327_led_cfg = {
+       .led_ctrl0 = 0x00000000,
+       .led_ctrl1 = 0xc737c737,
+       .led_ctrl2 = 0x00000000,
+       .led_ctrl3 = 0x00c30c00,
+       .open_drain = true,
+};
+
+static struct ar8327_platform_data wpj344_ar8327_data = {
+       .pad0_cfg = &wpj344_ar8327_pad0_cfg,
+       .port0_cfg = {
+               .force_link = 1,
+               .speed = AR8327_PORT_SPEED_1000,
+               .duplex = 1,
+               .txpause = 1,
+               .rxpause = 1,
+       },
+       .led_cfg = &wpj344_ar8327_led_cfg,
+};
+
+static struct mdio_board_info wpj344_mdio0_info[] = {
+       {
+               .bus_id = "ag71xx-mdio.0",
+               .phy_addr = 0,
+               .platform_data = &wpj344_ar8327_data,
+       },
+};
+
+static void __init wpj344_setup(void)
+{
+       u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+
+       ath79_gpio_output_select(WPJ344_GPIO_LED_USB, AR934X_GPIO_OUT_GPIO);
+       ath79_register_m25p80(NULL);
+       ath79_register_leds_gpio(-1, ARRAY_SIZE(wpj344_leds_gpio),
+                                wpj344_leds_gpio);
+       ath79_register_gpio_keys_polled(-1, WPJ344_KEYS_POLL_INTERVAL,
+                                       ARRAY_SIZE(wpj344_gpio_keys),
+                                       wpj344_gpio_keys);
+
+       ath79_register_usb();
+
+       ath79_register_wmac(art + WPJ344_WMAC_CALDATA_OFFSET, NULL);
+
+       ath79_register_pci();
+
+       mdiobus_register_board_info(wpj344_mdio0_info,
+                                       ARRAY_SIZE(wpj344_mdio0_info));
+
+
+       ath79_register_mdio(1, 0x0);
+       ath79_register_mdio(0, 0x0);
+
+       ath79_init_mac(ath79_eth0_data.mac_addr, art + WPJ344_MAC0_OFFSET, 0);
+       ath79_init_mac(ath79_eth1_data.mac_addr, art + WPJ344_MAC1_OFFSET, 0);
+
+       ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
+                                  AR934X_ETH_CFG_SW_ONLY_MODE);
+
+       /* GMAC0 is connected to an AR8327 switch */
+       ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+       ath79_eth0_data.phy_mask = BIT(0);
+       ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+       ath79_eth0_pll_data.pll_1000 = 0x06000000;
+
+       /* GMAC1 is connected to the internal switch */
+       ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+       ath79_eth1_data.speed = SPEED_1000;
+       ath79_eth1_data.duplex = DUPLEX_FULL;
+
+       ath79_register_eth(0);
+       ath79_register_eth(1);
+}
+
+MIPS_MACHINE(ATH79_MACH_WPJ344, "WPJ344", "Compex WPJ344", wpj344_setup);
index d1a4f12..6528d4a 100644 (file)
@@ -27,6 +27,16 @@ endef
 
 $(eval $(call Profile,WPE72))
 
+define Profile/WPJ344
+       NAME:=Compex WPJ344
+endef
+
+define Profile/WPJ344/Description
+       Package set optimized for the Compex WPJ344 board.
+endef
+
+$(eval $(call Profile,WPJ344))
+
 define Profile/WPJ558
        NAME:=Compex WPJ558
 endef
index 9e3bc5c..93f05f8 100644 (file)
@@ -492,6 +492,7 @@ uap_pro_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1536k(kernel)
 ubdev_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,7488k(firmware),64k(certs),256k(cfg)ro,64k(EEPROM)ro
 whrhpg300n_mtdlayout=mtdparts=spi0.0:248k(u-boot)ro,8k(u-boot-env)ro,3712k(firmware),64k(art)ro
 wlr8100_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),14080k(rootfs),192k(unknown)ro,64k(art)ro,384k(unknown2)ro,15488k@0x40000(firmware)
+wpj344_mtdlayout_16M=mtdparts=spi0.0:192k(u-boot)ro,16128k(firmware),64k(art)ro
 wpj558_mtdlayout_16M=mtdparts=spi0.0:192k(u-boot)ro,16128k(firmware),64k(art)ro
 wndap360_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1728k(kernel),6016k(rootfs),64k(nvram)ro,64k(art)ro,7744k@0x50000(firmware)
 wnr2200_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,7808k(firmware),64k(art)ro
@@ -1364,6 +1365,7 @@ $(eval $(call SingleProfile,AthLzma,64k,HORNETUBx2,hornet-ub-x2,HORNET-UB,ttyATH
 $(eval $(call SingleProfile,AthLzma,64k,PB92,pb92,PB92,ttyS0,115200,$$(pb92_mtdlayout),KRuImage))
 $(eval $(call SingleProfile,AthLzma,64k,TUBE2H16M,tube2h-16M,TUBE2H,ttyATH0,115200,$$(alfa_mtdlayout_16M),KRuImage,65536))
 $(eval $(call SingleProfile,AthLzma,64k,WLR8100,wlr8100,WLR8100,ttyS0,115200,$$(wlr8100_mtdlayout),KRuImage))
+$(eval $(call SingleProfile,AthLzma,64k,WPJ344_16M,wpj344-16M,WPJ344,ttyS0,115200,$$(wpj344_mtdlayout_16M),KRuImage,65536))
 $(eval $(call SingleProfile,AthLzma,64k,WPJ558_16M,wpj558-16M,WPJ558,ttyS0,115200,$$(wpj558_mtdlayout_16M),KRuImage,65536))
 
 $(eval $(call SingleProfile,Belkin,64k,F9K1115V2,f9k1115v2,F9K1115V2,ttyS0,115200,$$(f9k1115v2_mtdlayout),BR-6679BAC))
@@ -1594,6 +1596,7 @@ $(eval $(call MultiProfile,WNR612V2,REALWNR612V2 N150R))
 $(eval $(call MultiProfile,WNR1000V2,REALWNR1000V2 WNR1000V2_VC))
 $(eval $(call MultiProfile,WP543,WP543_2M WP543_4M WP543_8M WP543_16M))
 $(eval $(call MultiProfile,WPE72,WPE72_4M WPE72_8M WPE72_16M))
+$(eval $(call MultiProfile,WPJ344,WPJ344_16M))
 $(eval $(call MultiProfile,WPJ558,WPJ558_16M))
 
 $(eval $(call MultiProfile,Minimal,$(SINGLE_PROFILES)))
index 2aca064..5e07d80 100644 (file)
@@ -1,6 +1,6 @@
 --- a/arch/mips/ath79/machtypes.h
 +++ b/arch/mips/ath79/machtypes.h
-@@ -16,22 +16,190 @@
+@@ -16,22 +16,191 @@
  
  enum ath79_mach_type {
        ATH79_MACH_GENERIC = 0,
 +      ATH79_MACH_WNR1000_V2,          /* NETGEAR WNR1000 v2 */
 +      ATH79_MACH_WP543,               /* Compex WP543 */
 +      ATH79_MACH_WPE72,               /* Compex WPE72 */
++      ATH79_MACH_WPJ344,              /* Compex WPJ344 */
 +      ATH79_MACH_WPJ558,              /* Compex WPJ558 */
 +      ATH79_MACH_WRT160NL,            /* Linksys WRT160NL */
 +      ATH79_MACH_WRT400N,             /* Linksys WRT400N */
  config ATH79_MACH_AP121
        bool "Atheros AP121 reference board"
        select SOC_AR933X
-@@ -11,62 +75,976 @@ config ATH79_MACH_AP121
+@@ -11,62 +75,986 @@ config ATH79_MACH_AP121
        select ATH79_DEV_M25P80
        select ATH79_DEV_USB
        select ATH79_DEV_WMAC
 +      select ATH79_DEV_USB
 +      select MYLOADER
 +
++config ATH79_MACH_WPJ344
++      bool "Compex WPJ344 board support"
++      select SOC_AS934X
++      select ATH79_DEV_ETH
++      select ATH79_DEV_GPIO_BUTTONS
++      select ATH79_DEV_LEDS_GPIO
++      select ATH79_DEV_M25P80
++      select ATH79_DEV_USB
++      select ATH79_DEV_WMAC
++
 +config ATH79_MACH_WPJ558
 +      bool "Compex WPJ558 board support"
 +      select SOC_QCA955X
  
  config ATH79_MACH_UBNT_XM
        bool "Ubiquiti Networks XM/UniFi boards"
-@@ -83,6 +1061,97 @@ config ATH79_MACH_UBNT_XM
+@@ -83,6 +1071,97 @@ config ATH79_MACH_UBNT_XM
          Say 'Y' here if you want your kernel to support the
          Ubiquiti Networks XM (rev 1.0) board.
  
  endmenu
  
  config SOC_AR71XX
-@@ -124,7 +1193,10 @@ config ATH79_DEV_DSA
+@@ -124,7 +1203,10 @@ config ATH79_DEV_DSA
  config ATH79_DEV_ETH
        def_bool n
  
        def_bool n
  
  config ATH79_DEV_GPIO_BUTTONS
-@@ -154,6 +1226,11 @@ config ATH79_PCI_ATH9K_FIXUP
+@@ -154,6 +1236,11 @@ config ATH79_PCI_ATH9K_FIXUP
        def_bool n
  
  config ATH79_ROUTERBOOT
  endif
 --- a/arch/mips/ath79/Makefile
 +++ b/arch/mips/ath79/Makefile
-@@ -38,9 +38,119 @@ obj-$(CONFIG_ATH79_ROUTERBOOT)             += route
+@@ -38,9 +48,120 @@ obj-$(CONFIG_ATH79_ROUTERBOOT)             += route
  #
  # Machines
  #
 +obj-$(CONFIG_ATH79_MACH_WNR2200)      += mach-wnr2200.o
 +obj-$(CONFIG_ATH79_MACH_WP543)                += mach-wp543.o
 +obj-$(CONFIG_ATH79_MACH_WPE72)                += mach-wpe72.o
-+obj-$(CONFIG_ATH79_MACH_WPJ558)               += mach-wpj558.o
++obj-$(CONFIG_ATH79_MACH_WPJ344)       += mach-wpj344.o
++obj-$(CONFIG_ATH79_MACH_WPJ558)       += mach-wpj558.o
 +obj-$(CONFIG_ATH79_MACH_WRT160NL)     += mach-wrt160nl.o
 +obj-$(CONFIG_ATH79_MACH_WRT400N)      += mach-wrt400n.o
 +obj-$(CONFIG_ATH79_MACH_WZR_HP_G300NH)        += mach-wzr-hp-g300nh.o