ar71xx: add support for the devolo dLAN pro 1200+ WiFi ac
[15.05/openwrt.git] / target / linux / ar71xx / patches-3.18 / 736-MIPS-ath79-fix-chained-irq-disable.patch
1 --- a/arch/mips/ath79/irq.c
2 +++ b/arch/mips/ath79/irq.c
3 @@ -26,6 +26,8 @@
4  
5  static void (*ath79_ip2_handler)(void);
6  static void (*ath79_ip3_handler)(void);
7 +static struct irq_chip ip2_chip;
8 +static struct irq_chip ip3_chip;
9  
10  static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)
11  {
12 @@ -149,8 +151,7 @@ static void ar934x_ip2_irq_init(void)
13  
14         for (i = ATH79_IP2_IRQ_BASE;
15              i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
16 -               irq_set_chip_and_handler(i, &dummy_irq_chip,
17 -                                        handle_level_irq);
18 +               irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq);
19  
20         irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch);
21  }
22 @@ -224,15 +225,13 @@ static void qca955x_irq_init(void)
23  
24         for (i = ATH79_IP2_IRQ_BASE;
25              i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
26 -               irq_set_chip_and_handler(i, &dummy_irq_chip,
27 -                                        handle_level_irq);
28 +               irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq);
29  
30         irq_set_chained_handler(ATH79_CPU_IRQ(2), qca955x_ip2_irq_dispatch);
31  
32         for (i = ATH79_IP3_IRQ_BASE;
33              i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++)
34 -               irq_set_chip_and_handler(i, &dummy_irq_chip,
35 -                                        handle_level_irq);
36 +               irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq);
37  
38         irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch);
39  }
40 @@ -313,15 +312,13 @@ static void qca956x_irq_init(void)
41  
42         for (i = ATH79_IP2_IRQ_BASE;
43              i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
44 -               irq_set_chip_and_handler(i, &dummy_irq_chip,
45 -                                        handle_level_irq);
46 +               irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq);
47  
48         irq_set_chained_handler(ATH79_CPU_IRQ(2), qca956x_ip2_irq_dispatch);
49  
50         for (i = ATH79_IP3_IRQ_BASE;
51              i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++)
52 -               irq_set_chip_and_handler(i, &dummy_irq_chip,
53 -                                        handle_level_irq);
54 +               irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq);
55  
56         irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch);
57  
58 @@ -430,8 +427,35 @@ static void ar934x_ip3_handler(void)
59         do_IRQ(ATH79_CPU_IRQ(3));
60  }
61  
62 +static void ath79_ip2_disable(struct irq_data *data)
63 +{
64 +       disable_irq(ATH79_CPU_IRQ(2));
65 +}
66 +
67 +static void ath79_ip2_enable(struct irq_data *data)
68 +{
69 +       enable_irq(ATH79_CPU_IRQ(2));
70 +}
71 +
72 +static void ath79_ip3_disable(struct irq_data *data)
73 +{
74 +       disable_irq(ATH79_CPU_IRQ(3));
75 +}
76 +
77 +static void ath79_ip3_enable(struct irq_data *data)
78 +{
79 +       enable_irq(ATH79_CPU_IRQ(3));
80 +}
81 +
82  void __init arch_init_irq(void)
83  {
84 +       ip2_chip = dummy_irq_chip;
85 +       ip3_chip = dummy_irq_chip;
86 +       ip2_chip.irq_disable = ath79_ip2_disable;
87 +       ip2_chip.irq_enable = ath79_ip2_enable;
88 +       ip3_chip.irq_disable = ath79_ip3_disable;
89 +       ip3_chip.irq_enable = ath79_ip3_enable;
90 +
91         if (soc_is_ar71xx()) {
92                 ath79_ip2_handler = ar71xx_ip2_handler;
93                 ath79_ip3_handler = ar71xx_ip3_handler;