package/kernel/mac80211/patches/350-brcmfmac-add-support-for-BCM43430-SDIO-chipset.patch

   1 From: Arend van Spriel <arend@broadcom.com>
   2 Date: Wed, 18 Mar 2015 13:25:26 +0100
   3 Subject: [PATCH] brcmfmac: add support for BCM43430 SDIO chipset
   4
   5 This patch added support for the BCM43430 802.11n SDIO chipset.
   6
   7 Reviewed-by: Hante Meuleman <meuleman@broadcom.com>
   8 Reviewed-by: Daniel (Deognyoun) Kim <dekim@broadcom.com>
   9 Reviewed-by: Franky (Zhenhui) Lin <frankyl@broadcom.com>
  10 Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
  11 Signed-off-by: Arend van Spriel <arend@broadcom.com>
  12 Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
  13 ---
  14
  15 --- a/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c
  16 +++ b/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c
  17 @@ -1098,6 +1098,7 @@ static const struct sdio_device_id brcmf
  18         BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_43341),
  19         BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_43362),
  20         BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_4335_4339),
  21 +       BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_43430),
  22         BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_4345),
  23         BRCMF_SDIO_DEVICE(SDIO_DEVICE_ID_BROADCOM_4354),
  24         { /* end: all zeroes */ }
  25 --- a/drivers/net/wireless/brcm80211/brcmfmac/chip.c
  26 +++ b/drivers/net/wireless/brcm80211/brcmfmac/chip.c
  27 @@ -600,6 +600,12 @@ static void brcmf_chip_socram_ramsize(st
  28                 if (sr->chip->pub.chiprev < 2)
  29                         *srsize = (32 * 1024);
  30                 break;
  31 +       case BRCM_CC_43430_CHIP_ID:
  32 +               /* assume sr for now as we can not check
  33 +                * firmware sr capability at this point.
  34 +                */
  35 +               *srsize = (64 * 1024);
  36 +               break;
  37         default:
  38                 break;
  39         }
  40 @@ -1072,6 +1078,7 @@ static void
  41  brcmf_chip_cm3_set_passive(struct brcmf_chip_priv *chip)
  42  {
  43         struct brcmf_core *core;
  44 +       struct brcmf_core_priv *sr;
  45
  46         brcmf_chip_disable_arm(chip, BCMA_CORE_ARM_CM3);
  47         core = brcmf_chip_get_core(&chip->pub, BCMA_CORE_80211);
  48 @@ -1081,6 +1088,13 @@ brcmf_chip_cm3_set_passive(struct brcmf_
  49                              D11_BCMA_IOCTL_PHYCLOCKEN);
  50         core = brcmf_chip_get_core(&chip->pub, BCMA_CORE_INTERNAL_MEM);
  51         brcmf_chip_resetcore(core, 0, 0, 0);
  52 +
  53 +       /* disable bank #3 remap for this device */
  54 +       if (chip->pub.chip == BRCM_CC_43430_CHIP_ID) {
  55 +               sr = container_of(core, struct brcmf_core_priv, pub);
  56 +               brcmf_chip_core_write32(sr, SOCRAMREGOFFS(bankidx), 3);
  57 +               brcmf_chip_core_write32(sr, SOCRAMREGOFFS(bankpda), 0);
  58 +       }
  59  }
  60
  61  static bool brcmf_chip_cm3_set_active(struct brcmf_chip_priv *chip)
  62 @@ -1188,6 +1202,10 @@ bool brcmf_chip_sr_capable(struct brcmf_
  63                 addr = CORE_CC_REG(base, chipcontrol_data);
  64                 reg = chip->ops->read32(chip->ctx, addr);
  65                 return (reg & pmu_cc3_mask) != 0;
  66 +       case BRCM_CC_43430_CHIP_ID:
  67 +               addr = CORE_CC_REG(base, sr_control1);
  68 +               reg = chip->ops->read32(chip->ctx, addr);
  69 +               return reg != 0;
  70         default:
  71                 addr = CORE_CC_REG(base, pmucapabilities_ext);
  72                 reg = chip->ops->read32(chip->ctx, addr);
  73 --- a/drivers/net/wireless/brcm80211/brcmfmac/sdio.c
  74 +++ b/drivers/net/wireless/brcm80211/brcmfmac/sdio.c
  75 @@ -615,6 +615,8 @@ static const struct sdiod_drive_str sdio
  76  #define BCM43362_NVRAM_NAME            "brcm/brcmfmac43362-sdio.txt"
  77  #define BCM4339_FIRMWARE_NAME          "brcm/brcmfmac4339-sdio.bin"
  78  #define BCM4339_NVRAM_NAME             "brcm/brcmfmac4339-sdio.txt"
  79 +#define BCM43430_FIRMWARE_NAME         "brcm/brcmfmac43430-sdio.bin"
  80 +#define BCM43430_NVRAM_NAME            "brcm/brcmfmac43430-sdio.txt"
  81  #define BCM4345_FIRMWARE_NAME          "brcm/brcmfmac4345-sdio.bin"
  82  #define BCM4345_NVRAM_NAME             "brcm/brcmfmac4345-sdio.txt"
  83  #define BCM4354_FIRMWARE_NAME          "brcm/brcmfmac4354-sdio.bin"
  84 @@ -640,6 +642,8 @@ MODULE_FIRMWARE(BCM43362_FIRMWARE_NAME);
  85  MODULE_FIRMWARE(BCM43362_NVRAM_NAME);
  86  MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
  87  MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
  88 +MODULE_FIRMWARE(BCM43430_FIRMWARE_NAME);
  89 +MODULE_FIRMWARE(BCM43430_NVRAM_NAME);
  90  MODULE_FIRMWARE(BCM4345_FIRMWARE_NAME);
  91  MODULE_FIRMWARE(BCM4345_NVRAM_NAME);
  92  MODULE_FIRMWARE(BCM4354_FIRMWARE_NAME);
  93 @@ -671,6 +675,7 @@ static const struct brcmf_firmware_names
  94         { BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
  95         { BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, BRCMF_FIRMWARE_NVRAM(BCM43362) },
  96         { BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) },
  97 +       { BRCM_CC_43430_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43430) },
  98         { BRCM_CC_4345_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4345) },
  99         { BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4354) }
 100  };
 101 --- a/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h
 102 +++ b/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h
 103 @@ -37,6 +37,7 @@
 104  #define BRCM_CC_43362_CHIP_ID          43362
 105  #define BRCM_CC_4335_CHIP_ID           0x4335
 106  #define BRCM_CC_4339_CHIP_ID           0x4339
 107 +#define BRCM_CC_43430_CHIP_ID          43430
 108  #define BRCM_CC_4345_CHIP_ID           0x4345
 109  #define BRCM_CC_4354_CHIP_ID           0x4354
 110  #define BRCM_CC_4356_CHIP_ID           0x4356
 111 --- a/drivers/net/wireless/brcm80211/include/chipcommon.h
 112 +++ b/drivers/net/wireless/brcm80211/include/chipcommon.h
 113 @@ -183,7 +183,14 @@ struct chipcregs {
 114         u8 uart1lsr;
 115         u8 uart1msr;
 116         u8 uart1scratch;
 117 -       u32 PAD[126];
 118 +       u32 PAD[62];
 119 +
 120 +       /* save/restore, corerev >= 48 */
 121 +       u32 sr_capability;          /* 0x500 */
 122 +       u32 sr_control0;            /* 0x504 */
 123 +       u32 sr_control1;            /* 0x508 */
 124 +       u32 gpio_control;           /* 0x50C */
 125 +       u32 PAD[60];
 126
 127         /* PMU registers (corerev >= 20) */
 128         u32 pmucontrol; /* 0x600 */
 129 --- a/include/linux/mmc/sdio_ids.h
 130 +++ b/include/linux/mmc/sdio_ids.h
 131 @@ -33,6 +33,7 @@
 132  #define SDIO_DEVICE_ID_BROADCOM_43341          0xa94d
 133  #define SDIO_DEVICE_ID_BROADCOM_4335_4339      0x4335
 134  #define SDIO_DEVICE_ID_BROADCOM_43362          0xa962
 135 +#define SDIO_DEVICE_ID_BROADCOM_43430          0xa9a6
 136  #define SDIO_DEVICE_ID_BROADCOM_4345           0x4345
 137  #define SDIO_DEVICE_ID_BROADCOM_4354           0x4354
 138