package/boot/uboot-lantiq/patches/0020-MIPS-lantiq-add-NAND-SPL-support.patch

   1 From e17398316e82d8b28217232b4fd6030c65138e74 Mon Sep 17 00:00:00 2001
   2 From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
   3 Date: Mon, 12 Aug 2013 01:18:00 +0200
   4 Subject: MIPS: lantiq: add NAND SPL support
   5
   6 Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
   7
   8 --- a/arch/mips/cpu/mips32/lantiq-common/spl.c
   9 +++ b/arch/mips/cpu/mips32/lantiq-common/spl.c
  10 @@ -8,6 +8,7 @@
  11  #include <image.h>
  12  #include <version.h>
  13  #include <spi_flash.h>
  14 +#include <nand.h>
  15  #include <linux/compiler.h>
  16  #include <lzma/LzmaDec.h>
  17  #include <linux/lzo.h>
  18 @@ -63,6 +64,18 @@
  19  #define spl_boot_nor_flash     0
  20  #endif
  21
  22 +#if defined(CONFIG_LTQ_SUPPORT_SPL_NAND_FLASH) && defined(CONFIG_SYS_BOOT_NANDSPL)
  23 +#define spl_boot_nand_flash    1
  24 +#else
  25 +#define spl_boot_nand_flash    0
  26 +#ifndef CONFIG_SYS_NAND_U_BOOT_OFFS
  27 +#define CONFIG_SYS_NAND_U_BOOT_OFFS    0
  28 +#endif
  29 +#ifndef CONFIG_SYS_NAND_PAGE_SIZE
  30 +#define CONFIG_SYS_NAND_PAGE_SIZE      0
  31 +#endif
  32 +#endif
  33 +
  34  #define spl_sync()     __asm__ __volatile__("sync");
  35
  36  struct spl_image {
  37 @@ -337,6 +350,58 @@ static int spl_load_nor_flash(struct spl
  38         return ret;
  39  }
  40
  41 +static int spl_load_nand_flash(struct spl_image *spl)
  42 +{
  43 +       image_header_t *hdr;
  44 +       int ret;
  45 +       unsigned long loadaddr;
  46 +
  47 +       /*
  48 +        * Image format:
  49 +        *
  50 +        * - 12 byte non-volatile bootstrap header
  51 +        * - SPL binary
  52 +        * - 12 byte non-volatile bootstrap header
  53 +        * - padding bytes up to CONFIG_SYS_NAND_U_BOOT_OFFS
  54 +        * - 64 byte U-Boot mkimage header
  55 +        * - U-Boot binary
  56 +        */
  57 +       spl->data_addr = CONFIG_SYS_NAND_U_BOOT_OFFS;
  58 +
  59 +       spl_puts("SPL: initializing NAND flash\n");
  60 +       nand_init();
  61 +
  62 +       spl_debug("SPL: reading image header at page offset %lx\n",
  63 +                 spl->data_addr);
  64 +
  65 +       hdr = (image_header_t *) CONFIG_LOADADDR;
  66 +       ret = nand_spl_load_image(spl->data_addr,
  67 +                                 CONFIG_SYS_NAND_PAGE_SIZE, hdr);
  68 +       if (ret)
  69 +               return ret;
  70 +
  71 +       spl_debug("SPL: checking image header at address %p\n", hdr);
  72 +
  73 +       ret = spl_parse_image(hdr, spl);
  74 +       if (ret)
  75 +               return ret;
  76 +
  77 +       if (spl_is_compressed(spl))
  78 +               loadaddr = CONFIG_LOADADDR;
  79 +       else
  80 +               loadaddr = spl->entry_addr;
  81 +
  82 +       spl_puts("SPL: loading U-Boot to RAM\n");
  83 +
  84 +       ret = nand_spl_load_image(spl->data_addr, spl->data_size,
  85 +                                 (void *) loadaddr);
  86 +
  87 +       if (spl_is_compressed(spl))
  88 +               ret = spl_uncompress(spl, loadaddr);
  89 +
  90 +       return ret;
  91 +}
  92 +
  93  static int spl_load(struct spl_image *spl)
  94  {
  95         int ret;
  96 @@ -345,6 +410,8 @@ static int spl_load(struct spl_image *sp
  97                 ret = spl_load_spi_flash(spl);
  98         else if (spl_boot_nor_flash)
  99                 ret = spl_load_nor_flash(spl);
 100 +       else if (spl_boot_nand_flash)
 101 +               ret = spl_load_nand_flash(spl);
 102         else
 103                 ret = 1;
 104
 105 --- a/arch/mips/include/asm/lantiq/config.h
 106 +++ b/arch/mips/include/asm/lantiq/config.h
 107 @@ -40,6 +40,26 @@
 108  #define CONFIG_SPI_SPL_SIMPLE
 109  #endif
 110
 111 +/*
 112 + * NAND flash SPL
 113 + * BOOT CFG 06 only (address cycle based probing, 2KB or 512B page size)
 114 + */
 115 +#if defined(CONFIG_LTQ_SUPPORT_SPL_NAND_FLASH) && defined(CONFIG_SYS_BOOT_NANDSPL)
 116 +#define CONFIG_SPL
 117 +#define CONFIG_SPL_NAND_SUPPORT
 118 +#define CONFIG_SPL_NAND_DRIVERS
 119 +#define CONFIG_SPL_NAND_SIMPLE
 120 +#define CONFIG_SPL_NAND_ECC
 121 +
 122 +/* use software ECC until driver supports HW ECC */
 123 +#define CONFIG_SPL_NAND_SOFTECC
 124 +#define CONFIG_SYS_NAND_ECCSIZE                256
 125 +#define CONFIG_SYS_NAND_ECCBYTES       3
 126 +#define CONFIG_SYS_NAND_ECCPOS         {40, 41, 42, 43, 44, 45, 46, 47, \
 127 +                                       48, 49, 50, 51, 52, 53, 54, 55, \
 128 +                                       56, 57, 58, 59, 60, 61, 62, 63}
 129 +#endif
 130 +
 131  #if defined(CONFIG_LTQ_SUPPORT_SPL_NOR_FLASH) && defined(CONFIG_SYS_BOOT_NORSPL)
 132  #define CONFIG_SPL
 133  #endif
 134 @@ -148,6 +168,21 @@
 135  #define CONFIG_ENV_LOAD_UBOOT_SF
 136  #endif
 137
 138 +#if defined(CONFIG_LTQ_SUPPORT_NAND_FLASH)
 139 +#define CONFIG_ENV_WRITE_UBOOT_NAND                            \
 140 +       "write-uboot-nand="                                     \
 141 +       "nand erase 0 $filesize && "                            \
 142 +       "nand write $fileaddr 0 $filesize\0"
 143 +
 144 +#define CONFIG_ENV_LOAD_UBOOT_NAND                                             \
 145 +       "load-uboot-nandspl=tftpboot u-boot.ltq.nandspl\0"                      \
 146 +       "load-uboot-nandspl-lzo=tftpboot u-boot.ltq.lzo.nandspl\0"              \
 147 +       "load-uboot-nandspl-lzma=tftpboot u-boot.ltq.lzma.nandspl\0"
 148 +#else
 149 +#define CONFIG_ENV_WRITE_UBOOT_NAND
 150 +#define CONFIG_ENV_LOAD_UBOOT_NAND
 151 +#endif
 152 +
 153  #define CONFIG_ENV_LANTIQ_DEFAULTS     \
 154         CONFIG_ENV_CONSOLEDEV           \
 155         CONFIG_ENV_ADDCONSOLE           \
 156 @@ -159,6 +194,8 @@
 157         CONFIG_ENV_LOAD_UBOOT_NOR       \
 158         CONFIG_ENV_SF_PROBE             \
 159         CONFIG_ENV_WRITE_UBOOT_SF       \
 160 -       CONFIG_ENV_LOAD_UBOOT_SF
 161 +       CONFIG_ENV_LOAD_UBOOT_SF        \
 162 +       CONFIG_ENV_WRITE_UBOOT_NAND     \
 163 +       CONFIG_ENV_LOAD_UBOOT_NAND
 164
 165  #endif /* __LANTIQ_CONFIG_H__ */