X-Git-Url: https://git.archive.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Fgeneric%2Fpatches-3.13%2F132-mips_inline_dma_ops.patch;h=798d551ce52774ac7b5a8d75ebc981d73eb3971a;hb=804ec1dfc6a4a1b249ca61e37e7e2c84fd96fb30;hp=a42a049d86d27c9bcda2cda78651358591324ea8;hpb=e4ac818089276c45983fd96188ec246b3e42b55b;p=15.05%2Fopenwrt.git

diff --git a/target/linux/generic/patches-3.13/132-mips_inline_dma_ops.patch b/target/linux/generic/patches-3.13/132-mips_inline_dma_ops.patch
index a42a049d86..798d551ce5 100644
--- a/target/linux/generic/patches-3.13/132-mips_inline_dma_ops.patch
+++ b/target/linux/generic/patches-3.13/132-mips_inline_dma_ops.patch
@@ -19,15 +19,7 @@ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
 
 --- a/arch/mips/Kconfig
 +++ b/arch/mips/Kconfig
-@@ -1145,6 +1145,7 @@ config CPU_LOONGSON2F
- 	depends on SYS_HAS_CPU_LOONGSON2F
- 	select CPU_LOONGSON2
- 	select ARCH_REQUIRE_GPIOLIB
-+	select SYS_HAS_DMA_OPS
- 	help
- 	  The Loongson 2F processor implements the MIPS III instruction set
- 	  with many extensions.
-@@ -1377,6 +1378,7 @@ config CPU_CAVIUM_OCTEON
+@@ -1377,6 +1377,7 @@ config CPU_CAVIUM_OCTEON
  	select LIBFDT
  	select USE_OF
  	select USB_EHCI_BIG_ENDIAN_MMIO
@@ -35,7 +27,7 @@ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
  	help
  	  The Cavium Octeon processor is a highly integrated chip containing
  	  many ethernet hardware widgets for networking tasks. The processor
-@@ -1599,6 +1601,9 @@ config SYS_HAS_CPU_XLR
+@@ -1599,6 +1600,9 @@ config SYS_HAS_CPU_XLR
  config SYS_HAS_CPU_XLP
  	bool