X-Git-Url: https://git.archive.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Far71xx%2Ffiles%2Farch%2Fmips%2Fath79%2Fmach-tl-wr1043nd-v2.c;h=abdbde08d29576e41d4f71e2184053efef9f77bb;hb=2e63ff9e7f805b1e3e5c3ba997f08051bfa5b59d;hp=0c415b969c6da5858f54b9619965e039d377c25f;hpb=b799da4c58da434d633aefc0057f01f554881c30;p=openwrt.git diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c index 0c415b969c..abdbde08d2 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c @@ -43,7 +43,7 @@ #define TL_WR1043_V2_GPIO_LED_SYSTEM 19 #define TL_WR1043_V2_GPIO_BTN_RESET 16 -#define TL_WR1043_V2_GPIO_BTN_WLAN 17 +#define TL_WR1043_V2_GPIO_BTN_RFKILL 17 #define TL_WR1043_V2_GPIO_USB_POWER 21 @@ -94,15 +94,23 @@ static struct gpio_keys_button tl_wr1043_v2_gpio_keys[] __initdata = { .active_low = 1, }, { - .desc = "WLAN button", + .desc = "RFKILL button", .type = EV_KEY, - .code = KEY_WLAN, + .code = KEY_RFKILL, .debounce_interval = TL_WR1043_V2_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR1043_V2_GPIO_BTN_WLAN, + .gpio = TL_WR1043_V2_GPIO_BTN_RFKILL, .active_low = 1, }, }; +static const struct ar8327_led_info tl_wr1043_leds_ar8327[] = { + AR8327_LED_INFO(PHY0_0, HW, "tp-link:green:lan4"), + AR8327_LED_INFO(PHY1_0, HW, "tp-link:green:lan3"), + AR8327_LED_INFO(PHY2_0, HW, "tp-link:green:lan2"), + AR8327_LED_INFO(PHY3_0, HW, "tp-link:green:lan1"), + AR8327_LED_INFO(PHY4_0, HW, "tp-link:green:wan"), +}; + /* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */ static struct ar8327_pad_cfg wr1043nd_v2_ar8327_pad0_cfg = { .mode = AR8327_PAD_MAC_SGMII, @@ -144,6 +152,8 @@ static struct ar8327_platform_data wr1043nd_v2_ar8327_data = { .rxpause = 1, }, .led_cfg = &wr1043nd_v2_ar8327_led_cfg, + .num_leds = ARRAY_SIZE(tl_wr1043_leds_ar8327), + .leds = tl_wr1043_leds_ar8327, }; static struct mdio_board_info wr1043nd_v2_mdio0_info[] = { @@ -154,28 +164,10 @@ static struct mdio_board_info wr1043nd_v2_mdio0_info[] = { }, }; -static void __init wr1043nd_v2_gmac_setup(void) -{ - void __iomem *base; - u32 t; - - base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); - - t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); - - t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII); - t |= QCA955X_ETH_CFG_RGMII_EN; - - __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); - - iounmap(base); -} - static void __init tl_wr1043nd_v2_setup(void) { u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - u8 tmpmac[ETH_ALEN]; ath79_register_m25p80(&wr1043nd_v2_flash_data); @@ -185,14 +177,13 @@ static void __init tl_wr1043nd_v2_setup(void) ARRAY_SIZE(tl_wr1043_v2_gpio_keys), tl_wr1043_v2_gpio_keys); - ath79_init_mac(tmpmac, mac, -1); - ath79_register_wmac(art + TL_WR1043_V2_WMAC_CALDATA_OFFSET, tmpmac); + ath79_register_wmac(art + TL_WR1043_V2_WMAC_CALDATA_OFFSET, mac); mdiobus_register_board_info(wr1043nd_v2_mdio0_info, ARRAY_SIZE(wr1043nd_v2_mdio0_info)); ath79_register_mdio(0, 0x0); - wr1043nd_v2_gmac_setup(); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); /* GMAC0 is connected to the RMGII interface */ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;