X-Git-Url: https://git.archive.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Far71xx%2Ffiles%2Farch%2Fmips%2Fath79%2Fmach-rb91x.c;h=9ef5c4455ebdc40640bb46d27bec312ba8a346f3;hb=deb21015f89f830a0779ac448325678ae3c17dd3;hp=cb9abf7627d34ced7d27ae0c2cb40162296a4f1f;hpb=aebd65730e1b4d06437720f984aee9ec8415fd49;p=openwrt.git diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c index cb9abf7627..9ef5c4455e 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -33,9 +34,9 @@ #include "common.h" #include "dev-eth.h" #include "dev-leds-gpio.h" -#include "dev-m25p80.h" #include "dev-nfc.h" #include "dev-usb.h" +#include "dev-spi.h" #include "dev-wmac.h" #include "machtypes.h" #include "pci.h" @@ -55,6 +56,21 @@ #define RB91X_LATCH_GPIO_BASE AR934X_GPIO_COUNT #define RB91X_LATCH_GPIO(_x) (RB91X_LATCH_GPIO_BASE + (_x)) +#define RB91X_SSR_GPIO_BASE (RB91X_LATCH_GPIO_BASE + AR934X_GPIO_COUNT) +#define RB91X_SSR_GPIO(_x) (RB91X_SSR_GPIO_BASE + (_x)) + +#define RB91X_SSR_BIT_LED1 0 +#define RB91X_SSR_BIT_LED2 1 +#define RB91X_SSR_BIT_LED3 2 +#define RB91X_SSR_BIT_LED4 3 +#define RB91X_SSR_BIT_LED5 4 +#define RB91X_SSR_BIT_5 5 +#define RB91X_SSR_BIT_USB_POWER 6 +#define RB91X_SSR_BIT_PCIE_POWER 7 + +#define RB91X_GPIO_SSR_STROBE RB91X_LATCH_GPIO(0) +#define RB91X_GPIO_LED_POWER RB91X_LATCH_GPIO(1) +#define RB91X_GPIO_LED_USER RB91X_LATCH_GPIO(2) #define RB91X_GPIO_NAND_READ RB91X_LATCH_GPIO(3) #define RB91X_GPIO_NAND_RDY RB91X_LATCH_GPIO(4) #define RB91X_GPIO_NLE RB91X_LATCH_GPIO(11) @@ -63,6 +79,14 @@ #define RB91X_GPIO_NAND_CLE RB91X_LATCH_GPIO(14) #define RB91X_GPIO_NAND_ALE RB91X_LATCH_GPIO(15) +#define RB91X_GPIO_LED_1 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED1) +#define RB91X_GPIO_LED_2 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED2) +#define RB91X_GPIO_LED_3 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED3) +#define RB91X_GPIO_LED_4 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED4) +#define RB91X_GPIO_LED_5 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED5) +#define RB91X_GPIO_USB_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_USB_POWER) +#define RB91X_GPIO_PCIE_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_PCIE_POWER) + struct rb_board_info { const char *name; u32 flags; @@ -116,6 +140,104 @@ static struct rb91x_nand_platform_data rb711gr100_nand_data __initdata = { .gpio_nle = RB91X_GPIO_NLE, }; +static u8 rb711gr100_ssr_initdata[] __initdata = { + BIT(RB91X_SSR_BIT_PCIE_POWER) | + BIT(RB91X_SSR_BIT_USB_POWER) | + BIT(RB91X_SSR_BIT_5) +}; + +static struct gen_74x164_chip_platform_data rb711gr100_ssr_data = { + .base = RB91X_SSR_GPIO_BASE, + .num_registers = ARRAY_SIZE(rb711gr100_ssr_initdata), + .init_data = rb711gr100_ssr_initdata, +}; + +static struct ath79_spi_controller_data rb711gr100_spi0_cdata = { + .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, + .cs_line = 0, + .is_flash = true, +}; + +static struct ath79_spi_controller_data rb711gr100_spi1_cdata = { + .cs_type = ATH79_SPI_CS_TYPE_GPIO, + .cs_line = RB91X_GPIO_SSR_STROBE, +}; + +static struct spi_board_info rb711gr100_spi_info[] = { + { + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 25000000, + .modalias = "m25p80", + .platform_data = &rb711gr100_spi_flash_data, + .controller_data = &rb711gr100_spi0_cdata + }, { + .bus_num = 0, + .chip_select = 1, + .max_speed_hz = 10000000, + .modalias = "74x164", + .platform_data = &rb711gr100_ssr_data, + .controller_data = &rb711gr100_spi1_cdata + } +}; + +static struct ath79_spi_platform_data rb711gr100_spi_data __initdata = { + .bus_num = 0, + .num_chipselect = 2, +}; + +static struct gpio_led rb711gr100_leds[] __initdata = { + { + .name = "rb:green:led1", + .gpio = RB91X_GPIO_LED_1, + .active_low = 0, + }, + { + .name = "rb:green:led2", + .gpio = RB91X_GPIO_LED_2, + .active_low = 0, + }, + { + .name = "rb:green:led3", + .gpio = RB91X_GPIO_LED_3, + .active_low = 0, + }, + { + .name = "rb:green:led4", + .gpio = RB91X_GPIO_LED_4, + .active_low = 0, + }, + { + .name = "rb:green:led5", + .gpio = RB91X_GPIO_LED_5, + .active_low = 0, + }, + { + .name = "rb:green:user", + .gpio = RB91X_GPIO_LED_USER, + .active_low = 0, + }, + { + .name = "rb:green:power", + .gpio = RB91X_GPIO_LED_POWER, + .active_low = 0, + }, +}; + +static struct at803x_platform_data rb91x_at803x_data = { + .disable_smarteee = 1, + .enable_rgmii_rx_delay = 1, + .enable_rgmii_tx_delay = 1, +}; + +static struct mdio_board_info rb91x_mdio0_info[] = { + { + .bus_id = "ag71xx-mdio.0", + .phy_addr = 0, + .platform_data = &rb91x_at803x_data, + }, +}; + static void __init rb711gr100_init_partitions(const struct rb_info *info) { rb711gr100_spi_partitions[0].size = info->hard_cfg_offs; @@ -182,13 +304,18 @@ static void __init rb711gr100_setup(void) mips_set_machine_name(buf); rb711gr100_init_partitions(info); - ath79_register_m25p80(&rb711gr100_spi_flash_data); + ath79_register_spi(&rb711gr100_spi_data, rb711gr100_spi_info, + ARRAY_SIZE(rb711gr100_spi_info)); ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | + AR934X_ETH_CFG_RXD_DELAY | AR934X_ETH_CFG_SW_ONLY_MODE); ath79_register_mdio(0, 0x0); + mdiobus_register_board_info(rb91x_mdio0_info, + ARRAY_SIZE(rb91x_mdio0_info)); + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ath79_eth0_data.phy_mask = BIT(0); @@ -206,6 +333,9 @@ static void __init rb711gr100_setup(void) &rb711gr100_gpio_latch_data, sizeof(rb711gr100_gpio_latch_data)); + ath79_register_leds_gpio(-1, ARRAY_SIZE(rb711gr100_leds), + rb711gr100_leds); + flags = rb711gr100_get_flags(info); if (flags & RB91X_FLAG_USB)