2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
3 * JZ4740 platform IRQ support
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * You should have received a copy of the GNU General Public License along
11 * with this program; if not, write to the Free Software Foundation, Inc.,
12 * 675 Mass Ave, Cambridge, MA 02139, USA.
16 #include <linux/errno.h>
17 #include <linux/init.h>
18 #include <linux/types.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/timex.h>
22 #include <linux/slab.h>
23 #include <linux/delay.h>
26 #include <asm/mipsregs.h>
27 #include <asm/irq_cpu.h>
29 static void __iomem *jz_intc_base;
30 static uint32_t jz_intc_wakeup;
31 static uint32_t jz_intc_saved;
33 #define JZ_REG_BASE_INTC 0x10001000
35 #define JZ_REG_INTC_STATUS 0x00
36 #define JZ_REG_INTC_MASK 0x04
37 #define JZ_REG_INTC_SET_MASK 0x08
38 #define JZ_REG_INTC_CLEAR_MASK 0x0c
39 #define JZ_REG_INTC_PENDING 0x10
41 #define IRQ_BIT(x) BIT((x) - JZ_IRQ_BASE)
43 static void intc_irq_unmask(unsigned int irq)
45 writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_CLEAR_MASK);
48 static void intc_irq_mask(unsigned int irq)
50 writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_SET_MASK);
53 static void intc_irq_ack(unsigned int irq)
55 writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_PENDING);
58 static int intc_irq_set_wake(unsigned int irq, unsigned int on)
61 jz_intc_wakeup |= IRQ_BIT(irq);
63 jz_intc_wakeup &= ~IRQ_BIT(irq);
68 static struct irq_chip intc_irq_type = {
70 .mask = intc_irq_mask,
71 .unmask = intc_irq_unmask,
73 .set_wake = intc_irq_set_wake,
76 static irqreturn_t jz4740_cascade(int irq, void *data)
79 irq_reg = readl(jz_intc_base + JZ_REG_INTC_PENDING);
82 generic_handle_irq(ffs(irq_reg) - 1 + JZ_IRQ_BASE);
89 static struct irqaction jz4740_cascade_action = {
90 .handler = jz4740_cascade,
91 .name = "JZ4740 cascade interrupt"
94 void __init arch_init_irq(void)
99 jz_intc_base = ioremap(JZ_REG_BASE_INTC, 0x14);
101 for (i = JZ_IRQ_BASE; i < JZ_IRQ_BASE + 32; i++) {
103 set_irq_chip_and_handler(i, &intc_irq_type, handle_level_irq);
106 setup_irq(2, &jz4740_cascade_action);
109 asmlinkage void plat_irq_dispatch(void)
111 unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
112 if (pending & STATUSF_IP2)
113 jz4740_cascade(2, NULL);
114 else if(pending & STATUSF_IP3)
117 spurious_interrupt();
120 /* TODO: Use sysdev */
121 void jz4740_intc_suspend(void)
123 jz_intc_saved = readl(jz_intc_base + JZ_REG_INTC_MASK);
124 writel(~jz_intc_wakeup, jz_intc_base + JZ_REG_INTC_SET_MASK);
127 void jz4740_intc_resume(void)
129 writel(~jz_intc_saved, jz_intc_base + JZ_REG_INTC_CLEAR_MASK);