1 From 538d4a6ca5f41039d906f28be82e0f4d26ec8ac9 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
3 Date: Mon, 23 Dec 2013 00:32:44 -0300
4 Subject: [PATCH] ARM: sunxi: dt: add nodes for the mbus clock
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9 mbus is the memory bus clock, and it is present on both sun5i and sun7i
10 machines. Its register layout is compatible with the mod0 one.
12 Signed-off-by: Emilio López <emilio@elopez.com.ar>
13 Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
15 arch/arm/boot/dts/sun5i-a10s.dtsi | 8 ++++++++
16 arch/arm/boot/dts/sun5i-a13.dtsi | 8 ++++++++
17 arch/arm/boot/dts/sun7i-a20.dtsi | 8 ++++++++
18 3 files changed, 24 insertions(+)
20 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi
21 +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
23 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
24 clock-output-names = "ir0";
27 + mbus_clk: clk@01c2015c {
29 + compatible = "allwinner,sun4i-mod0-clk";
30 + reg = <0x01c2015c 0x4>;
31 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
32 + clock-output-names = "mbus";
37 --- a/arch/arm/boot/dts/sun5i-a13.dtsi
38 +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
40 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
41 clock-output-names = "ir0";
44 + mbus_clk: clk@01c2015c {
46 + compatible = "allwinner,sun4i-mod0-clk";
47 + reg = <0x01c2015c 0x4>;
48 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
49 + clock-output-names = "mbus";
54 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
55 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
57 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
58 clock-output-names = "spi3";
61 + mbus_clk: clk@01c2015c {
63 + compatible = "allwinner,sun4i-mod0-clk";
64 + reg = <0x01c2015c 0x4>;
65 + clocks = <&osc24M>, <&pll6 2>, <&pll5 1>;
66 + clock-output-names = "mbus";