target/linux/generic-2.6/files/drivers/net/phy/rtl8366s.c

   1 /*
   2  * Platform driver for the Realtek RTL8366S ethernet switch
   3  *
   4  * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published
   9  * by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/delay.h>
  17 #include <linux/skbuff.h>
  18 #include <linux/switch.h>
  19 #include <linux/rtl8366s.h>
  20
  21 #include "rtl8366_smi.h"
  22
  23 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
  24 #include <linux/debugfs.h>
  25 #endif
  26
  27 #define RTL8366S_DRIVER_DESC    "Realtek RTL8366S ethernet switch driver"
  28 #define RTL8366S_DRIVER_VER     "0.2.2"
  29
  30 #define RTL8366S_PHY_NO_MAX                 4
  31 #define RTL8366S_PHY_PAGE_MAX               7
  32 #define RTL8366S_PHY_ADDR_MAX               31
  33
  34 #define RTL8366_CHIP_GLOBAL_CTRL_REG        0x0000
  35 #define RTL8366_CHIP_CTRL_VLAN              (1 << 13)
  36
  37 #define RTL8366_RESET_CTRL_REG              0x0100
  38 #define RTL8366_CHIP_CTRL_RESET_HW          1
  39 #define RTL8366_CHIP_CTRL_RESET_SW          (1 << 1)
  40
  41 #define RTL8366S_CHIP_VERSION_CTRL_REG      0x0104
  42 #define RTL8366S_CHIP_VERSION_MASK          0xf
  43 #define RTL8366S_CHIP_ID_REG                0x0105
  44 #define RTL8366S_CHIP_ID_8366               0x8366
  45
  46 /* PHY registers control */
  47 #define RTL8366S_PHY_ACCESS_CTRL_REG        0x8028
  48 #define RTL8366S_PHY_ACCESS_DATA_REG        0x8029
  49
  50 #define RTL8366S_PHY_CTRL_READ              1
  51 #define RTL8366S_PHY_CTRL_WRITE             0
  52
  53 #define RTL8366S_PHY_REG_MASK               0x1f
  54 #define RTL8366S_PHY_PAGE_OFFSET            5
  55 #define RTL8366S_PHY_PAGE_MASK              (0x7 << 5)
  56 #define RTL8366S_PHY_NO_OFFSET              9
  57 #define RTL8366S_PHY_NO_MASK                (0x1f << 9)
  58
  59 /* LED control registers */
  60 #define RTL8366_LED_BLINKRATE_REG           0x0420
  61 #define RTL8366_LED_BLINKRATE_BIT           0
  62 #define RTL8366_LED_BLINKRATE_MASK          0x0007
  63
  64 #define RTL8366_LED_CTRL_REG                0x0421
  65 #define RTL8366_LED_0_1_CTRL_REG            0x0422
  66 #define RTL8366_LED_2_3_CTRL_REG            0x0423
  67
  68 #define RTL8366S_MIB_COUNT                  33
  69 #define RTL8366S_GLOBAL_MIB_COUNT           1
  70 #define RTL8366S_MIB_COUNTER_PORT_OFFSET    0x0040
  71 #define RTL8366S_MIB_COUNTER_BASE           0x1000
  72 #define RTL8366S_MIB_CTRL_REG               0x11F0
  73 #define RTL8366S_MIB_CTRL_USER_MASK         0x01FF
  74 #define RTL8366S_MIB_CTRL_BUSY_MASK         0x0001
  75 #define RTL8366S_MIB_CTRL_RESET_MASK        0x0002
  76
  77 #define RTL8366S_MIB_CTRL_GLOBAL_RESET_MASK 0x0004
  78 #define RTL8366S_MIB_CTRL_PORT_RESET_BIT    0x0003
  79 #define RTL8366S_MIB_CTRL_PORT_RESET_MASK   0x01FC
  80
  81
  82 #define RTL8366S_PORT_VLAN_CTRL_BASE        0x0058
  83 #define RTL8366S_PORT_VLAN_CTRL_REG(_p)  \
  84                 (RTL8366S_PORT_VLAN_CTRL_BASE + (_p) / 4)
  85 #define RTL8366S_PORT_VLAN_CTRL_MASK        0xf
  86 #define RTL8366S_PORT_VLAN_CTRL_SHIFT(_p)   (4 * ((_p) % 4))
  87
  88
  89 #define RTL8366S_VLAN_TABLE_READ_BASE       0x018B
  90 #define RTL8366S_VLAN_TABLE_WRITE_BASE      0x0185
  91
  92 #define RTL8366S_VLAN_TB_CTRL_REG           0x010F
  93
  94 #define RTL8366S_TABLE_ACCESS_CTRL_REG      0x0180
  95 #define RTL8366S_TABLE_VLAN_READ_CTRL       0x0E01
  96 #define RTL8366S_TABLE_VLAN_WRITE_CTRL      0x0F01
  97
  98 #define RTL8366S_VLAN_MEMCONF_BASE          0x0016
  99
 100
 101 #define RTL8366S_PORT_LINK_STATUS_BASE      0x0060
 102 #define RTL8366S_PORT_STATUS_SPEED_MASK     0x0003
 103 #define RTL8366S_PORT_STATUS_DUPLEX_MASK    0x0004
 104 #define RTL8366S_PORT_STATUS_LINK_MASK      0x0010
 105 #define RTL8366S_PORT_STATUS_TXPAUSE_MASK   0x0020
 106 #define RTL8366S_PORT_STATUS_RXPAUSE_MASK   0x0040
 107 #define RTL8366S_PORT_STATUS_AN_MASK        0x0080
 108
 109
 110 #define RTL8366_PORT_NUM_CPU                5
 111 #define RTL8366_NUM_PORTS                   6
 112 #define RTL8366_NUM_VLANS                   16
 113 #define RTL8366_NUM_LEDGROUPS               4
 114 #define RTL8366_NUM_VIDS                    4096
 115 #define RTL8366S_PRIORITYMAX                7
 116 #define RTL8366S_FIDMAX                     7
 117
 118
 119 #define RTL8366_PORT_1                      (1 << 0) /* In userspace port 0 */
 120 #define RTL8366_PORT_2                      (1 << 1) /* In userspace port 1 */
 121 #define RTL8366_PORT_3                      (1 << 2) /* In userspace port 2 */
 122 #define RTL8366_PORT_4                      (1 << 3) /* In userspace port 3 */
 123
 124 #define RTL8366_PORT_UNKNOWN                (1 << 4) /* No known connection */
 125 #define RTL8366_PORT_CPU                    (1 << 5) /* CPU port */
 126
 127 #define RTL8366_PORT_ALL                    (RTL8366_PORT_1 |       \
 128                                              RTL8366_PORT_2 |       \
 129                                              RTL8366_PORT_3 |       \
 130                                              RTL8366_PORT_4 |       \
 131                                              RTL8366_PORT_UNKNOWN | \
 132                                              RTL8366_PORT_CPU)
 133
 134 #define RTL8366_PORT_ALL_BUT_CPU            (RTL8366_PORT_1 |       \
 135                                              RTL8366_PORT_2 |       \
 136                                              RTL8366_PORT_3 |       \
 137                                              RTL8366_PORT_4 |       \
 138                                              RTL8366_PORT_UNKNOWN)
 139
 140 #define RTL8366_PORT_ALL_EXTERNAL           (RTL8366_PORT_1 |       \
 141                                              RTL8366_PORT_2 |       \
 142                                              RTL8366_PORT_3 |       \
 143                                              RTL8366_PORT_4)
 144
 145 #define RTL8366_PORT_ALL_INTERNAL           (RTL8366_PORT_UNKNOWN | \
 146                                              RTL8366_PORT_CPU)
 147
 148 struct rtl8366s {
 149         struct device           *parent;
 150         struct rtl8366_smi      smi;
 151         struct switch_dev       dev;
 152         char                    buf[4096];
 153 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 154         struct dentry           *debugfs_root;
 155 #endif
 156 };
 157
 158 struct rtl8366s_vlan_mc {
 159         u16     reserved2:1;
 160         u16     priority:3;
 161         u16     vid:12;
 162
 163         u16     reserved1:1;
 164         u16     fid:3;
 165         u16     untag:6;
 166         u16     member:6;
 167 };
 168
 169 struct rtl8366s_vlan_4k {
 170         u16     reserved1:4;
 171         u16     vid:12;
 172
 173         u16     reserved2:1;
 174         u16     fid:3;
 175         u16     untag:6;
 176         u16     member:6;
 177 };
 178
 179 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 180 u16 g_dbg_reg;
 181 #endif
 182
 183 struct mib_counter {
 184         unsigned        offset;
 185         unsigned        length;
 186         const char      *name;
 187 };
 188
 189 static struct mib_counter rtl8366s_mib_counters[RTL8366S_MIB_COUNT] = {
 190         {  0, 4, "IfInOctets                        " },
 191         {  4, 4, "EtherStatsOctets                  " },
 192         {  8, 2, "EtherStatsUnderSizePkts           " },
 193         { 10, 2, "EtherFregament                    " },
 194         { 12, 2, "EtherStatsPkts64Octets            " },
 195         { 14, 2, "EtherStatsPkts65to127Octets       " },
 196         { 16, 2, "EtherStatsPkts128to255Octets      " },
 197         { 18, 2, "EtherStatsPkts256to511Octets      " },
 198         { 20, 2, "EtherStatsPkts512to1023Octets     " },
 199         { 22, 2, "EtherStatsPkts1024to1518Octets    " },
 200         { 24, 2, "EtherOversizeStats                " },
 201         { 26, 2, "EtherStatsJabbers                 " },
 202         { 28, 2, "IfInUcastPkts                     " },
 203         { 30, 2, "EtherStatsMulticastPkts           " },
 204         { 32, 2, "EtherStatsBroadcastPkts           " },
 205         { 34, 2, "EtherStatsDropEvents              " },
 206         { 36, 2, "Dot3StatsFCSErrors                " },
 207         { 38, 2, "Dot3StatsSymbolErrors             " },
 208         { 40, 2, "Dot3InPauseFrames                 " },
 209         { 42, 2, "Dot3ControlInUnknownOpcodes       " },
 210         { 44, 4, "IfOutOctets                       " },
 211         { 48, 2, "Dot3StatsSingleCollisionFrames    " },
 212         { 50, 2, "Dot3StatMultipleCollisionFrames   " },
 213         { 52, 2, "Dot3sDeferredTransmissions        " },
 214         { 54, 2, "Dot3StatsLateCollisions           " },
 215         { 56, 2, "EtherStatsCollisions              " },
 216         { 58, 2, "Dot3StatsExcessiveCollisions      " },
 217         { 60, 2, "Dot3OutPauseFrames                " },
 218         { 62, 2, "Dot1dBasePortDelayExceededDiscards" },
 219         { 64, 2, "Dot1dTpPortInDiscards             " },
 220         { 66, 2, "IfOutUcastPkts                    " },
 221         { 68, 2, "IfOutMulticastPkts                " },
 222         { 70, 2, "IfOutBroadcastPkts                " },
 223 };
 224
 225 static inline struct rtl8366s *smi_to_rtl8366s(struct rtl8366_smi *smi)
 226 {
 227         return container_of(smi, struct rtl8366s, smi);
 228 }
 229
 230 static inline struct rtl8366s *sw_to_rtl8366s(struct switch_dev *sw)
 231 {
 232         return container_of(sw, struct rtl8366s, dev);
 233 }
 234
 235 static int rtl8366s_reset_chip(struct rtl8366s *rtl)
 236 {
 237         struct rtl8366_smi *smi = &rtl->smi;
 238         int timeout = 10;
 239         u32 data;
 240
 241         rtl8366_smi_write_reg(smi, RTL8366_RESET_CTRL_REG,
 242                               RTL8366_CHIP_CTRL_RESET_HW);
 243         do {
 244                 msleep(1);
 245                 if (rtl8366_smi_read_reg(smi, RTL8366_RESET_CTRL_REG, &data))
 246                         return -EIO;
 247
 248                 if (!(data & RTL8366_CHIP_CTRL_RESET_HW))
 249                         break;
 250         } while (--timeout);
 251
 252         if (!timeout) {
 253                 printk("Timeout waiting for the switch to reset\n");
 254                 return -EIO;
 255         }
 256
 257         return 0;
 258 }
 259
 260 static int rtl8366s_read_phy_reg(struct rtl8366_smi *smi,
 261                                  u32 phy_no, u32 page, u32 addr, u32 *data)
 262 {
 263         u32 reg;
 264         int ret;
 265
 266         if (phy_no > RTL8366S_PHY_NO_MAX)
 267                 return -EINVAL;
 268
 269         if (page > RTL8366S_PHY_PAGE_MAX)
 270                 return -EINVAL;
 271
 272         if (addr > RTL8366S_PHY_ADDR_MAX)
 273                 return -EINVAL;
 274
 275         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 276                                     RTL8366S_PHY_CTRL_READ);
 277         if (ret)
 278                 return ret;
 279
 280         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 281               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 282               (addr & RTL8366S_PHY_REG_MASK);
 283
 284         ret = rtl8366_smi_write_reg(smi, reg, 0);
 285         if (ret)
 286                 return ret;
 287
 288         ret = rtl8366_smi_read_reg(smi, RTL8366S_PHY_ACCESS_DATA_REG, data);
 289         if (ret)
 290                 return ret;
 291
 292         return 0;
 293 }
 294
 295 static int rtl8366s_write_phy_reg(struct rtl8366_smi *smi,
 296                                   u32 phy_no, u32 page, u32 addr, u32 data)
 297 {
 298         u32 reg;
 299         int ret;
 300
 301         if (phy_no > RTL8366S_PHY_NO_MAX)
 302                 return -EINVAL;
 303
 304         if (page > RTL8366S_PHY_PAGE_MAX)
 305                 return -EINVAL;
 306
 307         if (addr > RTL8366S_PHY_ADDR_MAX)
 308                 return -EINVAL;
 309
 310         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 311                                     RTL8366S_PHY_CTRL_WRITE);
 312         if (ret)
 313                 return ret;
 314
 315         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 316               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 317               (addr & RTL8366S_PHY_REG_MASK);
 318
 319         ret = rtl8366_smi_write_reg(smi, reg, data);
 320         if (ret)
 321                 return ret;
 322
 323         return 0;
 324 }
 325
 326 static int rtl8366_get_mib_counter(struct rtl8366s *rtl, int counter,
 327                                    int port, unsigned long long *val)
 328 {
 329         struct rtl8366_smi *smi = &rtl->smi;
 330         int i;
 331         int err;
 332         u32 addr, data;
 333         u64 mibvalue;
 334
 335         if (port > RTL8366_NUM_PORTS || counter >= RTL8366S_MIB_COUNT)
 336                 return -EINVAL;
 337
 338         addr = RTL8366S_MIB_COUNTER_BASE +
 339                RTL8366S_MIB_COUNTER_PORT_OFFSET * (port) +
 340                rtl8366s_mib_counters[counter].offset;
 341
 342         /*
 343          * Writing access counter address first
 344          * then ASIC will prepare 64bits counter wait for being retrived
 345          */
 346         data = 0; /* writing data will be discard by ASIC */
 347         err = rtl8366_smi_write_reg(smi, addr, data);
 348         if (err)
 349                 return err;
 350
 351         /* read MIB control register */
 352         err =  rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
 353         if (err)
 354                 return err;
 355
 356         if (data & RTL8366S_MIB_CTRL_BUSY_MASK)
 357                 return -EBUSY;
 358
 359         if (data & RTL8366S_MIB_CTRL_RESET_MASK)
 360                 return -EIO;
 361
 362         mibvalue = 0;
 363         for (i = rtl8366s_mib_counters[counter].length; i > 0; i--) {
 364                 err = rtl8366_smi_read_reg(smi, addr + (i - 1), &data);
 365                 if (err)
 366                         return err;
 367
 368                 mibvalue = (mibvalue << 16) | (data & 0xFFFF);
 369         }
 370
 371         *val = mibvalue;
 372         return 0;
 373 }
 374
 375 static int rtl8366s_get_vlan_4k(struct rtl8366s *rtl, u32 vid,
 376                                 struct rtl8366s_vlan_4k *vlan4k)
 377 {
 378         struct rtl8366_smi *smi = &rtl->smi;
 379         int err;
 380         u32 data;
 381         u16 *tableaddr;
 382
 383         memset(vlan4k, '\0', sizeof(struct rtl8366s_vlan_4k));
 384         vlan4k->vid = vid;
 385
 386         if (vid >= RTL8366_NUM_VIDS)
 387                 return -EINVAL;
 388
 389         tableaddr = (u16 *)vlan4k;
 390
 391         /* write VID */
 392         data = *tableaddr;
 393         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 394         if (err)
 395                 return err;
 396
 397         /* write table access control word */
 398         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 399                                     RTL8366S_TABLE_VLAN_READ_CTRL);
 400         if (err)
 401                 return err;
 402
 403         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE, &data);
 404         if (err)
 405                 return err;
 406
 407         *tableaddr = data;
 408         tableaddr++;
 409
 410         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE + 1,
 411                                    &data);
 412         if (err)
 413                 return err;
 414
 415         *tableaddr = data;
 416         vlan4k->vid = vid;
 417
 418         return 0;
 419 }
 420
 421 static int rtl8366s_set_vlan_4k(struct rtl8366s *rtl,
 422                                 const struct rtl8366s_vlan_4k *vlan4k)
 423 {
 424         struct rtl8366_smi *smi = &rtl->smi;
 425         int err;
 426         u32 data;
 427         u16 *tableaddr;
 428
 429         if (vlan4k->vid >= RTL8366_NUM_VIDS ||
 430             vlan4k->member > RTL8366_PORT_ALL ||
 431             vlan4k->untag > RTL8366_PORT_ALL ||
 432             vlan4k->fid > RTL8366S_FIDMAX)
 433                 return -EINVAL;
 434
 435         tableaddr = (u16 *)vlan4k;
 436
 437         data = *tableaddr;
 438
 439         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 440         if (err)
 441                 return err;
 442
 443         tableaddr++;
 444
 445         data = *tableaddr;
 446
 447         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE + 1,
 448                                     data);
 449         if (err)
 450                 return err;
 451
 452         /* write table access control word */
 453         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 454                                     RTL8366S_TABLE_VLAN_WRITE_CTRL);
 455
 456         return err;
 457 }
 458
 459 static int rtl8366s_get_vlan_mc(struct rtl8366s *rtl, u32 index,
 460                                 struct rtl8366s_vlan_mc *vlanmc)
 461 {
 462         struct rtl8366_smi *smi = &rtl->smi;
 463         int err;
 464         u32 addr;
 465         u32 data;
 466         u16 *tableaddr;
 467
 468         memset(vlanmc, '\0', sizeof(struct rtl8366s_vlan_mc));
 469
 470         if (index >= RTL8366_NUM_VLANS)
 471                 return -EINVAL;
 472
 473         tableaddr = (u16 *)vlanmc;
 474
 475         addr = RTL8366S_VLAN_MEMCONF_BASE + (index << 1);
 476         err = rtl8366_smi_read_reg(smi, addr, &data);
 477         if (err)
 478                 return err;
 479
 480         *tableaddr = data;
 481         tableaddr++;
 482
 483         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index << 1);
 484         err = rtl8366_smi_read_reg(smi, addr, &data);
 485         if (err)
 486                 return err;
 487
 488         *tableaddr = data;
 489
 490         return 0;
 491 }
 492
 493 static int rtl8366s_set_vlan_mc(struct rtl8366s *rtl, u32 index,
 494                                 const struct rtl8366s_vlan_mc *vlanmc)
 495 {
 496         struct rtl8366_smi *smi = &rtl->smi;
 497         int err;
 498         u32 addr;
 499         u32 data;
 500         u16 *tableaddr;
 501
 502         if (index >= RTL8366_NUM_VLANS ||
 503             vlanmc->vid >= RTL8366_NUM_VIDS ||
 504             vlanmc->priority > RTL8366S_PRIORITYMAX ||
 505             vlanmc->member > RTL8366_PORT_ALL ||
 506             vlanmc->untag > RTL8366_PORT_ALL ||
 507             vlanmc->fid > RTL8366S_FIDMAX)
 508                 return -EINVAL;
 509
 510         addr = RTL8366S_VLAN_MEMCONF_BASE + (index << 1);
 511
 512         tableaddr = (u16 *)vlanmc;
 513         data = *tableaddr;
 514
 515         err = rtl8366_smi_write_reg(smi, addr, data);
 516         if (err)
 517                 return err;
 518
 519         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index << 1);
 520
 521         tableaddr++;
 522         data = *tableaddr;
 523
 524         err = rtl8366_smi_write_reg(smi, addr, data);
 525         if (err)
 526                 return err;
 527
 528         return 0;
 529 }
 530
 531 static int rtl8366s_get_port_vlan_index(struct rtl8366s *rtl, int port,
 532                                        int *val)
 533 {
 534         struct rtl8366_smi *smi = &rtl->smi;
 535         u32 data;
 536         int err;
 537
 538         if (port >= RTL8366_NUM_PORTS)
 539                 return -EINVAL;
 540
 541         err = rtl8366_smi_read_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 542                                    &data);
 543         if (err)
 544                 return err;
 545
 546         *val = (data >> RTL8366S_PORT_VLAN_CTRL_SHIFT(port)) &
 547                RTL8366S_PORT_VLAN_CTRL_MASK;
 548
 549         return 0;
 550
 551 }
 552
 553 static int rtl8366s_get_vlan_port_pvid(struct rtl8366s *rtl, int port,
 554                                        int *val)
 555 {
 556         struct rtl8366s_vlan_mc vlanmc;
 557         int err;
 558         int index;
 559
 560         err = rtl8366s_get_port_vlan_index(rtl, port, &index);
 561         if (err)
 562                 return err;
 563
 564         err = rtl8366s_get_vlan_mc(rtl, index, &vlanmc);
 565         if (err)
 566                 return err;
 567
 568         *val = vlanmc.vid;
 569         return 0;
 570 }
 571
 572 static int rtl8366s_set_port_vlan_index(struct rtl8366s *rtl, int port,
 573                                         int index)
 574 {
 575         struct rtl8366_smi *smi = &rtl->smi;
 576         u32 data;
 577         int err;
 578
 579         if (port >= RTL8366_NUM_PORTS || index >= RTL8366_NUM_VLANS)
 580                 return -EINVAL;
 581
 582         err = rtl8366_smi_read_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 583                                    &data);
 584         if (err)
 585                 return err;
 586
 587         data &= ~(RTL8366S_PORT_VLAN_CTRL_MASK <<
 588                   RTL8366S_PORT_VLAN_CTRL_SHIFT(port));
 589         data |= (index & RTL8366S_PORT_VLAN_CTRL_MASK) <<
 590                  RTL8366S_PORT_VLAN_CTRL_SHIFT(port);
 591
 592         err = rtl8366_smi_write_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 593                                     data);
 594         return err;
 595 }
 596
 597 static int rtl8366s_set_vlan_port_pvid(struct rtl8366s *rtl, int port, int val)
 598 {
 599         int i;
 600         struct rtl8366s_vlan_mc vlanmc;
 601         struct rtl8366s_vlan_4k vlan4k;
 602
 603         if (port >= RTL8366_NUM_PORTS || val >= RTL8366_NUM_VIDS)
 604                 return -EINVAL;
 605
 606         /* Updating the 4K entry; lookup it and change the port member set */
 607         rtl8366s_get_vlan_4k(rtl, val, &vlan4k);
 608         vlan4k.member |= ((1 << port) | RTL8366_PORT_CPU);
 609         vlan4k.untag = RTL8366_PORT_ALL_BUT_CPU;
 610         rtl8366s_set_vlan_4k(rtl, &vlan4k);
 611
 612         /*
 613          * For the 16 entries more work needs to be done. First see if such
 614          * VID is already there and change it
 615          */
 616         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 617                 rtl8366s_get_vlan_mc(rtl, i, &vlanmc);
 618
 619                 /* Try to find an existing vid and update port member set */
 620                 if (val == vlanmc.vid) {
 621                         vlanmc.member |= ((1 << port) | RTL8366_PORT_CPU);
 622                         rtl8366s_set_vlan_mc(rtl, i, &vlanmc);
 623
 624                         /* Now update PVID register settings */
 625                         rtl8366s_set_port_vlan_index(rtl, port, i);
 626
 627                         return 0;
 628                 }
 629         }
 630
 631         /*
 632          * PVID could not be found from vlan table. Replace unused (one that
 633          * has no member ports) with new one
 634          */
 635         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 636                 rtl8366s_get_vlan_mc(rtl, i, &vlanmc);
 637
 638                 /*
 639                  * See if this vlan member configuration is unused. It is
 640                  * unused if member set contains no ports or CPU port only
 641                  */
 642                 if (!vlanmc.member || vlanmc.member == RTL8366_PORT_CPU) {
 643                         vlanmc.vid = val;
 644                         vlanmc.priority = 0;
 645                         vlanmc.untag = RTL8366_PORT_ALL_BUT_CPU;
 646                         vlanmc.member = ((1 << port) | RTL8366_PORT_CPU);
 647                         vlanmc.fid = 0;
 648
 649                         rtl8366s_set_vlan_mc(rtl, i, &vlanmc);
 650
 651                         /* Now update PVID register settings */
 652                         rtl8366s_set_port_vlan_index(rtl, port, i);
 653
 654                         return 0;
 655                 }
 656         }
 657
 658         dev_err(rtl->parent,
 659                 "All 16 vlan member configurations are in use\n");
 660
 661         return -EINVAL;
 662 }
 663
 664
 665 static int rtl8366s_vlan_set_vlan(struct rtl8366s *rtl, int enable)
 666 {
 667         struct rtl8366_smi *smi = &rtl->smi;
 668         u32 data = 0;
 669
 670         rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
 671
 672         if (enable)
 673                 data |= RTL8366_CHIP_CTRL_VLAN;
 674         else
 675                 data &= ~RTL8366_CHIP_CTRL_VLAN;
 676
 677         return rtl8366_smi_write_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, data);
 678 }
 679
 680 static int rtl8366s_vlan_set_4ktable(struct rtl8366s *rtl, int enable)
 681 {
 682         struct rtl8366_smi *smi = &rtl->smi;
 683         u32 data = 0;
 684
 685         rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, &data);
 686
 687         if (enable)
 688                 data |= 1;
 689         else
 690                 data &= ~1;
 691
 692         return rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, data);
 693 }
 694
 695 static int rtl8366s_reset_vlan(struct rtl8366s *rtl)
 696 {
 697         struct rtl8366s_vlan_4k vlan4k;
 698         struct rtl8366s_vlan_mc vlanmc;
 699         int err;
 700         int i;
 701
 702         /* clear 16 VLAN member configuration */
 703         vlanmc.vid = 0;
 704         vlanmc.priority = 0;
 705         vlanmc.member = 0;
 706         vlanmc.untag = 0;
 707         vlanmc.fid = 0;
 708         for (i = 0; i < RTL8366_NUM_VLANS; i++) {
 709                 err = rtl8366s_set_vlan_mc(rtl, i, &vlanmc);
 710                 if (err)
 711                         return err;
 712         }
 713
 714         /* Set a default VLAN with vid 1 to 4K table for all ports */
 715         vlan4k.vid = 1;
 716         vlan4k.member = RTL8366_PORT_ALL;
 717         vlan4k.untag = RTL8366_PORT_ALL;
 718         vlan4k.fid = 0;
 719         err = rtl8366s_set_vlan_4k(rtl, &vlan4k);
 720         if (err)
 721                 return err;
 722
 723         /* Set all ports PVID to default VLAN */
 724         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
 725                 err = rtl8366s_set_vlan_port_pvid(rtl, i, 0);
 726                 if (err)
 727                         return err;
 728         }
 729
 730         return 0;
 731 }
 732
 733 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 734 static int rtl8366s_debugfs_open(struct inode *inode, struct file *file)
 735 {
 736         file->private_data = inode->i_private;
 737         return 0;
 738 }
 739
 740 static ssize_t rtl8366s_read_debugfs_mibs(struct file *file,
 741                                           char __user *user_buf,
 742                                           size_t count, loff_t *ppos)
 743 {
 744         struct rtl8366s *rtl = (struct rtl8366s *)file->private_data;
 745         int i, j, len = 0;
 746         char *buf = rtl->buf;
 747
 748         len += snprintf(buf + len, sizeof(rtl->buf) - len, "MIB Counters:\n");
 749         len += snprintf(buf + len, sizeof(rtl->buf) - len, "Counter"
 750                         "                            "
 751                         "Port 0 \t\t Port 1 \t\t Port 2 \t\t Port 3 \t\t "
 752                         "Port 4\n");
 753
 754         for (i = 0; i < 33; ++i) {
 755                 len += snprintf(buf + len, sizeof(rtl->buf) - len, "%d:%s ",
 756                                 i, rtl8366s_mib_counters[i].name);
 757                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
 758                         unsigned long long counter = 0;
 759
 760                         if (!rtl8366_get_mib_counter(rtl, i, j, &counter))
 761                                 len += snprintf(buf + len,
 762                                                 sizeof(rtl->buf) - len,
 763                                                 "[%llu]", counter);
 764                         else
 765                                 len += snprintf(buf + len,
 766                                                 sizeof(rtl->buf) - len,
 767                                                 "[error]");
 768
 769                         if (j != RTL8366_NUM_PORTS - 1) {
 770                                 if (counter < 100000)
 771                                         len += snprintf(buf + len,
 772                                                         sizeof(rtl->buf) - len,
 773                                                         "\t");
 774
 775                                 len += snprintf(buf + len,
 776                                                 sizeof(rtl->buf) - len,
 777                                                 "\t");
 778                         }
 779                 }
 780                 len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
 781         }
 782
 783         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
 784
 785         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 786 }
 787
 788 static ssize_t rtl8366s_read_debugfs_vlan(struct file *file,
 789                                           char __user *user_buf,
 790                                           size_t count, loff_t *ppos)
 791 {
 792         struct rtl8366s *rtl = (struct rtl8366s *)file->private_data;
 793         int i, j, len = 0;
 794         char *buf = rtl->buf;
 795
 796         len += snprintf(buf + len, sizeof(rtl->buf) - len,
 797                         "VLAN Member Config:\n");
 798         len += snprintf(buf + len, sizeof(rtl->buf) - len,
 799                         "\t id \t vid \t prio \t member \t untag  \t fid "
 800                         "\tports\n");
 801
 802         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 803                 struct rtl8366s_vlan_mc vlanmc;
 804
 805                 rtl8366s_get_vlan_mc(rtl, i, &vlanmc);
 806
 807                 len += snprintf(buf + len, sizeof(rtl->buf) - len,
 808                                 "\t[%d] \t %d \t %d \t 0x%04x \t 0x%04x \t %d "
 809                                 "\t", i, vlanmc.vid, vlanmc.priority,
 810                                 vlanmc.member, vlanmc.untag, vlanmc.fid);
 811
 812                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
 813                         int index = 0;
 814                         if (!rtl8366s_get_port_vlan_index(rtl, j, &index)) {
 815                                 if (index == i)
 816                                         len += snprintf(buf + len,
 817                                                         sizeof(rtl->buf) - len,
 818                                                         "%d", j);
 819                         }
 820                 }
 821                 len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
 822         }
 823
 824         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 825 }
 826
 827 static ssize_t rtl8366s_read_debugfs_reg(struct file *file,
 828                                          char __user *user_buf,
 829                                          size_t count, loff_t *ppos)
 830 {
 831         struct rtl8366s *rtl = (struct rtl8366s *)file->private_data;
 832         struct rtl8366_smi *smi = &rtl->smi;
 833         u32 t, reg = g_dbg_reg;
 834         int err, len = 0;
 835         char *buf = rtl->buf;
 836
 837         memset(buf, '\0', sizeof(rtl->buf));
 838
 839         err = rtl8366_smi_read_reg(smi, reg, &t);
 840         if (err) {
 841                 len += snprintf(buf, sizeof(rtl->buf),
 842                                 "Read failed (reg: 0x%04x)\n", reg);
 843                 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 844         }
 845
 846         len += snprintf(buf, sizeof(rtl->buf), "reg = 0x%04x, val = 0x%04x\n",
 847                         reg, t);
 848
 849         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 850 }
 851
 852 static ssize_t rtl8366s_write_debugfs_reg(struct file *file,
 853                                           const char __user *user_buf,
 854                                           size_t count, loff_t *ppos)
 855 {
 856         struct rtl8366s *rtl = (struct rtl8366s *)file->private_data;
 857         struct rtl8366_smi *smi = &rtl->smi;
 858         unsigned long data;
 859         u32 reg = g_dbg_reg;
 860         int err;
 861         size_t len;
 862         char *buf = rtl->buf;
 863
 864         len = min(count, sizeof(rtl->buf) - 1);
 865         if (copy_from_user(buf, user_buf, len)) {
 866                 dev_err(rtl->parent, "copy from user failed\n");
 867                 return -EFAULT;
 868         }
 869
 870         buf[len] = '\0';
 871         if (len > 0 && buf[len - 1] == '\n')
 872                 buf[len - 1] = '\0';
 873
 874
 875         if (strict_strtoul(buf, 16, &data)) {
 876                 dev_err(rtl->parent, "Invalid reg value %s\n", buf);
 877         } else {
 878                 err = rtl8366_smi_write_reg(smi, reg, data);
 879                 if (err) {
 880                         dev_err(rtl->parent,
 881                                 "writing reg 0x%04x val 0x%04lx failed\n",
 882                                 reg, data);
 883                 }
 884         }
 885
 886         return count;
 887 }
 888
 889 static const struct file_operations fops_rtl8366s_regs = {
 890         .read = rtl8366s_read_debugfs_reg,
 891         .write = rtl8366s_write_debugfs_reg,
 892         .open = rtl8366s_debugfs_open,
 893         .owner = THIS_MODULE
 894 };
 895
 896 static const struct file_operations fops_rtl8366s_vlan = {
 897         .read = rtl8366s_read_debugfs_vlan,
 898         .open = rtl8366s_debugfs_open,
 899         .owner = THIS_MODULE
 900 };
 901
 902 static const struct file_operations fops_rtl8366s_mibs = {
 903         .read = rtl8366s_read_debugfs_mibs,
 904         .open = rtl8366s_debugfs_open,
 905         .owner = THIS_MODULE
 906 };
 907
 908 static void rtl8366s_debugfs_init(struct rtl8366s *rtl)
 909 {
 910         struct dentry *node;
 911         struct dentry *root;
 912
 913         if (!rtl->debugfs_root)
 914                 rtl->debugfs_root = debugfs_create_dir("rtl8366s", NULL);
 915
 916         if (!rtl->debugfs_root) {
 917                 dev_err(rtl->parent, "Unable to create debugfs dir\n");
 918                 return;
 919         }
 920         root = rtl->debugfs_root;
 921
 922         node = debugfs_create_x16("reg", S_IRUGO | S_IWUSR, root, &g_dbg_reg);
 923         if (!node) {
 924                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 925                         "reg");
 926                 return;
 927         }
 928
 929         node = debugfs_create_file("val", S_IRUGO | S_IWUSR, root, rtl,
 930                                    &fops_rtl8366s_regs);
 931         if (!node) {
 932                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 933                         "val");
 934                 return;
 935         }
 936
 937         node = debugfs_create_file("vlan", S_IRUSR, root, rtl,
 938                                    &fops_rtl8366s_vlan);
 939         if (!node) {
 940                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 941                         "vlan");
 942                 return;
 943         }
 944
 945         node = debugfs_create_file("mibs", S_IRUSR, root, rtl,
 946                                    &fops_rtl8366s_mibs);
 947         if (!node) {
 948                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 949                         "mibs");
 950                 return;
 951         }
 952 }
 953
 954 static void rtl8366s_debugfs_remove(struct rtl8366s *rtl)
 955 {
 956         if (rtl->debugfs_root) {
 957                 debugfs_remove_recursive(rtl->debugfs_root);
 958                 rtl->debugfs_root = NULL;
 959         }
 960 }
 961
 962 #else
 963 static inline void rtl8366s_debugfs_init(struct rtl8366s *rtl) {}
 964 static inline void rtl8366s_debugfs_remove(struct rtl8366s *rtl) {}
 965 #endif /* CONFIG_RTL8366S_PHY_DEBUG_FS */
 966
 967 static int rtl8366s_sw_reset_mibs(struct switch_dev *dev,
 968                                   const struct switch_attr *attr,
 969                                   struct switch_val *val)
 970 {
 971         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
 972         struct rtl8366_smi *smi = &rtl->smi;
 973         u32 data = 0;
 974
 975         if (val->value.i == 1) {
 976                 rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
 977                 data |= (1 << 2);
 978                 rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
 979         }
 980
 981         return 0;
 982 }
 983
 984 static int rtl8366s_sw_get_vlan_enable(struct switch_dev *dev,
 985                                        const struct switch_attr *attr,
 986                                        struct switch_val *val)
 987 {
 988         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
 989         struct rtl8366_smi *smi = &rtl->smi;
 990         u32 data;
 991
 992         if (attr->ofs == 1) {
 993                 rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
 994
 995                 if (data & RTL8366_CHIP_CTRL_VLAN)
 996                         val->value.i = 1;
 997                 else
 998                         val->value.i = 0;
 999         } else if (attr->ofs == 2) {
1000                 rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, &data);
1001
1002                 if (data & 0x0001)
1003                         val->value.i = 1;
1004                 else
1005                         val->value.i = 0;
1006         }
1007
1008         return 0;
1009 }
1010
1011 static int rtl8366s_sw_get_blinkrate(struct switch_dev *dev,
1012                                      const struct switch_attr *attr,
1013                                      struct switch_val *val)
1014 {
1015         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1016         struct rtl8366_smi *smi = &rtl->smi;
1017         u32 data;
1018
1019         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1020
1021         val->value.i = (data & (RTL8366_LED_BLINKRATE_MASK));
1022
1023         return 0;
1024 }
1025
1026 static int rtl8366s_sw_set_blinkrate(struct switch_dev *dev,
1027                                     const struct switch_attr *attr,
1028                                     struct switch_val *val)
1029 {
1030         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1031         struct rtl8366_smi *smi = &rtl->smi;
1032         u32 data;
1033
1034         if (val->value.i >= 6)
1035                 return -EINVAL;
1036
1037         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1038
1039         data &= ~RTL8366_LED_BLINKRATE_MASK;
1040         data |= val->value.i;
1041
1042         rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1043
1044         return 0;
1045 }
1046
1047 static int rtl8366s_sw_set_vlan_enable(struct switch_dev *dev,
1048                                        const struct switch_attr *attr,
1049                                        struct switch_val *val)
1050 {
1051         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1052
1053         if (attr->ofs == 1)
1054                 return rtl8366s_vlan_set_vlan(rtl, val->value.i);
1055         else
1056                 return rtl8366s_vlan_set_4ktable(rtl, val->value.i);
1057 }
1058
1059 static const char *rtl8366s_speed_str(unsigned speed)
1060 {
1061         switch (speed) {
1062         case 0:
1063                 return "10baseT";
1064         case 1:
1065                 return "100baseT";
1066         case 2:
1067                 return "1000baseT";
1068         }
1069
1070         return "unknown";
1071 }
1072
1073 static int rtl8366s_sw_get_port_link(struct switch_dev *dev,
1074                                      const struct switch_attr *attr,
1075                                      struct switch_val *val)
1076 {
1077         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1078         struct rtl8366_smi *smi = &rtl->smi;
1079         u32 len = 0, data = 0;
1080
1081         if (val->port_vlan >= RTL8366_NUM_PORTS)
1082                 return -EINVAL;
1083
1084         memset(rtl->buf, '\0', sizeof(rtl->buf));
1085         rtl8366_smi_read_reg(smi, RTL8366S_PORT_LINK_STATUS_BASE +
1086                              (val->port_vlan / 2), &data);
1087
1088         if (val->port_vlan % 2)
1089                 data = data >> 8;
1090
1091         if (data & RTL8366S_PORT_STATUS_LINK_MASK) {
1092                 len = snprintf(rtl->buf, sizeof(rtl->buf),
1093                                 "port:%d link:up speed:%s %s-duplex %s%s%s",
1094                                 val->port_vlan,
1095                                 rtl8366s_speed_str(data &
1096                                           RTL8366S_PORT_STATUS_SPEED_MASK),
1097                                 (data & RTL8366S_PORT_STATUS_DUPLEX_MASK) ?
1098                                         "full" : "half",
1099                                 (data & RTL8366S_PORT_STATUS_TXPAUSE_MASK) ?
1100                                         "tx-pause ": "",
1101                                 (data & RTL8366S_PORT_STATUS_RXPAUSE_MASK) ?
1102                                         "rx-pause " : "",
1103                                 (data & RTL8366S_PORT_STATUS_AN_MASK) ?
1104                                         "nway ": "");
1105         } else {
1106                 len = snprintf(rtl->buf, sizeof(rtl->buf), "port:%d link: down",
1107                                 val->port_vlan);
1108         }
1109
1110         val->value.s = rtl->buf;
1111         val->len = len;
1112
1113         return 0;
1114 }
1115
1116 static int rtl8366s_sw_get_vlan_info(struct switch_dev *dev,
1117                                      const struct switch_attr *attr,
1118                                      struct switch_val *val)
1119 {
1120         int i;
1121         u32 len = 0;
1122         struct rtl8366s_vlan_mc vlanmc;
1123         struct rtl8366s_vlan_4k vlan4k;
1124         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1125         char *buf = rtl->buf;
1126
1127         if (val->port_vlan == 0 || val->port_vlan >= RTL8366_NUM_VLANS)
1128                 return -EINVAL;
1129
1130         memset(buf, '\0', sizeof(rtl->buf));
1131
1132         rtl8366s_get_vlan_mc(rtl, val->port_vlan, &vlanmc);
1133         rtl8366s_get_vlan_4k(rtl, vlanmc.vid, &vlan4k);
1134
1135         len += snprintf(buf + len, sizeof(rtl->buf) - len, "VLAN %d: Ports: ",
1136                         val->port_vlan);
1137
1138         for (i = 0; i < RTL8366_NUM_PORTS; ++i) {
1139                 int index = 0;
1140                 if (!rtl8366s_get_port_vlan_index(rtl, i, &index) &&
1141                     index == val->port_vlan)
1142                         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1143                                         "%d", i);
1144         }
1145         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
1146
1147         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1148                         "\t\t vid \t prio \t member \t untag \t fid\n");
1149         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\tMC:\t");
1150         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1151                         "%d \t %d \t 0x%04x \t 0x%04x \t %d\n",
1152                         vlanmc.vid, vlanmc.priority, vlanmc.member,
1153                         vlanmc.untag, vlanmc.fid);
1154         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\t4K:\t");
1155         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1156                         "%d \t  \t 0x%04x \t 0x%04x \t %d",
1157                         vlan4k.vid, vlan4k.member, vlan4k.untag, vlan4k.fid);
1158
1159         val->value.s = buf;
1160         val->len = len;
1161
1162         return 0;
1163 }
1164
1165 static int rtl8366s_sw_set_port_led(struct switch_dev *dev,
1166                                     const struct switch_attr *attr,
1167                                     struct switch_val *val)
1168 {
1169         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1170         struct rtl8366_smi *smi = &rtl->smi;
1171         u32 data = 0;
1172
1173         if (val->port_vlan >= RTL8366_NUM_PORTS ||
1174             (1 << val->port_vlan) == RTL8366_PORT_UNKNOWN)
1175                 return -EINVAL;
1176
1177         if (val->port_vlan == RTL8366_PORT_NUM_CPU) {
1178                 rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1179                 data = (data & (~(0xF << 4))) | (val->value.i << 4);
1180                 rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1181         } else {
1182                 rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1183                 data = (data & (~(0xF << (val->port_vlan * 4)))) |
1184                         (val->value.i << (val->port_vlan * 4));
1185                 rtl8366_smi_write_reg(smi, RTL8366_LED_CTRL_REG, data);
1186         }
1187
1188         return 0;
1189 }
1190
1191 static int rtl8366s_sw_get_port_led(struct switch_dev *dev,
1192                                     const struct switch_attr *attr,
1193                                     struct switch_val *val)
1194 {
1195         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1196         struct rtl8366_smi *smi = &rtl->smi;
1197         u32 data = 0;
1198
1199         if (val->port_vlan >= RTL8366_NUM_LEDGROUPS)
1200                 return -EINVAL;
1201
1202         rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1203         val->value.i = (data >> (val->port_vlan * 4)) & 0x000F;
1204
1205         return 0;
1206 }
1207
1208 static int rtl8366s_sw_reset_port_mibs(struct switch_dev *dev,
1209                                        const struct switch_attr *attr,
1210                                        struct switch_val *val)
1211 {
1212         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1213         struct rtl8366_smi *smi = &rtl->smi;
1214         u32 data = 0;
1215
1216         if (val->port_vlan >= RTL8366_NUM_PORTS)
1217                 return -EINVAL;
1218
1219         rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
1220         data |= (1 << (val->port_vlan + 3));
1221         rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
1222
1223         return 0;
1224 }
1225
1226 static int rtl8366s_sw_get_port_mib(struct switch_dev *dev,
1227                                     const struct switch_attr *attr,
1228                                     struct switch_val *val)
1229 {
1230         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1231         int i, len = 0;
1232         unsigned long long counter = 0;
1233         char *buf = rtl->buf;
1234
1235         if (val->port_vlan >= RTL8366_NUM_PORTS)
1236                 return -EINVAL;
1237
1238         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1239                         "Port %d MIB counters\n",
1240                         val->port_vlan);
1241
1242         for (i = 0; i < RTL8366S_MIB_COUNT; ++i) {
1243                 len += snprintf(buf + len, sizeof(rtl->buf) - len,
1244                                 "%d:%s\t", i, rtl8366s_mib_counters[i].name);
1245                 if (!rtl8366_get_mib_counter(rtl, i, val->port_vlan, &counter))
1246                         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1247                                         "[%llu]\n", counter);
1248                 else
1249                         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1250                                         "[error]\n");
1251         }
1252
1253         val->value.s = buf;
1254         val->len = len;
1255         return 0;
1256 }
1257
1258 static int rtl8366s_sw_get_vlan_ports(struct switch_dev *dev,
1259                                       struct switch_val *val)
1260 {
1261         struct rtl8366s_vlan_mc vlanmc;
1262         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1263         struct switch_port *port;
1264         int i;
1265
1266         if (val->port_vlan == 0 || val->port_vlan >= RTL8366_NUM_VLANS)
1267                 return -EINVAL;
1268
1269         rtl8366s_get_vlan_mc(rtl, val->port_vlan, &vlanmc);
1270
1271         port = &val->value.ports[0];
1272         val->len = 0;
1273         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
1274                 if (!(vlanmc.member & BIT(i)))
1275                         continue;
1276
1277                 port->id = i;
1278                 port->flags = (vlanmc.untag & BIT(i)) ?
1279                                         0 : BIT(SWITCH_PORT_FLAG_TAGGED);
1280                 val->len++;
1281                 port++;
1282         }
1283         return 0;
1284 }
1285
1286 static int rtl8366s_sw_set_vlan_ports(struct switch_dev *dev,
1287                                       struct switch_val *val)
1288 {
1289         struct rtl8366s_vlan_mc vlanmc;
1290         struct rtl8366s_vlan_4k vlan4k;
1291         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1292         struct switch_port *port;
1293         int i;
1294
1295         if (val->port_vlan == 0 || val->port_vlan >= RTL8366_NUM_VLANS)
1296                 return -EINVAL;
1297
1298         rtl8366s_get_vlan_mc(rtl, val->port_vlan, &vlanmc);
1299         rtl8366s_get_vlan_4k(rtl, vlanmc.vid, &vlan4k);
1300
1301         vlanmc.untag = 0;
1302         vlanmc.member = 0;
1303
1304         port = &val->value.ports[0];
1305         for (i = 0; i < val->len; i++, port++) {
1306                 vlanmc.member |= BIT(port->id);
1307
1308                 if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED)))
1309                         vlanmc.untag |= BIT(port->id);
1310         }
1311
1312         vlan4k.member = vlanmc.member;
1313         vlan4k.untag = vlanmc.untag;
1314
1315         rtl8366s_set_vlan_mc(rtl, val->port_vlan, &vlanmc);
1316         rtl8366s_set_vlan_4k(rtl, &vlan4k);
1317         return 0;
1318 }
1319
1320 static int rtl8366s_sw_get_port_pvid(struct switch_dev *dev, int port, int *val)
1321 {
1322         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1323         return rtl8366s_get_vlan_port_pvid(rtl, port, val);
1324 }
1325
1326 static int rtl8366s_sw_set_port_pvid(struct switch_dev *dev, int port, int val)
1327 {
1328         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1329         return rtl8366s_set_vlan_port_pvid(rtl, port, val);
1330 }
1331
1332 static int rtl8366s_sw_reset_switch(struct switch_dev *dev)
1333 {
1334         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1335         int err;
1336
1337         err = rtl8366s_reset_chip(rtl);
1338         if (err)
1339                 return err;
1340
1341         return rtl8366s_reset_vlan(rtl);
1342 }
1343
1344 static struct switch_attr rtl8366s_globals[] = {
1345         {
1346                 .type = SWITCH_TYPE_INT,
1347                 .name = "enable_vlan",
1348                 .description = "Enable VLAN mode",
1349                 .set = rtl8366s_sw_set_vlan_enable,
1350                 .get = rtl8366s_sw_get_vlan_enable,
1351                 .max = 1,
1352                 .ofs = 1
1353         }, {
1354                 .type = SWITCH_TYPE_INT,
1355                 .name = "enable_vlan4k",
1356                 .description = "Enable VLAN 4K mode",
1357                 .set = rtl8366s_sw_set_vlan_enable,
1358                 .get = rtl8366s_sw_get_vlan_enable,
1359                 .max = 1,
1360                 .ofs = 2
1361         }, {
1362                 .type = SWITCH_TYPE_INT,
1363                 .name = "reset_mibs",
1364                 .description = "Reset all MIB counters",
1365                 .set = rtl8366s_sw_reset_mibs,
1366                 .get = NULL,
1367                 .max = 1
1368         }, {
1369                 .type = SWITCH_TYPE_INT,
1370                 .name = "blinkrate",
1371                 .description = "Get/Set LED blinking rate (0 = 43ms, 1 = 84ms,"
1372                 " 2 = 120ms, 3 = 170ms, 4 = 340ms, 5 = 670ms)",
1373                 .set = rtl8366s_sw_set_blinkrate,
1374                 .get = rtl8366s_sw_get_blinkrate,
1375                 .max = 5
1376         },
1377 };
1378
1379 static struct switch_attr rtl8366s_port[] = {
1380         {
1381                 .type = SWITCH_TYPE_STRING,
1382                 .name = "link",
1383                 .description = "Get port link information",
1384                 .max = 1,
1385                 .set = NULL,
1386                 .get = rtl8366s_sw_get_port_link,
1387         }, {
1388                 .type = SWITCH_TYPE_INT,
1389                 .name = "reset_mib",
1390                 .description = "Reset single port MIB counters",
1391                 .max = 1,
1392                 .set = rtl8366s_sw_reset_port_mibs,
1393                 .get = NULL,
1394         }, {
1395                 .type = SWITCH_TYPE_STRING,
1396                 .name = "mib",
1397                 .description = "Get MIB counters for port",
1398                 .max = 33,
1399                 .set = NULL,
1400                 .get = rtl8366s_sw_get_port_mib,
1401         }, {
1402                 .type = SWITCH_TYPE_INT,
1403                 .name = "led",
1404                 .description = "Get/Set port group (0 - 3) led mode (0 - 15)",
1405                 .max = 15,
1406                 .set = rtl8366s_sw_set_port_led,
1407                 .get = rtl8366s_sw_get_port_led,
1408         },
1409 };
1410
1411 static struct switch_attr rtl8366s_vlan[] = {
1412         {
1413                 .type = SWITCH_TYPE_STRING,
1414                 .name = "info",
1415                 .description = "Get vlan information",
1416                 .max = 1,
1417                 .set = NULL,
1418                 .get = rtl8366s_sw_get_vlan_info,
1419         },
1420 };
1421
1422 /* template */
1423 static struct switch_dev rtl8366_switch_dev = {
1424         .name = "RTL8366S",
1425         .cpu_port = RTL8366_PORT_NUM_CPU,
1426         .ports = RTL8366_NUM_PORTS,
1427         .vlans = RTL8366_NUM_VLANS,
1428         .attr_global = {
1429                 .attr = rtl8366s_globals,
1430                 .n_attr = ARRAY_SIZE(rtl8366s_globals),
1431         },
1432         .attr_port = {
1433                 .attr = rtl8366s_port,
1434                 .n_attr = ARRAY_SIZE(rtl8366s_port),
1435         },
1436         .attr_vlan = {
1437                 .attr = rtl8366s_vlan,
1438                 .n_attr = ARRAY_SIZE(rtl8366s_vlan),
1439         },
1440
1441         .get_vlan_ports = rtl8366s_sw_get_vlan_ports,
1442         .set_vlan_ports = rtl8366s_sw_set_vlan_ports,
1443         .get_port_pvid = rtl8366s_sw_get_port_pvid,
1444         .set_port_pvid = rtl8366s_sw_set_port_pvid,
1445         .reset_switch = rtl8366s_sw_reset_switch,
1446 };
1447
1448 static int rtl8366s_switch_init(struct rtl8366s *rtl)
1449 {
1450         struct switch_dev *dev = &rtl->dev;
1451         int err;
1452
1453         memcpy(dev, &rtl8366_switch_dev, sizeof(struct switch_dev));
1454         dev->priv = rtl;
1455         dev->devname = dev_name(rtl->parent);
1456
1457         err = register_switch(dev, NULL);
1458         if (err)
1459                 dev_err(rtl->parent, "switch registration failed\n");
1460
1461         return err;
1462 }
1463
1464 static void rtl8366s_switch_cleanup(struct rtl8366s *rtl)
1465 {
1466         unregister_switch(&rtl->dev);
1467 }
1468
1469 static int rtl8366s_mii_read(struct mii_bus *bus, int addr, int reg)
1470 {
1471         struct rtl8366_smi *smi = bus->priv;
1472         u32 val = 0;
1473         int err;
1474
1475         err = rtl8366s_read_phy_reg(smi, addr, 0, reg, &val);
1476         if (err)
1477                 return 0xffff;
1478
1479         return val;
1480 }
1481
1482 static int rtl8366s_mii_write(struct mii_bus *bus, int addr, int reg, u16 val)
1483 {
1484         struct rtl8366_smi *smi = bus->priv;
1485         u32 t;
1486         int err;
1487
1488         err = rtl8366s_write_phy_reg(smi, addr, 0, reg, val);
1489         /* flush write */
1490         (void) rtl8366s_read_phy_reg(smi, addr, 0, reg, &t);
1491
1492         return err;
1493 }
1494
1495 static int rtl8366s_mii_bus_match(struct mii_bus *bus)
1496 {
1497         return (bus->read == rtl8366s_mii_read &&
1498                 bus->write == rtl8366s_mii_write);
1499 }
1500
1501 static int rtl8366s_setup(struct rtl8366s *rtl)
1502 {
1503         int ret;
1504
1505         ret = rtl8366s_reset_chip(rtl);
1506         if (ret)
1507                 return ret;
1508
1509         rtl8366s_debugfs_init(rtl);
1510         return 0;
1511 }
1512
1513 static int rtl8366s_detect(struct rtl8366_smi *smi)
1514 {
1515         u32 chip_id = 0;
1516         u32 chip_ver = 0;
1517         int ret;
1518
1519         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_ID_REG, &chip_id);
1520         if (ret) {
1521                 dev_err(smi->parent, "unable to read chip id\n");
1522                 return ret;
1523         }
1524
1525         switch (chip_id) {
1526         case RTL8366S_CHIP_ID_8366:
1527                 break;
1528         default:
1529                 dev_err(smi->parent, "unknown chip id (%04x)\n", chip_id);
1530                 return -ENODEV;
1531         }
1532
1533         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_VERSION_CTRL_REG,
1534                                    &chip_ver);
1535         if (ret) {
1536                 dev_err(smi->parent, "unable to read chip version\n");
1537                 return ret;
1538         }
1539
1540         dev_info(smi->parent, "RTL%04x ver. %u chip found\n",
1541                  chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK);
1542
1543         return 0;
1544 }
1545
1546 static struct rtl8366_smi_ops rtl8366s_smi_ops = {
1547         .detect         = rtl8366s_detect,
1548         .mii_read       = rtl8366s_mii_read,
1549         .mii_write      = rtl8366s_mii_write,
1550 };
1551
1552 static int __init rtl8366s_probe(struct platform_device *pdev)
1553 {
1554         static int rtl8366_smi_version_printed;
1555         struct rtl8366s_platform_data *pdata;
1556         struct rtl8366s *rtl;
1557         struct rtl8366_smi *smi;
1558         int err;
1559
1560         if (!rtl8366_smi_version_printed++)
1561                 printk(KERN_NOTICE RTL8366S_DRIVER_DESC
1562                        " version " RTL8366S_DRIVER_VER"\n");
1563
1564         pdata = pdev->dev.platform_data;
1565         if (!pdata) {
1566                 dev_err(&pdev->dev, "no platform data specified\n");
1567                 err = -EINVAL;
1568                 goto err_out;
1569         }
1570
1571         rtl = kzalloc(sizeof(*rtl), GFP_KERNEL);
1572         if (!rtl) {
1573                 dev_err(&pdev->dev, "no memory for private data\n");
1574                 err = -ENOMEM;
1575                 goto err_out;
1576         }
1577
1578         rtl->parent = &pdev->dev;
1579
1580         smi = &rtl->smi;
1581         smi->parent = &pdev->dev;
1582         smi->gpio_sda = pdata->gpio_sda;
1583         smi->gpio_sck = pdata->gpio_sck;
1584         smi->ops = &rtl8366s_smi_ops;
1585
1586         err = rtl8366_smi_init(smi);
1587         if (err)
1588                 goto err_free_rtl;
1589
1590         platform_set_drvdata(pdev, rtl);
1591
1592         err = rtl8366s_setup(rtl);
1593         if (err)
1594                 goto err_clear_drvdata;
1595
1596         err = rtl8366s_switch_init(rtl);
1597         if (err)
1598                 goto err_clear_drvdata;
1599
1600         return 0;
1601
1602  err_clear_drvdata:
1603         platform_set_drvdata(pdev, NULL);
1604         rtl8366_smi_cleanup(smi);
1605  err_free_rtl:
1606         kfree(rtl);
1607  err_out:
1608         return err;
1609 }
1610
1611 static int rtl8366s_phy_config_init(struct phy_device *phydev)
1612 {
1613         if (!rtl8366s_mii_bus_match(phydev->bus))
1614                 return -EINVAL;
1615
1616         return 0;
1617 }
1618
1619 static int rtl8366s_phy_config_aneg(struct phy_device *phydev)
1620 {
1621         return 0;
1622 }
1623
1624 static struct phy_driver rtl8366s_phy_driver = {
1625         .phy_id         = 0x001cc960,
1626         .name           = "Realtek RTL8366S",
1627         .phy_id_mask    = 0x1ffffff0,
1628         .features       = PHY_GBIT_FEATURES,
1629         .config_aneg    = rtl8366s_phy_config_aneg,
1630         .config_init    = rtl8366s_phy_config_init,
1631         .read_status    = genphy_read_status,
1632         .driver         = {
1633                 .owner = THIS_MODULE,
1634         },
1635 };
1636
1637 static int __devexit rtl8366s_remove(struct platform_device *pdev)
1638 {
1639         struct rtl8366s *rtl = platform_get_drvdata(pdev);
1640
1641         if (rtl) {
1642                 rtl8366s_switch_cleanup(rtl);
1643                 rtl8366s_debugfs_remove(rtl);
1644                 platform_set_drvdata(pdev, NULL);
1645                 rtl8366_smi_cleanup(&rtl->smi);
1646                 kfree(rtl);
1647         }
1648
1649         return 0;
1650 }
1651
1652 static struct platform_driver rtl8366s_driver = {
1653         .driver = {
1654                 .name           = RTL8366S_DRIVER_NAME,
1655                 .owner          = THIS_MODULE,
1656         },
1657         .probe          = rtl8366s_probe,
1658         .remove         = __devexit_p(rtl8366s_remove),
1659 };
1660
1661 static int __init rtl8366s_module_init(void)
1662 {
1663         int ret;
1664         ret = platform_driver_register(&rtl8366s_driver);
1665         if (ret)
1666                 return ret;
1667
1668         ret = phy_driver_register(&rtl8366s_phy_driver);
1669         if (ret)
1670                 goto err_platform_unregister;
1671
1672         return 0;
1673
1674  err_platform_unregister:
1675         platform_driver_unregister(&rtl8366s_driver);
1676         return ret;
1677 }
1678 module_init(rtl8366s_module_init);
1679
1680 static void __exit rtl8366s_module_exit(void)
1681 {
1682         phy_driver_unregister(&rtl8366s_phy_driver);
1683         platform_driver_unregister(&rtl8366s_driver);
1684 }
1685 module_exit(rtl8366s_module_exit);
1686
1687 MODULE_DESCRIPTION(RTL8366S_DRIVER_DESC);
1688 MODULE_VERSION(RTL8366S_DRIVER_VER);
1689 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
1690 MODULE_AUTHOR("Antti Seppälä <a.seppala@gmail.com>");
1691 MODULE_LICENSE("GPL v2");
1692 MODULE_ALIAS("platform:" RTL8366S_DRIVER_NAME);