target/linux/generic-2.6/files/drivers/net/phy/rtl8366s.c

   1 /*
   2  * Platform driver for the Realtek RTL8366S ethernet switch
   3  *
   4  * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published
   9  * by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/delay.h>
  17 #include <linux/skbuff.h>
  18 #include <linux/switch.h>
  19 #include <linux/rtl8366s.h>
  20
  21 #include "rtl8366_smi.h"
  22
  23 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
  24 #include <linux/debugfs.h>
  25 #endif
  26
  27 #define RTL8366S_DRIVER_DESC    "Realtek RTL8366S ethernet switch driver"
  28 #define RTL8366S_DRIVER_VER     "0.2.2"
  29
  30 #define RTL8366S_PHY_NO_MAX                 4
  31 #define RTL8366S_PHY_PAGE_MAX               7
  32 #define RTL8366S_PHY_ADDR_MAX               31
  33
  34 #define RTL8366_CHIP_GLOBAL_CTRL_REG        0x0000
  35 #define RTL8366_CHIP_CTRL_VLAN              (1 << 13)
  36
  37 #define RTL8366_RESET_CTRL_REG              0x0100
  38 #define RTL8366_CHIP_CTRL_RESET_HW          1
  39 #define RTL8366_CHIP_CTRL_RESET_SW          (1 << 1)
  40
  41 #define RTL8366S_CHIP_VERSION_CTRL_REG      0x0104
  42 #define RTL8366S_CHIP_VERSION_MASK          0xf
  43 #define RTL8366S_CHIP_ID_REG                0x0105
  44 #define RTL8366S_CHIP_ID_8366               0x8366
  45
  46 /* PHY registers control */
  47 #define RTL8366S_PHY_ACCESS_CTRL_REG        0x8028
  48 #define RTL8366S_PHY_ACCESS_DATA_REG        0x8029
  49
  50 #define RTL8366S_PHY_CTRL_READ              1
  51 #define RTL8366S_PHY_CTRL_WRITE             0
  52
  53 #define RTL8366S_PHY_REG_MASK               0x1f
  54 #define RTL8366S_PHY_PAGE_OFFSET            5
  55 #define RTL8366S_PHY_PAGE_MASK              (0x7 << 5)
  56 #define RTL8366S_PHY_NO_OFFSET              9
  57 #define RTL8366S_PHY_NO_MASK                (0x1f << 9)
  58
  59 /* LED control registers */
  60 #define RTL8366_LED_BLINKRATE_REG           0x0420
  61 #define RTL8366_LED_BLINKRATE_BIT           0
  62 #define RTL8366_LED_BLINKRATE_MASK          0x0007
  63
  64 #define RTL8366_LED_CTRL_REG                0x0421
  65 #define RTL8366_LED_0_1_CTRL_REG            0x0422
  66 #define RTL8366_LED_2_3_CTRL_REG            0x0423
  67
  68 #define RTL8366S_MIB_COUNT                  33
  69 #define RTL8366S_GLOBAL_MIB_COUNT           1
  70 #define RTL8366S_MIB_COUNTER_PORT_OFFSET    0x0040
  71 #define RTL8366S_MIB_COUNTER_BASE           0x1000
  72 #define RTL8366S_MIB_CTRL_REG               0x11F0
  73 #define RTL8366S_MIB_CTRL_USER_MASK         0x01FF
  74 #define RTL8366S_MIB_CTRL_BUSY_MASK         0x0001
  75 #define RTL8366S_MIB_CTRL_RESET_MASK        0x0002
  76
  77 #define RTL8366S_MIB_CTRL_GLOBAL_RESET_MASK 0x0004
  78 #define RTL8366S_MIB_CTRL_PORT_RESET_BIT    0x0003
  79 #define RTL8366S_MIB_CTRL_PORT_RESET_MASK   0x01FC
  80
  81
  82 #define RTL8366S_PORT_VLAN_CTRL_BASE        0x0058
  83 #define RTL8366S_PORT_VLAN_CTRL_REG(_p)  \
  84                 (RTL8366S_PORT_VLAN_CTRL_BASE + (_p) / 4)
  85 #define RTL8366S_PORT_VLAN_CTRL_MASK        0xf
  86 #define RTL8366S_PORT_VLAN_CTRL_SHIFT(_p)   (4 * ((_p) % 4))
  87
  88
  89 #define RTL8366S_VLAN_TABLE_READ_BASE       0x018B
  90 #define RTL8366S_VLAN_TABLE_WRITE_BASE      0x0185
  91
  92 #define RTL8366S_VLAN_TB_CTRL_REG           0x010F
  93
  94 #define RTL8366S_TABLE_ACCESS_CTRL_REG      0x0180
  95 #define RTL8366S_TABLE_VLAN_READ_CTRL       0x0E01
  96 #define RTL8366S_TABLE_VLAN_WRITE_CTRL      0x0F01
  97
  98 #define RTL8366S_VLAN_MEMCONF_BASE          0x0016
  99
 100
 101 #define RTL8366S_PORT_LINK_STATUS_BASE      0x0060
 102 #define RTL8366S_PORT_STATUS_SPEED_MASK     0x0003
 103 #define RTL8366S_PORT_STATUS_DUPLEX_MASK    0x0004
 104 #define RTL8366S_PORT_STATUS_LINK_MASK      0x0010
 105 #define RTL8366S_PORT_STATUS_TXPAUSE_MASK   0x0020
 106 #define RTL8366S_PORT_STATUS_RXPAUSE_MASK   0x0040
 107 #define RTL8366S_PORT_STATUS_AN_MASK        0x0080
 108
 109
 110 #define RTL8366_PORT_NUM_CPU                5
 111 #define RTL8366_NUM_PORTS                   6
 112 #define RTL8366_NUM_VLANS                   16
 113 #define RTL8366_NUM_LEDGROUPS               4
 114 #define RTL8366_NUM_VIDS                    4096
 115 #define RTL8366S_PRIORITYMAX                7
 116 #define RTL8366S_FIDMAX                     7
 117
 118
 119 #define RTL8366_PORT_1                      (1 << 0) /* In userspace port 0 */
 120 #define RTL8366_PORT_2                      (1 << 1) /* In userspace port 1 */
 121 #define RTL8366_PORT_3                      (1 << 2) /* In userspace port 2 */
 122 #define RTL8366_PORT_4                      (1 << 3) /* In userspace port 3 */
 123
 124 #define RTL8366_PORT_UNKNOWN                (1 << 4) /* No known connection */
 125 #define RTL8366_PORT_CPU                    (1 << 5) /* CPU port */
 126
 127 #define RTL8366_PORT_ALL                    (RTL8366_PORT_1 |       \
 128                                              RTL8366_PORT_2 |       \
 129                                              RTL8366_PORT_3 |       \
 130                                              RTL8366_PORT_4 |       \
 131                                              RTL8366_PORT_UNKNOWN | \
 132                                              RTL8366_PORT_CPU)
 133
 134 #define RTL8366_PORT_ALL_BUT_CPU            (RTL8366_PORT_1 |       \
 135                                              RTL8366_PORT_2 |       \
 136                                              RTL8366_PORT_3 |       \
 137                                              RTL8366_PORT_4 |       \
 138                                              RTL8366_PORT_UNKNOWN)
 139
 140 #define RTL8366_PORT_ALL_EXTERNAL           (RTL8366_PORT_1 |       \
 141                                              RTL8366_PORT_2 |       \
 142                                              RTL8366_PORT_3 |       \
 143                                              RTL8366_PORT_4)
 144
 145 #define RTL8366_PORT_ALL_INTERNAL           (RTL8366_PORT_UNKNOWN | \
 146                                              RTL8366_PORT_CPU)
 147
 148 struct rtl8366s {
 149         struct device           *parent;
 150         struct rtl8366_smi      smi;
 151         struct switch_dev       dev;
 152         char                    buf[4096];
 153 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 154         struct dentry           *debugfs_root;
 155 #endif
 156 };
 157
 158 struct rtl8366s_vlan_mc {
 159         u16     reserved2:1;
 160         u16     priority:3;
 161         u16     vid:12;
 162
 163         u16     reserved1:1;
 164         u16     fid:3;
 165         u16     untag:6;
 166         u16     member:6;
 167 };
 168
 169 struct rtl8366s_vlan_4k {
 170         u16     reserved1:4;
 171         u16     vid:12;
 172
 173         u16     reserved2:1;
 174         u16     fid:3;
 175         u16     untag:6;
 176         u16     member:6;
 177 };
 178
 179 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 180 u16 g_dbg_reg;
 181 #endif
 182
 183 struct mib_counter {
 184         unsigned        offset;
 185         unsigned        length;
 186         const char      *name;
 187 };
 188
 189 static struct mib_counter rtl8366s_mib_counters[RTL8366S_MIB_COUNT] = {
 190         {  0, 4, "IfInOctets                        " },
 191         {  4, 4, "EtherStatsOctets                  " },
 192         {  8, 2, "EtherStatsUnderSizePkts           " },
 193         { 10, 2, "EtherFregament                    " },
 194         { 12, 2, "EtherStatsPkts64Octets            " },
 195         { 14, 2, "EtherStatsPkts65to127Octets       " },
 196         { 16, 2, "EtherStatsPkts128to255Octets      " },
 197         { 18, 2, "EtherStatsPkts256to511Octets      " },
 198         { 20, 2, "EtherStatsPkts512to1023Octets     " },
 199         { 22, 2, "EtherStatsPkts1024to1518Octets    " },
 200         { 24, 2, "EtherOversizeStats                " },
 201         { 26, 2, "EtherStatsJabbers                 " },
 202         { 28, 2, "IfInUcastPkts                     " },
 203         { 30, 2, "EtherStatsMulticastPkts           " },
 204         { 32, 2, "EtherStatsBroadcastPkts           " },
 205         { 34, 2, "EtherStatsDropEvents              " },
 206         { 36, 2, "Dot3StatsFCSErrors                " },
 207         { 38, 2, "Dot3StatsSymbolErrors             " },
 208         { 40, 2, "Dot3InPauseFrames                 " },
 209         { 42, 2, "Dot3ControlInUnknownOpcodes       " },
 210         { 44, 4, "IfOutOctets                       " },
 211         { 48, 2, "Dot3StatsSingleCollisionFrames    " },
 212         { 50, 2, "Dot3StatMultipleCollisionFrames   " },
 213         { 52, 2, "Dot3sDeferredTransmissions        " },
 214         { 54, 2, "Dot3StatsLateCollisions           " },
 215         { 56, 2, "EtherStatsCollisions              " },
 216         { 58, 2, "Dot3StatsExcessiveCollisions      " },
 217         { 60, 2, "Dot3OutPauseFrames                " },
 218         { 62, 2, "Dot1dBasePortDelayExceededDiscards" },
 219         { 64, 2, "Dot1dTpPortInDiscards             " },
 220         { 66, 2, "IfOutUcastPkts                    " },
 221         { 68, 2, "IfOutMulticastPkts                " },
 222         { 70, 2, "IfOutBroadcastPkts                " },
 223 };
 224
 225 static inline struct rtl8366s *smi_to_rtl8366s(struct rtl8366_smi *smi)
 226 {
 227         return container_of(smi, struct rtl8366s, smi);
 228 }
 229
 230 static inline struct rtl8366s *sw_to_rtl8366s(struct switch_dev *sw)
 231 {
 232         return container_of(sw, struct rtl8366s, dev);
 233 }
 234
 235 static int rtl8366s_reset_chip(struct rtl8366s *rtl)
 236 {
 237         struct rtl8366_smi *smi = &rtl->smi;
 238         int timeout = 10;
 239         u32 data;
 240
 241         rtl8366_smi_write_reg(smi, RTL8366_RESET_CTRL_REG,
 242                               RTL8366_CHIP_CTRL_RESET_HW);
 243         do {
 244                 msleep(1);
 245                 if (rtl8366_smi_read_reg(smi, RTL8366_RESET_CTRL_REG, &data))
 246                         return -EIO;
 247
 248                 if (!(data & RTL8366_CHIP_CTRL_RESET_HW))
 249                         break;
 250         } while (--timeout);
 251
 252         if (!timeout) {
 253                 printk("Timeout waiting for the switch to reset\n");
 254                 return -EIO;
 255         }
 256
 257         return 0;
 258 }
 259
 260 static int rtl8366s_read_phy_reg(struct rtl8366_smi *smi,
 261                                  u32 phy_no, u32 page, u32 addr, u32 *data)
 262 {
 263         u32 reg;
 264         int ret;
 265
 266         if (phy_no > RTL8366S_PHY_NO_MAX)
 267                 return -EINVAL;
 268
 269         if (page > RTL8366S_PHY_PAGE_MAX)
 270                 return -EINVAL;
 271
 272         if (addr > RTL8366S_PHY_ADDR_MAX)
 273                 return -EINVAL;
 274
 275         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 276                                     RTL8366S_PHY_CTRL_READ);
 277         if (ret)
 278                 return ret;
 279
 280         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 281               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 282               (addr & RTL8366S_PHY_REG_MASK);
 283
 284         ret = rtl8366_smi_write_reg(smi, reg, 0);
 285         if (ret)
 286                 return ret;
 287
 288         ret = rtl8366_smi_read_reg(smi, RTL8366S_PHY_ACCESS_DATA_REG, data);
 289         if (ret)
 290                 return ret;
 291
 292         return 0;
 293 }
 294
 295 static int rtl8366s_write_phy_reg(struct rtl8366_smi *smi,
 296                                   u32 phy_no, u32 page, u32 addr, u32 data)
 297 {
 298         u32 reg;
 299         int ret;
 300
 301         if (phy_no > RTL8366S_PHY_NO_MAX)
 302                 return -EINVAL;
 303
 304         if (page > RTL8366S_PHY_PAGE_MAX)
 305                 return -EINVAL;
 306
 307         if (addr > RTL8366S_PHY_ADDR_MAX)
 308                 return -EINVAL;
 309
 310         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 311                                     RTL8366S_PHY_CTRL_WRITE);
 312         if (ret)
 313                 return ret;
 314
 315         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 316               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 317               (addr & RTL8366S_PHY_REG_MASK);
 318
 319         ret = rtl8366_smi_write_reg(smi, reg, data);
 320         if (ret)
 321                 return ret;
 322
 323         return 0;
 324 }
 325
 326 static int rtl8366_get_mib_counter(struct rtl8366s *rtl, int counter,
 327                                    int port, unsigned long long *val)
 328 {
 329         struct rtl8366_smi *smi = &rtl->smi;
 330         int i;
 331         int err;
 332         u32 addr, data;
 333         u64 mibvalue;
 334
 335         if (port > RTL8366_NUM_PORTS || counter >= RTL8366S_MIB_COUNT)
 336                 return -EINVAL;
 337
 338         addr = RTL8366S_MIB_COUNTER_BASE +
 339                RTL8366S_MIB_COUNTER_PORT_OFFSET * (port) +
 340                rtl8366s_mib_counters[counter].offset;
 341
 342         /*
 343          * Writing access counter address first
 344          * then ASIC will prepare 64bits counter wait for being retrived
 345          */
 346         data = 0; /* writing data will be discard by ASIC */
 347         err = rtl8366_smi_write_reg(smi, addr, data);
 348         if (err)
 349                 return err;
 350
 351         /* read MIB control register */
 352         err =  rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
 353         if (err)
 354                 return err;
 355
 356         if (data & RTL8366S_MIB_CTRL_BUSY_MASK)
 357                 return -EBUSY;
 358
 359         if (data & RTL8366S_MIB_CTRL_RESET_MASK)
 360                 return -EIO;
 361
 362         mibvalue = 0;
 363         for (i = rtl8366s_mib_counters[counter].length; i > 0; i--) {
 364                 err = rtl8366_smi_read_reg(smi, addr + (i - 1), &data);
 365                 if (err)
 366                         return err;
 367
 368                 mibvalue = (mibvalue << 16) | (data & 0xFFFF);
 369         }
 370
 371         *val = mibvalue;
 372         return 0;
 373 }
 374
 375 static int rtl8366s_get_vlan_4k(struct rtl8366s *rtl, u32 vid,
 376                                 struct rtl8366s_vlan_4k *vlan4k)
 377 {
 378         struct rtl8366_smi *smi = &rtl->smi;
 379         int err;
 380         u32 data;
 381         u16 *tableaddr;
 382
 383         memset(vlan4k, '\0', sizeof(struct rtl8366s_vlan_4k));
 384         vlan4k->vid = vid;
 385
 386         if (vid >= RTL8366_NUM_VIDS)
 387                 return -EINVAL;
 388
 389         tableaddr = (u16 *)vlan4k;
 390
 391         /* write VID */
 392         data = *tableaddr;
 393         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 394         if (err)
 395                 return err;
 396
 397         /* write table access control word */
 398         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 399                                     RTL8366S_TABLE_VLAN_READ_CTRL);
 400         if (err)
 401                 return err;
 402
 403         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE, &data);
 404         if (err)
 405                 return err;
 406
 407         *tableaddr = data;
 408         tableaddr++;
 409
 410         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE + 1,
 411                                    &data);
 412         if (err)
 413                 return err;
 414
 415         *tableaddr = data;
 416         vlan4k->vid = vid;
 417
 418         return 0;
 419 }
 420
 421 static int rtl8366s_set_vlan_4k(struct rtl8366s *rtl,
 422                                 const struct rtl8366s_vlan_4k *vlan4k)
 423 {
 424         struct rtl8366_smi *smi = &rtl->smi;
 425         int err;
 426         u32 data;
 427         u16 *tableaddr;
 428
 429         if (vlan4k->vid >= RTL8366_NUM_VIDS ||
 430             vlan4k->member > RTL8366_PORT_ALL ||
 431             vlan4k->untag > RTL8366_PORT_ALL ||
 432             vlan4k->fid > RTL8366S_FIDMAX)
 433                 return -EINVAL;
 434
 435         tableaddr = (u16 *)vlan4k;
 436
 437         data = *tableaddr;
 438
 439         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 440         if (err)
 441                 return err;
 442
 443         tableaddr++;
 444
 445         data = *tableaddr;
 446
 447         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE + 1,
 448                                     data);
 449         if (err)
 450                 return err;
 451
 452         /* write table access control word */
 453         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 454                                     RTL8366S_TABLE_VLAN_WRITE_CTRL);
 455
 456         return err;
 457 }
 458
 459 static int rtl8366s_get_vlan_mc(struct rtl8366s *rtl, u32 index,
 460                                 struct rtl8366_vlan_mc *vlanmc)
 461 {
 462         struct rtl8366_smi *smi = &rtl->smi;
 463         struct rtl8366s_vlan_mc vlanmc_priv;
 464         int err;
 465         u32 addr;
 466         u32 data;
 467         u16 *tableaddr;
 468
 469         memset(vlanmc, '\0', sizeof(struct rtl8366_vlan_mc));
 470
 471         if (index >= RTL8366_NUM_VLANS)
 472                 return -EINVAL;
 473
 474         tableaddr = (u16 *)&vlanmc_priv;
 475
 476         addr = RTL8366S_VLAN_MEMCONF_BASE + (index << 1);
 477         err = rtl8366_smi_read_reg(smi, addr, &data);
 478         if (err)
 479                 return err;
 480
 481         *tableaddr = data;
 482         tableaddr++;
 483
 484         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index << 1);
 485         err = rtl8366_smi_read_reg(smi, addr, &data);
 486         if (err)
 487                 return err;
 488
 489         *tableaddr = data;
 490
 491         vlanmc->vid = vlanmc_priv.vid;
 492         vlanmc->priority = vlanmc_priv.priority;
 493         vlanmc->untag = vlanmc_priv.untag;
 494         vlanmc->member = vlanmc_priv.member;
 495         vlanmc->fid = vlanmc_priv.fid;
 496
 497         return 0;
 498 }
 499
 500 static int rtl8366s_set_vlan_mc(struct rtl8366s *rtl, u32 index,
 501                                 const struct rtl8366_vlan_mc *vlanmc)
 502 {
 503         struct rtl8366_smi *smi = &rtl->smi;
 504         struct rtl8366s_vlan_mc vlanmc_priv;
 505         int err;
 506         u32 addr;
 507         u32 data;
 508         u16 *tableaddr;
 509
 510         if (index >= RTL8366_NUM_VLANS ||
 511             vlanmc->vid >= RTL8366_NUM_VIDS ||
 512             vlanmc->priority > RTL8366S_PRIORITYMAX ||
 513             vlanmc->member > RTL8366_PORT_ALL ||
 514             vlanmc->untag > RTL8366_PORT_ALL ||
 515             vlanmc->fid > RTL8366S_FIDMAX)
 516                 return -EINVAL;
 517
 518         vlanmc_priv.vid = vlanmc->vid;
 519         vlanmc_priv.priority = vlanmc->priority;
 520         vlanmc_priv.untag = vlanmc->untag;
 521         vlanmc_priv.member = vlanmc->member;
 522         vlanmc_priv.fid = vlanmc->fid;
 523
 524         addr = RTL8366S_VLAN_MEMCONF_BASE + (index << 1);
 525
 526         tableaddr = (u16 *)&vlanmc_priv;
 527         data = *tableaddr;
 528
 529         err = rtl8366_smi_write_reg(smi, addr, data);
 530         if (err)
 531                 return err;
 532
 533         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index << 1);
 534
 535         tableaddr++;
 536         data = *tableaddr;
 537
 538         err = rtl8366_smi_write_reg(smi, addr, data);
 539         if (err)
 540                 return err;
 541
 542         return 0;
 543 }
 544
 545 static int rtl8366s_get_port_vlan_index(struct rtl8366s *rtl, int port,
 546                                        int *val)
 547 {
 548         struct rtl8366_smi *smi = &rtl->smi;
 549         u32 data;
 550         int err;
 551
 552         if (port >= RTL8366_NUM_PORTS)
 553                 return -EINVAL;
 554
 555         err = rtl8366_smi_read_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 556                                    &data);
 557         if (err)
 558                 return err;
 559
 560         *val = (data >> RTL8366S_PORT_VLAN_CTRL_SHIFT(port)) &
 561                RTL8366S_PORT_VLAN_CTRL_MASK;
 562
 563         return 0;
 564
 565 }
 566
 567 static int rtl8366s_get_vlan_port_pvid(struct rtl8366s *rtl, int port,
 568                                        int *val)
 569 {
 570         struct rtl8366_vlan_mc vlanmc;
 571         int err;
 572         int index;
 573
 574         err = rtl8366s_get_port_vlan_index(rtl, port, &index);
 575         if (err)
 576                 return err;
 577
 578         err = rtl8366s_get_vlan_mc(rtl, index, &vlanmc);
 579         if (err)
 580                 return err;
 581
 582         *val = vlanmc.vid;
 583         return 0;
 584 }
 585
 586 static int rtl8366s_set_port_vlan_index(struct rtl8366s *rtl, int port,
 587                                         int index)
 588 {
 589         struct rtl8366_smi *smi = &rtl->smi;
 590         u32 data;
 591         int err;
 592
 593         if (port >= RTL8366_NUM_PORTS || index >= RTL8366_NUM_VLANS)
 594                 return -EINVAL;
 595
 596         err = rtl8366_smi_read_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 597                                    &data);
 598         if (err)
 599                 return err;
 600
 601         data &= ~(RTL8366S_PORT_VLAN_CTRL_MASK <<
 602                   RTL8366S_PORT_VLAN_CTRL_SHIFT(port));
 603         data |= (index & RTL8366S_PORT_VLAN_CTRL_MASK) <<
 604                  RTL8366S_PORT_VLAN_CTRL_SHIFT(port);
 605
 606         err = rtl8366_smi_write_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 607                                     data);
 608         return err;
 609 }
 610
 611 static int rtl8366s_set_vlan_port_pvid(struct rtl8366s *rtl, int port, int val)
 612 {
 613         int i;
 614         struct rtl8366_vlan_mc vlanmc;
 615         struct rtl8366s_vlan_4k vlan4k;
 616
 617         if (port >= RTL8366_NUM_PORTS || val >= RTL8366_NUM_VIDS)
 618                 return -EINVAL;
 619
 620         /* Updating the 4K entry; lookup it and change the port member set */
 621         rtl8366s_get_vlan_4k(rtl, val, &vlan4k);
 622         vlan4k.member |= ((1 << port) | RTL8366_PORT_CPU);
 623         vlan4k.untag = RTL8366_PORT_ALL_BUT_CPU;
 624         rtl8366s_set_vlan_4k(rtl, &vlan4k);
 625
 626         /*
 627          * For the 16 entries more work needs to be done. First see if such
 628          * VID is already there and change it
 629          */
 630         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 631                 rtl8366s_get_vlan_mc(rtl, i, &vlanmc);
 632
 633                 /* Try to find an existing vid and update port member set */
 634                 if (val == vlanmc.vid) {
 635                         vlanmc.member |= ((1 << port) | RTL8366_PORT_CPU);
 636                         rtl8366s_set_vlan_mc(rtl, i, &vlanmc);
 637
 638                         /* Now update PVID register settings */
 639                         rtl8366s_set_port_vlan_index(rtl, port, i);
 640
 641                         return 0;
 642                 }
 643         }
 644
 645         /*
 646          * PVID could not be found from vlan table. Replace unused (one that
 647          * has no member ports) with new one
 648          */
 649         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 650                 rtl8366s_get_vlan_mc(rtl, i, &vlanmc);
 651
 652                 /*
 653                  * See if this vlan member configuration is unused. It is
 654                  * unused if member set contains no ports or CPU port only
 655                  */
 656                 if (!vlanmc.member || vlanmc.member == RTL8366_PORT_CPU) {
 657                         vlanmc.vid = val;
 658                         vlanmc.priority = 0;
 659                         vlanmc.untag = RTL8366_PORT_ALL_BUT_CPU;
 660                         vlanmc.member = ((1 << port) | RTL8366_PORT_CPU);
 661                         vlanmc.fid = 0;
 662
 663                         rtl8366s_set_vlan_mc(rtl, i, &vlanmc);
 664
 665                         /* Now update PVID register settings */
 666                         rtl8366s_set_port_vlan_index(rtl, port, i);
 667
 668                         return 0;
 669                 }
 670         }
 671
 672         dev_err(rtl->parent,
 673                 "All 16 vlan member configurations are in use\n");
 674
 675         return -EINVAL;
 676 }
 677
 678
 679 static int rtl8366s_vlan_set_vlan(struct rtl8366s *rtl, int enable)
 680 {
 681         struct rtl8366_smi *smi = &rtl->smi;
 682         u32 data = 0;
 683
 684         rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
 685
 686         if (enable)
 687                 data |= RTL8366_CHIP_CTRL_VLAN;
 688         else
 689                 data &= ~RTL8366_CHIP_CTRL_VLAN;
 690
 691         return rtl8366_smi_write_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, data);
 692 }
 693
 694 static int rtl8366s_vlan_set_4ktable(struct rtl8366s *rtl, int enable)
 695 {
 696         struct rtl8366_smi *smi = &rtl->smi;
 697         u32 data = 0;
 698
 699         rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, &data);
 700
 701         if (enable)
 702                 data |= 1;
 703         else
 704                 data &= ~1;
 705
 706         return rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, data);
 707 }
 708
 709 static int rtl8366s_reset_vlan(struct rtl8366s *rtl)
 710 {
 711         struct rtl8366s_vlan_4k vlan4k;
 712         struct rtl8366_vlan_mc vlanmc;
 713         int err;
 714         int i;
 715
 716         /* clear 16 VLAN member configuration */
 717         vlanmc.vid = 0;
 718         vlanmc.priority = 0;
 719         vlanmc.member = 0;
 720         vlanmc.untag = 0;
 721         vlanmc.fid = 0;
 722         for (i = 0; i < RTL8366_NUM_VLANS; i++) {
 723                 err = rtl8366s_set_vlan_mc(rtl, i, &vlanmc);
 724                 if (err)
 725                         return err;
 726         }
 727
 728         /* Set a default VLAN with vid 1 to 4K table for all ports */
 729         vlan4k.vid = 1;
 730         vlan4k.member = RTL8366_PORT_ALL;
 731         vlan4k.untag = RTL8366_PORT_ALL;
 732         vlan4k.fid = 0;
 733         err = rtl8366s_set_vlan_4k(rtl, &vlan4k);
 734         if (err)
 735                 return err;
 736
 737         /* Set all ports PVID to default VLAN */
 738         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
 739                 err = rtl8366s_set_vlan_port_pvid(rtl, i, 0);
 740                 if (err)
 741                         return err;
 742         }
 743
 744         return 0;
 745 }
 746
 747 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 748 static int rtl8366s_debugfs_open(struct inode *inode, struct file *file)
 749 {
 750         file->private_data = inode->i_private;
 751         return 0;
 752 }
 753
 754 static ssize_t rtl8366s_read_debugfs_mibs(struct file *file,
 755                                           char __user *user_buf,
 756                                           size_t count, loff_t *ppos)
 757 {
 758         struct rtl8366s *rtl = (struct rtl8366s *)file->private_data;
 759         int i, j, len = 0;
 760         char *buf = rtl->buf;
 761
 762         len += snprintf(buf + len, sizeof(rtl->buf) - len, "MIB Counters:\n");
 763         len += snprintf(buf + len, sizeof(rtl->buf) - len, "Counter"
 764                         "                            "
 765                         "Port 0 \t\t Port 1 \t\t Port 2 \t\t Port 3 \t\t "
 766                         "Port 4\n");
 767
 768         for (i = 0; i < 33; ++i) {
 769                 len += snprintf(buf + len, sizeof(rtl->buf) - len, "%d:%s ",
 770                                 i, rtl8366s_mib_counters[i].name);
 771                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
 772                         unsigned long long counter = 0;
 773
 774                         if (!rtl8366_get_mib_counter(rtl, i, j, &counter))
 775                                 len += snprintf(buf + len,
 776                                                 sizeof(rtl->buf) - len,
 777                                                 "[%llu]", counter);
 778                         else
 779                                 len += snprintf(buf + len,
 780                                                 sizeof(rtl->buf) - len,
 781                                                 "[error]");
 782
 783                         if (j != RTL8366_NUM_PORTS - 1) {
 784                                 if (counter < 100000)
 785                                         len += snprintf(buf + len,
 786                                                         sizeof(rtl->buf) - len,
 787                                                         "\t");
 788
 789                                 len += snprintf(buf + len,
 790                                                 sizeof(rtl->buf) - len,
 791                                                 "\t");
 792                         }
 793                 }
 794                 len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
 795         }
 796
 797         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
 798
 799         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 800 }
 801
 802 static ssize_t rtl8366s_read_debugfs_vlan(struct file *file,
 803                                           char __user *user_buf,
 804                                           size_t count, loff_t *ppos)
 805 {
 806         struct rtl8366s *rtl = (struct rtl8366s *)file->private_data;
 807         int i, j, len = 0;
 808         char *buf = rtl->buf;
 809
 810         len += snprintf(buf + len, sizeof(rtl->buf) - len,
 811                         "VLAN Member Config:\n");
 812         len += snprintf(buf + len, sizeof(rtl->buf) - len,
 813                         "\t id \t vid \t prio \t member \t untag  \t fid "
 814                         "\tports\n");
 815
 816         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 817                 struct rtl8366_vlan_mc vlanmc;
 818
 819                 rtl8366s_get_vlan_mc(rtl, i, &vlanmc);
 820
 821                 len += snprintf(buf + len, sizeof(rtl->buf) - len,
 822                                 "\t[%d] \t %d \t %d \t 0x%04x \t 0x%04x \t %d "
 823                                 "\t", i, vlanmc.vid, vlanmc.priority,
 824                                 vlanmc.member, vlanmc.untag, vlanmc.fid);
 825
 826                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
 827                         int index = 0;
 828                         if (!rtl8366s_get_port_vlan_index(rtl, j, &index)) {
 829                                 if (index == i)
 830                                         len += snprintf(buf + len,
 831                                                         sizeof(rtl->buf) - len,
 832                                                         "%d", j);
 833                         }
 834                 }
 835                 len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
 836         }
 837
 838         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 839 }
 840
 841 static ssize_t rtl8366s_read_debugfs_reg(struct file *file,
 842                                          char __user *user_buf,
 843                                          size_t count, loff_t *ppos)
 844 {
 845         struct rtl8366s *rtl = (struct rtl8366s *)file->private_data;
 846         struct rtl8366_smi *smi = &rtl->smi;
 847         u32 t, reg = g_dbg_reg;
 848         int err, len = 0;
 849         char *buf = rtl->buf;
 850
 851         memset(buf, '\0', sizeof(rtl->buf));
 852
 853         err = rtl8366_smi_read_reg(smi, reg, &t);
 854         if (err) {
 855                 len += snprintf(buf, sizeof(rtl->buf),
 856                                 "Read failed (reg: 0x%04x)\n", reg);
 857                 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 858         }
 859
 860         len += snprintf(buf, sizeof(rtl->buf), "reg = 0x%04x, val = 0x%04x\n",
 861                         reg, t);
 862
 863         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 864 }
 865
 866 static ssize_t rtl8366s_write_debugfs_reg(struct file *file,
 867                                           const char __user *user_buf,
 868                                           size_t count, loff_t *ppos)
 869 {
 870         struct rtl8366s *rtl = (struct rtl8366s *)file->private_data;
 871         struct rtl8366_smi *smi = &rtl->smi;
 872         unsigned long data;
 873         u32 reg = g_dbg_reg;
 874         int err;
 875         size_t len;
 876         char *buf = rtl->buf;
 877
 878         len = min(count, sizeof(rtl->buf) - 1);
 879         if (copy_from_user(buf, user_buf, len)) {
 880                 dev_err(rtl->parent, "copy from user failed\n");
 881                 return -EFAULT;
 882         }
 883
 884         buf[len] = '\0';
 885         if (len > 0 && buf[len - 1] == '\n')
 886                 buf[len - 1] = '\0';
 887
 888
 889         if (strict_strtoul(buf, 16, &data)) {
 890                 dev_err(rtl->parent, "Invalid reg value %s\n", buf);
 891         } else {
 892                 err = rtl8366_smi_write_reg(smi, reg, data);
 893                 if (err) {
 894                         dev_err(rtl->parent,
 895                                 "writing reg 0x%04x val 0x%04lx failed\n",
 896                                 reg, data);
 897                 }
 898         }
 899
 900         return count;
 901 }
 902
 903 static const struct file_operations fops_rtl8366s_regs = {
 904         .read = rtl8366s_read_debugfs_reg,
 905         .write = rtl8366s_write_debugfs_reg,
 906         .open = rtl8366s_debugfs_open,
 907         .owner = THIS_MODULE
 908 };
 909
 910 static const struct file_operations fops_rtl8366s_vlan = {
 911         .read = rtl8366s_read_debugfs_vlan,
 912         .open = rtl8366s_debugfs_open,
 913         .owner = THIS_MODULE
 914 };
 915
 916 static const struct file_operations fops_rtl8366s_mibs = {
 917         .read = rtl8366s_read_debugfs_mibs,
 918         .open = rtl8366s_debugfs_open,
 919         .owner = THIS_MODULE
 920 };
 921
 922 static void rtl8366s_debugfs_init(struct rtl8366s *rtl)
 923 {
 924         struct dentry *node;
 925         struct dentry *root;
 926
 927         if (!rtl->debugfs_root)
 928                 rtl->debugfs_root = debugfs_create_dir("rtl8366s", NULL);
 929
 930         if (!rtl->debugfs_root) {
 931                 dev_err(rtl->parent, "Unable to create debugfs dir\n");
 932                 return;
 933         }
 934         root = rtl->debugfs_root;
 935
 936         node = debugfs_create_x16("reg", S_IRUGO | S_IWUSR, root, &g_dbg_reg);
 937         if (!node) {
 938                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 939                         "reg");
 940                 return;
 941         }
 942
 943         node = debugfs_create_file("val", S_IRUGO | S_IWUSR, root, rtl,
 944                                    &fops_rtl8366s_regs);
 945         if (!node) {
 946                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 947                         "val");
 948                 return;
 949         }
 950
 951         node = debugfs_create_file("vlan", S_IRUSR, root, rtl,
 952                                    &fops_rtl8366s_vlan);
 953         if (!node) {
 954                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 955                         "vlan");
 956                 return;
 957         }
 958
 959         node = debugfs_create_file("mibs", S_IRUSR, root, rtl,
 960                                    &fops_rtl8366s_mibs);
 961         if (!node) {
 962                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 963                         "mibs");
 964                 return;
 965         }
 966 }
 967
 968 static void rtl8366s_debugfs_remove(struct rtl8366s *rtl)
 969 {
 970         if (rtl->debugfs_root) {
 971                 debugfs_remove_recursive(rtl->debugfs_root);
 972                 rtl->debugfs_root = NULL;
 973         }
 974 }
 975
 976 #else
 977 static inline void rtl8366s_debugfs_init(struct rtl8366s *rtl) {}
 978 static inline void rtl8366s_debugfs_remove(struct rtl8366s *rtl) {}
 979 #endif /* CONFIG_RTL8366S_PHY_DEBUG_FS */
 980
 981 static int rtl8366s_sw_reset_mibs(struct switch_dev *dev,
 982                                   const struct switch_attr *attr,
 983                                   struct switch_val *val)
 984 {
 985         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
 986         struct rtl8366_smi *smi = &rtl->smi;
 987         u32 data = 0;
 988
 989         if (val->value.i == 1) {
 990                 rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
 991                 data |= (1 << 2);
 992                 rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
 993         }
 994
 995         return 0;
 996 }
 997
 998 static int rtl8366s_sw_get_vlan_enable(struct switch_dev *dev,
 999                                        const struct switch_attr *attr,
1000                                        struct switch_val *val)
1001 {
1002         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1003         struct rtl8366_smi *smi = &rtl->smi;
1004         u32 data;
1005
1006         if (attr->ofs == 1) {
1007                 rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
1008
1009                 if (data & RTL8366_CHIP_CTRL_VLAN)
1010                         val->value.i = 1;
1011                 else
1012                         val->value.i = 0;
1013         } else if (attr->ofs == 2) {
1014                 rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, &data);
1015
1016                 if (data & 0x0001)
1017                         val->value.i = 1;
1018                 else
1019                         val->value.i = 0;
1020         }
1021
1022         return 0;
1023 }
1024
1025 static int rtl8366s_sw_get_blinkrate(struct switch_dev *dev,
1026                                      const struct switch_attr *attr,
1027                                      struct switch_val *val)
1028 {
1029         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1030         struct rtl8366_smi *smi = &rtl->smi;
1031         u32 data;
1032
1033         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1034
1035         val->value.i = (data & (RTL8366_LED_BLINKRATE_MASK));
1036
1037         return 0;
1038 }
1039
1040 static int rtl8366s_sw_set_blinkrate(struct switch_dev *dev,
1041                                     const struct switch_attr *attr,
1042                                     struct switch_val *val)
1043 {
1044         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1045         struct rtl8366_smi *smi = &rtl->smi;
1046         u32 data;
1047
1048         if (val->value.i >= 6)
1049                 return -EINVAL;
1050
1051         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1052
1053         data &= ~RTL8366_LED_BLINKRATE_MASK;
1054         data |= val->value.i;
1055
1056         rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1057
1058         return 0;
1059 }
1060
1061 static int rtl8366s_sw_set_vlan_enable(struct switch_dev *dev,
1062                                        const struct switch_attr *attr,
1063                                        struct switch_val *val)
1064 {
1065         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1066
1067         if (attr->ofs == 1)
1068                 return rtl8366s_vlan_set_vlan(rtl, val->value.i);
1069         else
1070                 return rtl8366s_vlan_set_4ktable(rtl, val->value.i);
1071 }
1072
1073 static const char *rtl8366s_speed_str(unsigned speed)
1074 {
1075         switch (speed) {
1076         case 0:
1077                 return "10baseT";
1078         case 1:
1079                 return "100baseT";
1080         case 2:
1081                 return "1000baseT";
1082         }
1083
1084         return "unknown";
1085 }
1086
1087 static int rtl8366s_sw_get_port_link(struct switch_dev *dev,
1088                                      const struct switch_attr *attr,
1089                                      struct switch_val *val)
1090 {
1091         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1092         struct rtl8366_smi *smi = &rtl->smi;
1093         u32 len = 0, data = 0;
1094
1095         if (val->port_vlan >= RTL8366_NUM_PORTS)
1096                 return -EINVAL;
1097
1098         memset(rtl->buf, '\0', sizeof(rtl->buf));
1099         rtl8366_smi_read_reg(smi, RTL8366S_PORT_LINK_STATUS_BASE +
1100                              (val->port_vlan / 2), &data);
1101
1102         if (val->port_vlan % 2)
1103                 data = data >> 8;
1104
1105         if (data & RTL8366S_PORT_STATUS_LINK_MASK) {
1106                 len = snprintf(rtl->buf, sizeof(rtl->buf),
1107                                 "port:%d link:up speed:%s %s-duplex %s%s%s",
1108                                 val->port_vlan,
1109                                 rtl8366s_speed_str(data &
1110                                           RTL8366S_PORT_STATUS_SPEED_MASK),
1111                                 (data & RTL8366S_PORT_STATUS_DUPLEX_MASK) ?
1112                                         "full" : "half",
1113                                 (data & RTL8366S_PORT_STATUS_TXPAUSE_MASK) ?
1114                                         "tx-pause ": "",
1115                                 (data & RTL8366S_PORT_STATUS_RXPAUSE_MASK) ?
1116                                         "rx-pause " : "",
1117                                 (data & RTL8366S_PORT_STATUS_AN_MASK) ?
1118                                         "nway ": "");
1119         } else {
1120                 len = snprintf(rtl->buf, sizeof(rtl->buf), "port:%d link: down",
1121                                 val->port_vlan);
1122         }
1123
1124         val->value.s = rtl->buf;
1125         val->len = len;
1126
1127         return 0;
1128 }
1129
1130 static int rtl8366s_sw_get_vlan_info(struct switch_dev *dev,
1131                                      const struct switch_attr *attr,
1132                                      struct switch_val *val)
1133 {
1134         int i;
1135         u32 len = 0;
1136         struct rtl8366_vlan_mc vlanmc;
1137         struct rtl8366s_vlan_4k vlan4k;
1138         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1139         char *buf = rtl->buf;
1140
1141         if (val->port_vlan == 0 || val->port_vlan >= RTL8366_NUM_VLANS)
1142                 return -EINVAL;
1143
1144         memset(buf, '\0', sizeof(rtl->buf));
1145
1146         rtl8366s_get_vlan_mc(rtl, val->port_vlan, &vlanmc);
1147         rtl8366s_get_vlan_4k(rtl, vlanmc.vid, &vlan4k);
1148
1149         len += snprintf(buf + len, sizeof(rtl->buf) - len, "VLAN %d: Ports: ",
1150                         val->port_vlan);
1151
1152         for (i = 0; i < RTL8366_NUM_PORTS; ++i) {
1153                 int index = 0;
1154                 if (!rtl8366s_get_port_vlan_index(rtl, i, &index) &&
1155                     index == val->port_vlan)
1156                         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1157                                         "%d", i);
1158         }
1159         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
1160
1161         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1162                         "\t\t vid \t prio \t member \t untag \t fid\n");
1163         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\tMC:\t");
1164         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1165                         "%d \t %d \t 0x%04x \t 0x%04x \t %d\n",
1166                         vlanmc.vid, vlanmc.priority, vlanmc.member,
1167                         vlanmc.untag, vlanmc.fid);
1168         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\t4K:\t");
1169         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1170                         "%d \t  \t 0x%04x \t 0x%04x \t %d",
1171                         vlan4k.vid, vlan4k.member, vlan4k.untag, vlan4k.fid);
1172
1173         val->value.s = buf;
1174         val->len = len;
1175
1176         return 0;
1177 }
1178
1179 static int rtl8366s_sw_set_port_led(struct switch_dev *dev,
1180                                     const struct switch_attr *attr,
1181                                     struct switch_val *val)
1182 {
1183         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1184         struct rtl8366_smi *smi = &rtl->smi;
1185         u32 data = 0;
1186
1187         if (val->port_vlan >= RTL8366_NUM_PORTS ||
1188             (1 << val->port_vlan) == RTL8366_PORT_UNKNOWN)
1189                 return -EINVAL;
1190
1191         if (val->port_vlan == RTL8366_PORT_NUM_CPU) {
1192                 rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1193                 data = (data & (~(0xF << 4))) | (val->value.i << 4);
1194                 rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1195         } else {
1196                 rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1197                 data = (data & (~(0xF << (val->port_vlan * 4)))) |
1198                         (val->value.i << (val->port_vlan * 4));
1199                 rtl8366_smi_write_reg(smi, RTL8366_LED_CTRL_REG, data);
1200         }
1201
1202         return 0;
1203 }
1204
1205 static int rtl8366s_sw_get_port_led(struct switch_dev *dev,
1206                                     const struct switch_attr *attr,
1207                                     struct switch_val *val)
1208 {
1209         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1210         struct rtl8366_smi *smi = &rtl->smi;
1211         u32 data = 0;
1212
1213         if (val->port_vlan >= RTL8366_NUM_LEDGROUPS)
1214                 return -EINVAL;
1215
1216         rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1217         val->value.i = (data >> (val->port_vlan * 4)) & 0x000F;
1218
1219         return 0;
1220 }
1221
1222 static int rtl8366s_sw_reset_port_mibs(struct switch_dev *dev,
1223                                        const struct switch_attr *attr,
1224                                        struct switch_val *val)
1225 {
1226         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1227         struct rtl8366_smi *smi = &rtl->smi;
1228         u32 data = 0;
1229
1230         if (val->port_vlan >= RTL8366_NUM_PORTS)
1231                 return -EINVAL;
1232
1233         rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
1234         data |= (1 << (val->port_vlan + 3));
1235         rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
1236
1237         return 0;
1238 }
1239
1240 static int rtl8366s_sw_get_port_mib(struct switch_dev *dev,
1241                                     const struct switch_attr *attr,
1242                                     struct switch_val *val)
1243 {
1244         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1245         int i, len = 0;
1246         unsigned long long counter = 0;
1247         char *buf = rtl->buf;
1248
1249         if (val->port_vlan >= RTL8366_NUM_PORTS)
1250                 return -EINVAL;
1251
1252         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1253                         "Port %d MIB counters\n",
1254                         val->port_vlan);
1255
1256         for (i = 0; i < RTL8366S_MIB_COUNT; ++i) {
1257                 len += snprintf(buf + len, sizeof(rtl->buf) - len,
1258                                 "%d:%s\t", i, rtl8366s_mib_counters[i].name);
1259                 if (!rtl8366_get_mib_counter(rtl, i, val->port_vlan, &counter))
1260                         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1261                                         "[%llu]\n", counter);
1262                 else
1263                         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1264                                         "[error]\n");
1265         }
1266
1267         val->value.s = buf;
1268         val->len = len;
1269         return 0;
1270 }
1271
1272 static int rtl8366s_sw_get_vlan_ports(struct switch_dev *dev,
1273                                       struct switch_val *val)
1274 {
1275         struct rtl8366_vlan_mc vlanmc;
1276         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1277         struct switch_port *port;
1278         int i;
1279
1280         if (val->port_vlan == 0 || val->port_vlan >= RTL8366_NUM_VLANS)
1281                 return -EINVAL;
1282
1283         rtl8366s_get_vlan_mc(rtl, val->port_vlan, &vlanmc);
1284
1285         port = &val->value.ports[0];
1286         val->len = 0;
1287         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
1288                 if (!(vlanmc.member & BIT(i)))
1289                         continue;
1290
1291                 port->id = i;
1292                 port->flags = (vlanmc.untag & BIT(i)) ?
1293                                         0 : BIT(SWITCH_PORT_FLAG_TAGGED);
1294                 val->len++;
1295                 port++;
1296         }
1297         return 0;
1298 }
1299
1300 static int rtl8366s_sw_set_vlan_ports(struct switch_dev *dev,
1301                                       struct switch_val *val)
1302 {
1303         struct rtl8366_vlan_mc vlanmc;
1304         struct rtl8366s_vlan_4k vlan4k;
1305         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1306         struct switch_port *port;
1307         int i;
1308
1309         if (val->port_vlan == 0 || val->port_vlan >= RTL8366_NUM_VLANS)
1310                 return -EINVAL;
1311
1312         rtl8366s_get_vlan_mc(rtl, val->port_vlan, &vlanmc);
1313         rtl8366s_get_vlan_4k(rtl, vlanmc.vid, &vlan4k);
1314
1315         vlanmc.untag = 0;
1316         vlanmc.member = 0;
1317
1318         port = &val->value.ports[0];
1319         for (i = 0; i < val->len; i++, port++) {
1320                 vlanmc.member |= BIT(port->id);
1321
1322                 if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED)))
1323                         vlanmc.untag |= BIT(port->id);
1324         }
1325
1326         vlan4k.member = vlanmc.member;
1327         vlan4k.untag = vlanmc.untag;
1328
1329         rtl8366s_set_vlan_mc(rtl, val->port_vlan, &vlanmc);
1330         rtl8366s_set_vlan_4k(rtl, &vlan4k);
1331         return 0;
1332 }
1333
1334 static int rtl8366s_sw_get_port_pvid(struct switch_dev *dev, int port, int *val)
1335 {
1336         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1337         return rtl8366s_get_vlan_port_pvid(rtl, port, val);
1338 }
1339
1340 static int rtl8366s_sw_set_port_pvid(struct switch_dev *dev, int port, int val)
1341 {
1342         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1343         return rtl8366s_set_vlan_port_pvid(rtl, port, val);
1344 }
1345
1346 static int rtl8366s_sw_reset_switch(struct switch_dev *dev)
1347 {
1348         struct rtl8366s *rtl = sw_to_rtl8366s(dev);
1349         int err;
1350
1351         err = rtl8366s_reset_chip(rtl);
1352         if (err)
1353                 return err;
1354
1355         return rtl8366s_reset_vlan(rtl);
1356 }
1357
1358 static struct switch_attr rtl8366s_globals[] = {
1359         {
1360                 .type = SWITCH_TYPE_INT,
1361                 .name = "enable_vlan",
1362                 .description = "Enable VLAN mode",
1363                 .set = rtl8366s_sw_set_vlan_enable,
1364                 .get = rtl8366s_sw_get_vlan_enable,
1365                 .max = 1,
1366                 .ofs = 1
1367         }, {
1368                 .type = SWITCH_TYPE_INT,
1369                 .name = "enable_vlan4k",
1370                 .description = "Enable VLAN 4K mode",
1371                 .set = rtl8366s_sw_set_vlan_enable,
1372                 .get = rtl8366s_sw_get_vlan_enable,
1373                 .max = 1,
1374                 .ofs = 2
1375         }, {
1376                 .type = SWITCH_TYPE_INT,
1377                 .name = "reset_mibs",
1378                 .description = "Reset all MIB counters",
1379                 .set = rtl8366s_sw_reset_mibs,
1380                 .get = NULL,
1381                 .max = 1
1382         }, {
1383                 .type = SWITCH_TYPE_INT,
1384                 .name = "blinkrate",
1385                 .description = "Get/Set LED blinking rate (0 = 43ms, 1 = 84ms,"
1386                 " 2 = 120ms, 3 = 170ms, 4 = 340ms, 5 = 670ms)",
1387                 .set = rtl8366s_sw_set_blinkrate,
1388                 .get = rtl8366s_sw_get_blinkrate,
1389                 .max = 5
1390         },
1391 };
1392
1393 static struct switch_attr rtl8366s_port[] = {
1394         {
1395                 .type = SWITCH_TYPE_STRING,
1396                 .name = "link",
1397                 .description = "Get port link information",
1398                 .max = 1,
1399                 .set = NULL,
1400                 .get = rtl8366s_sw_get_port_link,
1401         }, {
1402                 .type = SWITCH_TYPE_INT,
1403                 .name = "reset_mib",
1404                 .description = "Reset single port MIB counters",
1405                 .max = 1,
1406                 .set = rtl8366s_sw_reset_port_mibs,
1407                 .get = NULL,
1408         }, {
1409                 .type = SWITCH_TYPE_STRING,
1410                 .name = "mib",
1411                 .description = "Get MIB counters for port",
1412                 .max = 33,
1413                 .set = NULL,
1414                 .get = rtl8366s_sw_get_port_mib,
1415         }, {
1416                 .type = SWITCH_TYPE_INT,
1417                 .name = "led",
1418                 .description = "Get/Set port group (0 - 3) led mode (0 - 15)",
1419                 .max = 15,
1420                 .set = rtl8366s_sw_set_port_led,
1421                 .get = rtl8366s_sw_get_port_led,
1422         },
1423 };
1424
1425 static struct switch_attr rtl8366s_vlan[] = {
1426         {
1427                 .type = SWITCH_TYPE_STRING,
1428                 .name = "info",
1429                 .description = "Get vlan information",
1430                 .max = 1,
1431                 .set = NULL,
1432                 .get = rtl8366s_sw_get_vlan_info,
1433         },
1434 };
1435
1436 /* template */
1437 static struct switch_dev rtl8366_switch_dev = {
1438         .name = "RTL8366S",
1439         .cpu_port = RTL8366_PORT_NUM_CPU,
1440         .ports = RTL8366_NUM_PORTS,
1441         .vlans = RTL8366_NUM_VLANS,
1442         .attr_global = {
1443                 .attr = rtl8366s_globals,
1444                 .n_attr = ARRAY_SIZE(rtl8366s_globals),
1445         },
1446         .attr_port = {
1447                 .attr = rtl8366s_port,
1448                 .n_attr = ARRAY_SIZE(rtl8366s_port),
1449         },
1450         .attr_vlan = {
1451                 .attr = rtl8366s_vlan,
1452                 .n_attr = ARRAY_SIZE(rtl8366s_vlan),
1453         },
1454
1455         .get_vlan_ports = rtl8366s_sw_get_vlan_ports,
1456         .set_vlan_ports = rtl8366s_sw_set_vlan_ports,
1457         .get_port_pvid = rtl8366s_sw_get_port_pvid,
1458         .set_port_pvid = rtl8366s_sw_set_port_pvid,
1459         .reset_switch = rtl8366s_sw_reset_switch,
1460 };
1461
1462 static int rtl8366s_switch_init(struct rtl8366s *rtl)
1463 {
1464         struct switch_dev *dev = &rtl->dev;
1465         int err;
1466
1467         memcpy(dev, &rtl8366_switch_dev, sizeof(struct switch_dev));
1468         dev->priv = rtl;
1469         dev->devname = dev_name(rtl->parent);
1470
1471         err = register_switch(dev, NULL);
1472         if (err)
1473                 dev_err(rtl->parent, "switch registration failed\n");
1474
1475         return err;
1476 }
1477
1478 static void rtl8366s_switch_cleanup(struct rtl8366s *rtl)
1479 {
1480         unregister_switch(&rtl->dev);
1481 }
1482
1483 static int rtl8366s_mii_read(struct mii_bus *bus, int addr, int reg)
1484 {
1485         struct rtl8366_smi *smi = bus->priv;
1486         u32 val = 0;
1487         int err;
1488
1489         err = rtl8366s_read_phy_reg(smi, addr, 0, reg, &val);
1490         if (err)
1491                 return 0xffff;
1492
1493         return val;
1494 }
1495
1496 static int rtl8366s_mii_write(struct mii_bus *bus, int addr, int reg, u16 val)
1497 {
1498         struct rtl8366_smi *smi = bus->priv;
1499         u32 t;
1500         int err;
1501
1502         err = rtl8366s_write_phy_reg(smi, addr, 0, reg, val);
1503         /* flush write */
1504         (void) rtl8366s_read_phy_reg(smi, addr, 0, reg, &t);
1505
1506         return err;
1507 }
1508
1509 static int rtl8366s_mii_bus_match(struct mii_bus *bus)
1510 {
1511         return (bus->read == rtl8366s_mii_read &&
1512                 bus->write == rtl8366s_mii_write);
1513 }
1514
1515 static int rtl8366s_setup(struct rtl8366s *rtl)
1516 {
1517         int ret;
1518
1519         ret = rtl8366s_reset_chip(rtl);
1520         if (ret)
1521                 return ret;
1522
1523         rtl8366s_debugfs_init(rtl);
1524         return 0;
1525 }
1526
1527 static int rtl8366s_detect(struct rtl8366_smi *smi)
1528 {
1529         u32 chip_id = 0;
1530         u32 chip_ver = 0;
1531         int ret;
1532
1533         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_ID_REG, &chip_id);
1534         if (ret) {
1535                 dev_err(smi->parent, "unable to read chip id\n");
1536                 return ret;
1537         }
1538
1539         switch (chip_id) {
1540         case RTL8366S_CHIP_ID_8366:
1541                 break;
1542         default:
1543                 dev_err(smi->parent, "unknown chip id (%04x)\n", chip_id);
1544                 return -ENODEV;
1545         }
1546
1547         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_VERSION_CTRL_REG,
1548                                    &chip_ver);
1549         if (ret) {
1550                 dev_err(smi->parent, "unable to read chip version\n");
1551                 return ret;
1552         }
1553
1554         dev_info(smi->parent, "RTL%04x ver. %u chip found\n",
1555                  chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK);
1556
1557         return 0;
1558 }
1559
1560 static struct rtl8366_smi_ops rtl8366s_smi_ops = {
1561         .detect         = rtl8366s_detect,
1562         .mii_read       = rtl8366s_mii_read,
1563         .mii_write      = rtl8366s_mii_write,
1564 };
1565
1566 static int __init rtl8366s_probe(struct platform_device *pdev)
1567 {
1568         static int rtl8366_smi_version_printed;
1569         struct rtl8366s_platform_data *pdata;
1570         struct rtl8366s *rtl;
1571         struct rtl8366_smi *smi;
1572         int err;
1573
1574         if (!rtl8366_smi_version_printed++)
1575                 printk(KERN_NOTICE RTL8366S_DRIVER_DESC
1576                        " version " RTL8366S_DRIVER_VER"\n");
1577
1578         pdata = pdev->dev.platform_data;
1579         if (!pdata) {
1580                 dev_err(&pdev->dev, "no platform data specified\n");
1581                 err = -EINVAL;
1582                 goto err_out;
1583         }
1584
1585         rtl = kzalloc(sizeof(*rtl), GFP_KERNEL);
1586         if (!rtl) {
1587                 dev_err(&pdev->dev, "no memory for private data\n");
1588                 err = -ENOMEM;
1589                 goto err_out;
1590         }
1591
1592         rtl->parent = &pdev->dev;
1593
1594         smi = &rtl->smi;
1595         smi->parent = &pdev->dev;
1596         smi->gpio_sda = pdata->gpio_sda;
1597         smi->gpio_sck = pdata->gpio_sck;
1598         smi->ops = &rtl8366s_smi_ops;
1599
1600         err = rtl8366_smi_init(smi);
1601         if (err)
1602                 goto err_free_rtl;
1603
1604         platform_set_drvdata(pdev, rtl);
1605
1606         err = rtl8366s_setup(rtl);
1607         if (err)
1608                 goto err_clear_drvdata;
1609
1610         err = rtl8366s_switch_init(rtl);
1611         if (err)
1612                 goto err_clear_drvdata;
1613
1614         return 0;
1615
1616  err_clear_drvdata:
1617         platform_set_drvdata(pdev, NULL);
1618         rtl8366_smi_cleanup(smi);
1619  err_free_rtl:
1620         kfree(rtl);
1621  err_out:
1622         return err;
1623 }
1624
1625 static int rtl8366s_phy_config_init(struct phy_device *phydev)
1626 {
1627         if (!rtl8366s_mii_bus_match(phydev->bus))
1628                 return -EINVAL;
1629
1630         return 0;
1631 }
1632
1633 static int rtl8366s_phy_config_aneg(struct phy_device *phydev)
1634 {
1635         return 0;
1636 }
1637
1638 static struct phy_driver rtl8366s_phy_driver = {
1639         .phy_id         = 0x001cc960,
1640         .name           = "Realtek RTL8366S",
1641         .phy_id_mask    = 0x1ffffff0,
1642         .features       = PHY_GBIT_FEATURES,
1643         .config_aneg    = rtl8366s_phy_config_aneg,
1644         .config_init    = rtl8366s_phy_config_init,
1645         .read_status    = genphy_read_status,
1646         .driver         = {
1647                 .owner = THIS_MODULE,
1648         },
1649 };
1650
1651 static int __devexit rtl8366s_remove(struct platform_device *pdev)
1652 {
1653         struct rtl8366s *rtl = platform_get_drvdata(pdev);
1654
1655         if (rtl) {
1656                 rtl8366s_switch_cleanup(rtl);
1657                 rtl8366s_debugfs_remove(rtl);
1658                 platform_set_drvdata(pdev, NULL);
1659                 rtl8366_smi_cleanup(&rtl->smi);
1660                 kfree(rtl);
1661         }
1662
1663         return 0;
1664 }
1665
1666 static struct platform_driver rtl8366s_driver = {
1667         .driver = {
1668                 .name           = RTL8366S_DRIVER_NAME,
1669                 .owner          = THIS_MODULE,
1670         },
1671         .probe          = rtl8366s_probe,
1672         .remove         = __devexit_p(rtl8366s_remove),
1673 };
1674
1675 static int __init rtl8366s_module_init(void)
1676 {
1677         int ret;
1678         ret = platform_driver_register(&rtl8366s_driver);
1679         if (ret)
1680                 return ret;
1681
1682         ret = phy_driver_register(&rtl8366s_phy_driver);
1683         if (ret)
1684                 goto err_platform_unregister;
1685
1686         return 0;
1687
1688  err_platform_unregister:
1689         platform_driver_unregister(&rtl8366s_driver);
1690         return ret;
1691 }
1692 module_init(rtl8366s_module_init);
1693
1694 static void __exit rtl8366s_module_exit(void)
1695 {
1696         phy_driver_unregister(&rtl8366s_phy_driver);
1697         platform_driver_unregister(&rtl8366s_driver);
1698 }
1699 module_exit(rtl8366s_module_exit);
1700
1701 MODULE_DESCRIPTION(RTL8366S_DRIVER_DESC);
1702 MODULE_VERSION(RTL8366S_DRIVER_VER);
1703 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
1704 MODULE_AUTHOR("Antti Seppälä <a.seppala@gmail.com>");
1705 MODULE_LICENSE("GPL v2");
1706 MODULE_ALIAS("platform:" RTL8366S_DRIVER_NAME);