target/linux/generic-2.6/files/drivers/net/phy/rtl8366rb.c

   1 /*
   2  * Platform driver for the Realtek RTL8366S ethernet switch
   3  *
   4  * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published
   9  * by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/delay.h>
  17 #include <linux/skbuff.h>
  18 #include <linux/switch.h>
  19 #include <linux/rtl8366rb.h>
  20
  21 #include "rtl8366_smi.h"
  22
  23 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
  24 #include <linux/debugfs.h>
  25 #endif
  26
  27 #define RTL8366S_DRIVER_DESC    "Realtek RTL8366RB ethernet switch driver"
  28 #define RTL8366S_DRIVER_VER     "0.2.2"
  29
  30 #define RTL8366S_PHY_NO_MAX                 4
  31 #define RTL8366S_PHY_PAGE_MAX               7
  32 #define RTL8366S_PHY_ADDR_MAX               31
  33
  34 #define RTL8366_CHIP_GLOBAL_CTRL_REG        0x0000
  35 #define RTL8366_CHIP_CTRL_VLAN              (1 << 13)
  36 #define RTL8366_CHIP_CTRL_VLAN_4KTB         (1 << 14)
  37
  38 #define RTL8366_RESET_CTRL_REG              0x0100
  39 #define RTL8366_CHIP_CTRL_RESET_HW          1
  40 #define RTL8366_CHIP_CTRL_RESET_SW          (1 << 1)
  41
  42 #define RTL8366S_CHIP_VERSION_CTRL_REG      0x050A
  43 #define RTL8366S_CHIP_VERSION_MASK          0xf
  44 #define RTL8366S_CHIP_ID_REG                0x0509
  45 #define RTL8366S_CHIP_ID_8366               0x5937
  46
  47 /* PHY registers control */
  48 #define RTL8366S_PHY_ACCESS_CTRL_REG        0x8000
  49 #define RTL8366S_PHY_ACCESS_DATA_REG        0x8002
  50
  51 #define RTL8366S_PHY_CTRL_READ              1
  52 #define RTL8366S_PHY_CTRL_WRITE             0
  53
  54 #define RTL8366S_PHY_REG_MASK               0x1f
  55 #define RTL8366S_PHY_PAGE_OFFSET            5
  56 #define RTL8366S_PHY_PAGE_MASK              (0xf << 5)
  57 #define RTL8366S_PHY_NO_OFFSET              9
  58 #define RTL8366S_PHY_NO_MASK                (0x1f << 9)
  59
  60 /* LED control registers */
  61 #define RTL8366_LED_BLINKRATE_REG           0x0430
  62 #define RTL8366_LED_BLINKRATE_BIT           0
  63 #define RTL8366_LED_BLINKRATE_MASK          0x0007
  64
  65 #define RTL8366_LED_CTRL_REG                0x0431
  66 #define RTL8366_LED_0_1_CTRL_REG            0x0432
  67 #define RTL8366_LED_2_3_CTRL_REG            0x0433
  68
  69 #define RTL8366S_MIB_COUNT                  33
  70 #define RTL8366S_GLOBAL_MIB_COUNT           1
  71 #define RTL8366S_MIB_COUNTER_PORT_OFFSET    0x0050
  72 #define RTL8366S_MIB_COUNTER_BASE           0x1000
  73 #define RTL8366S_MIB_CTRL_REG               0x13F0
  74 #define RTL8366S_MIB_CTRL_USER_MASK         0x0FFC
  75 #define RTL8366S_MIB_CTRL_BUSY_MASK         0x0001
  76 #define RTL8366S_MIB_CTRL_RESET_MASK        0x0001
  77
  78 #define RTL8366S_MIB_CTRL_GLOBAL_RESET_MASK 0x0004
  79 #define RTL8366S_MIB_CTRL_PORT_RESET_BIT    0x0003
  80 #define RTL8366S_MIB_CTRL_PORT_RESET_MASK   0x01FC
  81
  82
  83 #define RTL8366S_PORT_VLAN_CTRL_BASE        0x0063
  84 #define RTL8366S_PORT_VLAN_CTRL_REG(_p)  \
  85                 (RTL8366S_PORT_VLAN_CTRL_BASE + (_p) / 4)
  86 #define RTL8366S_PORT_VLAN_CTRL_MASK        0xf
  87 #define RTL8366S_PORT_VLAN_CTRL_SHIFT(_p)   (4 * ((_p) % 4))
  88
  89
  90 #define RTL8366S_VLAN_TABLE_READ_BASE       0x018C
  91 #define RTL8366S_VLAN_TABLE_WRITE_BASE      0x0185
  92
  93
  94 #define RTL8366S_TABLE_ACCESS_CTRL_REG      0x0180
  95 #define RTL8366S_TABLE_VLAN_READ_CTRL       0x0E01
  96 #define RTL8366S_TABLE_VLAN_WRITE_CTRL      0x0F01
  97
  98 #define RTL8366S_VLAN_MEMCONF_BASE          0x0020
  99
 100
 101 #define RTL8366S_PORT_LINK_STATUS_BASE      0x0014
 102 #define RTL8366S_PORT_STATUS_SPEED_MASK     0x0003
 103 #define RTL8366S_PORT_STATUS_DUPLEX_MASK    0x0004
 104 #define RTL8366S_PORT_STATUS_LINK_MASK      0x0010
 105 #define RTL8366S_PORT_STATUS_TXPAUSE_MASK   0x0020
 106 #define RTL8366S_PORT_STATUS_RXPAUSE_MASK   0x0040
 107 #define RTL8366S_PORT_STATUS_AN_MASK        0x0080
 108
 109
 110 #define RTL8366_PORT_NUM_CPU                5
 111 #define RTL8366_NUM_PORTS                   6
 112 #define RTL8366_NUM_VLANS                   16
 113 #define RTL8366_NUM_LEDGROUPS               4
 114 #define RTL8366_NUM_VIDS                    4096
 115 #define RTL8366S_PRIORITYMAX                7
 116 #define RTL8366S_FIDMAX                     7
 117
 118
 119 #define RTL8366_PORT_1                      (1 << 0) /* In userspace port 0 */
 120 #define RTL8366_PORT_2                      (1 << 1) /* In userspace port 1 */
 121 #define RTL8366_PORT_3                      (1 << 2) /* In userspace port 2 */
 122 #define RTL8366_PORT_4                      (1 << 3) /* In userspace port 3 */
 123 #define RTL8366_PORT_5                      (1 << 4) /* In userspace port 4 */
 124
 125 #define RTL8366_PORT_CPU                    (1 << 5) /* CPU port */
 126
 127 #define RTL8366_PORT_ALL                    (RTL8366_PORT_1 |       \
 128                                              RTL8366_PORT_2 |       \
 129                                              RTL8366_PORT_3 |       \
 130                                              RTL8366_PORT_4 |       \
 131                                              RTL8366_PORT_5 |       \
 132                                              RTL8366_PORT_CPU)
 133
 134 #define RTL8366_PORT_ALL_BUT_CPU            (RTL8366_PORT_1 |       \
 135                                              RTL8366_PORT_2 |       \
 136                                              RTL8366_PORT_3 |       \
 137                                              RTL8366_PORT_4 |       \
 138                                              RTL8366_PORT_5)
 139
 140 #define RTL8366_PORT_ALL_EXTERNAL           (RTL8366_PORT_1 |       \
 141                                              RTL8366_PORT_2 |       \
 142                                              RTL8366_PORT_3 |       \
 143                                              RTL8366_PORT_4)
 144
 145 #define RTL8366_PORT_ALL_INTERNAL            RTL8366_PORT_CPU
 146
 147 struct rtl8366rb {
 148         struct device           *parent;
 149         struct rtl8366_smi      smi;
 150         struct switch_dev       dev;
 151         char                    buf[4096];
 152 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 153         struct dentry           *debugfs_root;
 154 #endif
 155 };
 156
 157 struct rtl8366rb_vlan_mc {
 158         u16     reserved2:1;
 159         u16     priority:3;
 160         u16     vid:12;
 161         u16     untag:8;
 162         u16     member:8;
 163         u16     stag_mbr:8;
 164         u16     stag_idx:3;
 165         u16     reserved1:2;
 166         u16     fid:3;
 167 };
 168
 169 struct rtl8366rb_vlan_4k {
 170         u16     reserved1:4;
 171         u16     vid:12;
 172         u16     untag:8;
 173         u16     member:8;
 174         u16     reserved2:13;
 175         u16     fid:3;
 176 };
 177
 178 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 179 u16 gl_dbg_reg;
 180 #endif
 181
 182 struct mib_counter {
 183         unsigned        offset;
 184         unsigned        length;
 185         const char      *name;
 186 };
 187
 188 static struct mib_counter rtl8366rb_mib_counters[RTL8366S_MIB_COUNT] = {
 189         {  0, 4, "IfInOctets                        " },
 190         {  4, 4, "EtherStatsOctets                  " },
 191         {  8, 2, "EtherStatsUnderSizePkts           " },
 192         { 10, 2, "EtherFregament                    " },
 193         { 12, 2, "EtherStatsPkts64Octets            " },
 194         { 14, 2, "EtherStatsPkts65to127Octets       " },
 195         { 16, 2, "EtherStatsPkts128to255Octets      " },
 196         { 18, 2, "EtherStatsPkts256to511Octets      " },
 197         { 20, 2, "EtherStatsPkts512to1023Octets     " },
 198         { 22, 2, "EtherStatsPkts1024to1518Octets    " },
 199         { 24, 2, "EtherOversizeStats                " },
 200         { 26, 2, "EtherStatsJabbers                 " },
 201         { 28, 2, "IfInUcastPkts                     " },
 202         { 30, 2, "EtherStatsMulticastPkts           " },
 203         { 32, 2, "EtherStatsBroadcastPkts           " },
 204         { 34, 2, "EtherStatsDropEvents              " },
 205         { 36, 2, "Dot3StatsFCSErrors                " },
 206         { 38, 2, "Dot3StatsSymbolErrors             " },
 207         { 40, 2, "Dot3InPauseFrames                 " },
 208         { 42, 2, "Dot3ControlInUnknownOpcodes       " },
 209         { 44, 4, "IfOutOctets                       " },
 210         { 48, 2, "Dot3StatsSingleCollisionFrames    " },
 211         { 50, 2, "Dot3StatMultipleCollisionFrames   " },
 212         { 52, 2, "Dot3sDeferredTransmissions        " },
 213         { 54, 2, "Dot3StatsLateCollisions           " },
 214         { 56, 2, "EtherStatsCollisions              " },
 215         { 58, 2, "Dot3StatsExcessiveCollisions      " },
 216         { 60, 2, "Dot3OutPauseFrames                " },
 217         { 62, 2, "Dot1dBasePortDelayExceededDiscards" },
 218         { 64, 2, "Dot1dTpPortInDiscards             " },
 219         { 66, 2, "IfOutUcastPkts                    " },
 220         { 68, 2, "IfOutMulticastPkts                " },
 221         { 70, 2, "IfOutBroadcastPkts                " },
 222 };
 223
 224 static inline struct rtl8366rb *smi_to_rtl8366rb(struct rtl8366_smi *smi)
 225 {
 226         return container_of(smi, struct rtl8366rb, smi);
 227 }
 228
 229 static inline struct rtl8366rb *sw_to_rtl8366rb(struct switch_dev *sw)
 230 {
 231         return container_of(sw, struct rtl8366rb, dev);
 232 }
 233
 234 static int rtl8366rb_reset_chip(struct rtl8366rb *rtl)
 235 {
 236         struct rtl8366_smi *smi = &rtl->smi;
 237         int timeout = 10;
 238         u32 data;
 239
 240         rtl8366_smi_write_reg(smi, RTL8366_RESET_CTRL_REG,
 241                               RTL8366_CHIP_CTRL_RESET_HW);
 242         do {
 243                 msleep(1);
 244                 if (rtl8366_smi_read_reg(smi, RTL8366_RESET_CTRL_REG, &data))
 245                         return -EIO;
 246
 247                 if (!(data & RTL8366_CHIP_CTRL_RESET_HW))
 248                         break;
 249         } while (--timeout);
 250
 251         if (!timeout) {
 252                 printk("Timeout waiting for the switch to reset\n");
 253                 return -EIO;
 254         }
 255
 256         return 0;
 257 }
 258
 259 static int rtl8366rb_read_phy_reg(struct rtl8366_smi *smi,
 260                                  u32 phy_no, u32 page, u32 addr, u32 *data)
 261 {
 262         u32 reg;
 263         int ret;
 264
 265         if (phy_no > RTL8366S_PHY_NO_MAX)
 266                 return -EINVAL;
 267
 268         if (page > RTL8366S_PHY_PAGE_MAX)
 269                 return -EINVAL;
 270
 271         if (addr > RTL8366S_PHY_ADDR_MAX)
 272                 return -EINVAL;
 273
 274         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 275                                     RTL8366S_PHY_CTRL_READ);
 276         if (ret)
 277                 return ret;
 278
 279         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 280               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 281               (addr & RTL8366S_PHY_REG_MASK);
 282
 283         ret = rtl8366_smi_write_reg(smi, reg, 0);
 284         if (ret)
 285                 return ret;
 286
 287         ret = rtl8366_smi_read_reg(smi, RTL8366S_PHY_ACCESS_DATA_REG, data);
 288         if (ret)
 289                 return ret;
 290
 291         return 0;
 292 }
 293
 294 static int rtl8366rb_write_phy_reg(struct rtl8366_smi *smi,
 295                                   u32 phy_no, u32 page, u32 addr, u32 data)
 296 {
 297         u32 reg;
 298         int ret;
 299
 300         if (phy_no > RTL8366S_PHY_NO_MAX)
 301                 return -EINVAL;
 302
 303         if (page > RTL8366S_PHY_PAGE_MAX)
 304                 return -EINVAL;
 305
 306         if (addr > RTL8366S_PHY_ADDR_MAX)
 307                 return -EINVAL;
 308
 309         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 310                                     RTL8366S_PHY_CTRL_WRITE);
 311         if (ret)
 312                 return ret;
 313
 314         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 315               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 316               (addr & RTL8366S_PHY_REG_MASK);
 317
 318         ret = rtl8366_smi_write_reg(smi, reg, data);
 319         if (ret)
 320                 return ret;
 321
 322         return 0;
 323 }
 324
 325 static int rtl8366_get_mib_counter(struct rtl8366rb *rtl, int counter,
 326                                    int port, unsigned long long *val)
 327 {
 328         struct rtl8366_smi *smi = &rtl->smi;
 329         int i;
 330         int err;
 331         u32 addr, data;
 332         u64 mibvalue;
 333
 334         if (port > RTL8366_NUM_PORTS || counter >= RTL8366S_MIB_COUNT)
 335                 return -EINVAL;
 336
 337         addr = RTL8366S_MIB_COUNTER_BASE +
 338                RTL8366S_MIB_COUNTER_PORT_OFFSET * (port) +
 339                rtl8366rb_mib_counters[counter].offset;
 340
 341         /*
 342          * Writing access counter address first
 343          * then ASIC will prepare 64bits counter wait for being retrived
 344          */
 345         data = 0; /* writing data will be discard by ASIC */
 346         err = rtl8366_smi_write_reg(smi, addr, data);
 347         if (err)
 348                 return err;
 349
 350         /* read MIB control register */
 351         err =  rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
 352         if (err)
 353                 return err;
 354
 355         if (data & RTL8366S_MIB_CTRL_BUSY_MASK)
 356                 return -EBUSY;
 357
 358         if (data & RTL8366S_MIB_CTRL_RESET_MASK)
 359                 return -EIO;
 360
 361         mibvalue = 0;
 362         for (i = rtl8366rb_mib_counters[counter].length; i > 0; i--) {
 363                 err = rtl8366_smi_read_reg(smi, addr + (i - 1), &data);
 364                 if (err)
 365                         return err;
 366
 367                 mibvalue = (mibvalue << 16) | (data & 0xFFFF);
 368         }
 369
 370         *val = mibvalue;
 371         return 0;
 372 }
 373
 374 static int rtl8366rb_get_vlan_4k(struct rtl8366rb *rtl, u32 vid,
 375                                  struct rtl8366rb_vlan_4k *vlan4k)
 376 {
 377         struct rtl8366_smi *smi = &rtl->smi;
 378         int err;
 379         u32 data;
 380         u16 *tableaddr;
 381
 382         memset(vlan4k, '\0', sizeof(struct rtl8366rb_vlan_4k));
 383         vlan4k->vid = vid;
 384
 385         if (vid >= RTL8366_NUM_VIDS)
 386                 return -EINVAL;
 387
 388         tableaddr = (u16 *)vlan4k;
 389
 390         /* write VID */
 391         data = *tableaddr;
 392         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 393         if (err)
 394                 return err;
 395
 396         /* write table access control word */
 397         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 398                                     RTL8366S_TABLE_VLAN_READ_CTRL);
 399         if (err)
 400                 return err;
 401
 402         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE, &data);
 403         if (err)
 404                 return err;
 405
 406         *tableaddr = data;
 407         tableaddr++;
 408
 409         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE + 1,
 410                                    &data);
 411         if (err)
 412                 return err;
 413
 414         *tableaddr = data;
 415         tableaddr++;
 416
 417         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE + 2,
 418                                    &data);
 419         if (err)
 420                 return err;
 421         *tableaddr = data;
 422         vlan4k->vid = vid;
 423
 424         return 0;
 425 }
 426
 427 static int rtl8366rb_set_vlan_4k(struct rtl8366rb *rtl,
 428                                  const struct rtl8366rb_vlan_4k *vlan4k)
 429 {
 430         struct rtl8366_smi *smi = &rtl->smi;
 431         int err;
 432         u32 data;
 433         u16 *tableaddr;
 434
 435         if (vlan4k->vid >= RTL8366_NUM_VIDS ||
 436             vlan4k->member > RTL8366_PORT_ALL ||
 437             vlan4k->untag > RTL8366_PORT_ALL ||
 438             vlan4k->fid > RTL8366S_FIDMAX)
 439                 return -EINVAL;
 440
 441         tableaddr = (u16 *)vlan4k;
 442
 443         data = *tableaddr;
 444
 445         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 446         if (err)
 447                 return err;
 448
 449         tableaddr++;
 450
 451         data = *tableaddr;
 452
 453         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE + 1,
 454                                     data);
 455         if (err)
 456                 return err;
 457
 458         tableaddr++;
 459
 460         data = *tableaddr;
 461
 462         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE + 2,
 463                                     data);
 464         if (err)
 465                 return err;
 466
 467         /* write table access control word */
 468         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 469                                     RTL8366S_TABLE_VLAN_WRITE_CTRL);
 470
 471         return err;
 472 }
 473
 474 static int rtl8366rb_get_vlan_mc(struct rtl8366rb *rtl, u32 index,
 475                                  struct rtl8366rb_vlan_mc *vlanmc)
 476 {
 477         struct rtl8366_smi *smi = &rtl->smi;
 478         int err;
 479         u32 addr;
 480         u32 data;
 481         u16 *tableaddr;
 482
 483         memset(vlanmc, '\0', sizeof(struct rtl8366rb_vlan_mc));
 484
 485         if (index >= RTL8366_NUM_VLANS)
 486                 return -EINVAL;
 487
 488         tableaddr = (u16 *)vlanmc;
 489
 490         addr = RTL8366S_VLAN_MEMCONF_BASE + (index * 3);
 491         err = rtl8366_smi_read_reg(smi, addr, &data);
 492         if (err)
 493                 return err;
 494
 495         *tableaddr = data;
 496         tableaddr++;
 497
 498         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index * 3);
 499         err = rtl8366_smi_read_reg(smi, addr, &data);
 500         if (err)
 501                 return err;
 502
 503         *tableaddr = data;
 504         tableaddr++;
 505
 506         addr = RTL8366S_VLAN_MEMCONF_BASE + 2 + (index * 3);
 507         err = rtl8366_smi_read_reg(smi, addr, &data);
 508         if (err)
 509                 return err;
 510
 511         *tableaddr = data;
 512
 513         return 0;
 514 }
 515
 516 static int rtl8366rb_set_vlan_mc(struct rtl8366rb *rtl, u32 index,
 517                                  const struct rtl8366rb_vlan_mc *vlanmc)
 518 {
 519         struct rtl8366_smi *smi = &rtl->smi;
 520         int err;
 521         u32 addr;
 522         u32 data;
 523         u16 *tableaddr;
 524
 525         if (index >= RTL8366_NUM_VLANS ||
 526             vlanmc->vid >= RTL8366_NUM_VIDS ||
 527             vlanmc->priority > RTL8366S_PRIORITYMAX ||
 528             vlanmc->member > RTL8366_PORT_ALL ||
 529             vlanmc->untag > RTL8366_PORT_ALL ||
 530             vlanmc->fid > RTL8366S_FIDMAX)
 531                 return -EINVAL;
 532
 533         addr = RTL8366S_VLAN_MEMCONF_BASE + (index * 3);
 534
 535         tableaddr = (u16 *)vlanmc;
 536         data = *tableaddr;
 537
 538         err = rtl8366_smi_write_reg(smi, addr, data);
 539         if (err)
 540                 return err;
 541
 542         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index * 3);
 543
 544         tableaddr++;
 545         data = *tableaddr;
 546
 547         err = rtl8366_smi_write_reg(smi, addr, data);
 548         if (err)
 549                 return err;
 550
 551         addr = RTL8366S_VLAN_MEMCONF_BASE + 2 + (index * 3);
 552
 553         tableaddr++;
 554         data = *tableaddr;
 555
 556         err = rtl8366_smi_write_reg(smi, addr, data);
 557         if (err)
 558                 return err;
 559         return 0;
 560 }
 561
 562 static int rtl8366rb_get_port_vlan_index(struct rtl8366rb *rtl, int port,
 563                                        int *val)
 564 {
 565         struct rtl8366_smi *smi = &rtl->smi;
 566         u32 data;
 567         int err;
 568
 569         if (port >= RTL8366_NUM_PORTS)
 570                 return -EINVAL;
 571
 572         err = rtl8366_smi_read_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 573                                    &data);
 574         if (err)
 575                 return err;
 576
 577         *val = (data >> RTL8366S_PORT_VLAN_CTRL_SHIFT(port)) &
 578                RTL8366S_PORT_VLAN_CTRL_MASK;
 579
 580         return 0;
 581
 582 }
 583
 584 static int rtl8366rb_get_vlan_port_pvid(struct rtl8366rb *rtl, int port,
 585                                        int *val)
 586 {
 587         struct rtl8366rb_vlan_mc vlanmc;
 588         int err;
 589         int index;
 590
 591         err = rtl8366rb_get_port_vlan_index(rtl, port, &index);
 592         if (err)
 593                 return err;
 594
 595         err = rtl8366rb_get_vlan_mc(rtl, index, &vlanmc);
 596         if (err)
 597                 return err;
 598
 599         *val = vlanmc.vid;
 600         return 0;
 601 }
 602
 603 static int rtl8366rb_set_port_vlan_index(struct rtl8366rb *rtl, int port,
 604                                         int index)
 605 {
 606         struct rtl8366_smi *smi = &rtl->smi;
 607         u32 data;
 608         int err;
 609
 610         if (port >= RTL8366_NUM_PORTS || index >= RTL8366_NUM_VLANS)
 611                 return -EINVAL;
 612
 613         err = rtl8366_smi_read_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 614                                    &data);
 615         if (err)
 616                 return err;
 617
 618         data &= ~(RTL8366S_PORT_VLAN_CTRL_MASK <<
 619                   RTL8366S_PORT_VLAN_CTRL_SHIFT(port));
 620         data |= (index & RTL8366S_PORT_VLAN_CTRL_MASK) <<
 621                  RTL8366S_PORT_VLAN_CTRL_SHIFT(port);
 622
 623         err = rtl8366_smi_write_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 624                                     data);
 625         return err;
 626 }
 627
 628 static int rtl8366rb_set_vlan_port_pvid(struct rtl8366rb *rtl, int port, int val)
 629 {
 630         int i;
 631         struct rtl8366rb_vlan_mc vlanmc;
 632         struct rtl8366rb_vlan_4k vlan4k;
 633
 634         if (port >= RTL8366_NUM_PORTS || val >= RTL8366_NUM_VIDS)
 635                 return -EINVAL;
 636
 637         /* Updating the 4K entry; lookup it and change the port member set */
 638         rtl8366rb_get_vlan_4k(rtl, val, &vlan4k);
 639         vlan4k.member |= ((1 << port) | RTL8366_PORT_CPU);
 640         vlan4k.untag = RTL8366_PORT_ALL_BUT_CPU;
 641         rtl8366rb_set_vlan_4k(rtl, &vlan4k);
 642
 643         /*
 644          * For the 16 entries more work needs to be done. First see if such
 645          * VID is already there and change it
 646          */
 647         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 648                 rtl8366rb_get_vlan_mc(rtl, i, &vlanmc);
 649
 650                 /* Try to find an existing vid and update port member set */
 651                 if (val == vlanmc.vid) {
 652                         vlanmc.member |= ((1 << port) | RTL8366_PORT_CPU);
 653                         rtl8366rb_set_vlan_mc(rtl, i, &vlanmc);
 654
 655                         /* Now update PVID register settings */
 656                         rtl8366rb_set_port_vlan_index(rtl, port, i);
 657
 658                         return 0;
 659                 }
 660         }
 661
 662         /*
 663          * PVID could not be found from vlan table. Replace unused (one that
 664          * has no member ports) with new one
 665          */
 666         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 667                 rtl8366rb_get_vlan_mc(rtl, i, &vlanmc);
 668
 669                 /*
 670                  * See if this vlan member configuration is unused. It is
 671                  * unused if member set contains no ports or CPU port only
 672                  */
 673                 if (!vlanmc.member || vlanmc.member == RTL8366_PORT_CPU) {
 674                         vlanmc.vid = val;
 675                         vlanmc.priority = 0;
 676                         vlanmc.untag = RTL8366_PORT_ALL_BUT_CPU;
 677                         vlanmc.member = ((1 << port) | RTL8366_PORT_CPU);
 678                         vlanmc.fid = 0;
 679
 680                         rtl8366rb_set_vlan_mc(rtl, i, &vlanmc);
 681
 682                         /* Now update PVID register settings */
 683                         rtl8366rb_set_port_vlan_index(rtl, port, i);
 684
 685                         return 0;
 686                 }
 687         }
 688
 689         dev_err(rtl->parent,
 690                 "All 16 vlan member configurations are in use\n");
 691
 692         return -EINVAL;
 693 }
 694
 695
 696 static int rtl8366rb_vlan_set_vlan(struct rtl8366rb *rtl, int enable)
 697 {
 698         struct rtl8366_smi *smi = &rtl->smi;
 699         u32 data = 0;
 700
 701         rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
 702
 703         if (enable)
 704                 data |= RTL8366_CHIP_CTRL_VLAN;
 705         else
 706                 data &= ~RTL8366_CHIP_CTRL_VLAN;
 707
 708         return rtl8366_smi_write_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, data);
 709 }
 710
 711 static int rtl8366rb_vlan_set_4ktable(struct rtl8366rb *rtl, int enable)
 712 {
 713         struct rtl8366_smi *smi = &rtl->smi;
 714         u32 data = 0;
 715
 716         rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
 717
 718         if (enable)
 719                 data |= RTL8366_CHIP_CTRL_VLAN_4KTB;
 720         else
 721                 data &= ~RTL8366_CHIP_CTRL_VLAN_4KTB;
 722
 723         return rtl8366_smi_write_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, data);
 724 }
 725
 726 static int rtl8366rb_reset_vlan(struct rtl8366rb *rtl)
 727 {
 728         struct rtl8366rb_vlan_4k vlan4k;
 729         struct rtl8366rb_vlan_mc vlanmc;
 730         int err;
 731         int i;
 732
 733         /* clear 16 VLAN member configuration */
 734         vlanmc.vid = 0;
 735         vlanmc.priority = 0;
 736         vlanmc.member = 0;
 737         vlanmc.untag = 0;
 738         vlanmc.fid = 0;
 739         for (i = 0; i < RTL8366_NUM_VLANS; i++) {
 740                 err = rtl8366rb_set_vlan_mc(rtl, i, &vlanmc);
 741                 if (err)
 742                         return err;
 743         }
 744
 745         /* Set a default VLAN with vid 1 to 4K table for all ports */
 746         vlan4k.vid = 1;
 747         vlan4k.member = RTL8366_PORT_ALL;
 748         vlan4k.untag = RTL8366_PORT_ALL;
 749         vlan4k.fid = 0;
 750         err = rtl8366rb_set_vlan_4k(rtl, &vlan4k);
 751         if (err)
 752                 return err;
 753
 754         /* Set all ports PVID to default VLAN */
 755         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
 756                 err = rtl8366rb_set_vlan_port_pvid(rtl, i, 0);
 757                 if (err)
 758                         return err;
 759         }
 760
 761         return 0;
 762 }
 763
 764 #ifdef CONFIG_RTL8366S_PHY_DEBUG_FS
 765 static int rtl8366rb_debugfs_open(struct inode *inode, struct file *file)
 766 {
 767         file->private_data = inode->i_private;
 768         return 0;
 769 }
 770
 771 static ssize_t rtl8366rb_read_debugfs_mibs(struct file *file,
 772                                           char __user *user_buf,
 773                                           size_t count, loff_t *ppos)
 774 {
 775         struct rtl8366rb *rtl = (struct rtl8366rb *)file->private_data;
 776         int i, j, len = 0;
 777         char *buf = rtl->buf;
 778
 779         len += snprintf(buf + len, sizeof(rtl->buf) - len, "MIB Counters:\n");
 780         len += snprintf(buf + len, sizeof(rtl->buf) - len, "Counter"
 781                         "                            "
 782                         "Port 0 \t\t Port 1 \t\t Port 2 \t\t Port 3 \t\t "
 783                         "Port 4\n");
 784
 785         for (i = 0; i < 33; ++i) {
 786                 len += snprintf(buf + len, sizeof(rtl->buf) - len, "%d:%s ",
 787                                 i, rtl8366rb_mib_counters[i].name);
 788                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
 789                         unsigned long long counter = 0;
 790
 791                         if (!rtl8366_get_mib_counter(rtl, i, j, &counter))
 792                                 len += snprintf(buf + len,
 793                                                 sizeof(rtl->buf) - len,
 794                                                 "[%llu]", counter);
 795                         else
 796                                 len += snprintf(buf + len,
 797                                                 sizeof(rtl->buf) - len,
 798                                                 "[error]");
 799
 800                         if (j != RTL8366_NUM_PORTS - 1) {
 801                                 if (counter < 100000)
 802                                         len += snprintf(buf + len,
 803                                                         sizeof(rtl->buf) - len,
 804                                                         "\t");
 805
 806                                 len += snprintf(buf + len,
 807                                                 sizeof(rtl->buf) - len,
 808                                                 "\t");
 809                         }
 810                 }
 811                 len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
 812         }
 813
 814         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
 815
 816         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 817 }
 818
 819 static ssize_t rtl8366rb_read_debugfs_vlan(struct file *file,
 820                                           char __user *user_buf,
 821                                           size_t count, loff_t *ppos)
 822 {
 823         struct rtl8366rb *rtl = (struct rtl8366rb *)file->private_data;
 824         int i, j, len = 0;
 825         char *buf = rtl->buf;
 826
 827         len += snprintf(buf + len, sizeof(rtl->buf) - len,
 828                         "VLAN Member Config:\n");
 829         len += snprintf(buf + len, sizeof(rtl->buf) - len,
 830                         "\t id \t vid \t prio \t member \t untag  \t fid "
 831                         "\tports\n");
 832
 833         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 834                 struct rtl8366rb_vlan_mc vlanmc;
 835
 836                 rtl8366rb_get_vlan_mc(rtl, i, &vlanmc);
 837
 838                 len += snprintf(buf + len, sizeof(rtl->buf) - len,
 839                                 "\t[%d] \t %d \t %d \t 0x%04x \t 0x%04x \t %d "
 840                                 "\t", i, vlanmc.vid, vlanmc.priority,
 841                                 vlanmc.member, vlanmc.untag, vlanmc.fid);
 842
 843                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
 844                         int index = 0;
 845                         if (!rtl8366rb_get_port_vlan_index(rtl, j, &index)) {
 846                                 if (index == i)
 847                                         len += snprintf(buf + len,
 848                                                         sizeof(rtl->buf) - len,
 849                                                         "%d", j);
 850                         }
 851                 }
 852                 len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
 853         }
 854
 855         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 856 }
 857
 858 static ssize_t rtl8366rb_read_debugfs_reg(struct file *file,
 859                                          char __user *user_buf,
 860                                          size_t count, loff_t *ppos)
 861 {
 862         struct rtl8366rb *rtl = (struct rtl8366rb *)file->private_data;
 863         struct rtl8366_smi *smi = &rtl->smi;
 864         u32 t, reg = gl_dbg_reg;
 865         int err, len = 0;
 866         char *buf = rtl->buf;
 867
 868         memset(buf, '\0', sizeof(rtl->buf));
 869
 870         err = rtl8366_smi_read_reg(smi, reg, &t);
 871         if (err) {
 872                 len += snprintf(buf, sizeof(rtl->buf),
 873                                 "Read failed (reg: 0x%04x)\n", reg);
 874                 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 875         }
 876
 877         len += snprintf(buf, sizeof(rtl->buf), "reg = 0x%04x, val = 0x%04x\n",
 878                         reg, t);
 879
 880         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 881 }
 882
 883 static ssize_t rtl8366rb_write_debugfs_reg(struct file *file,
 884                                           const char __user *user_buf,
 885                                           size_t count, loff_t *ppos)
 886 {
 887         struct rtl8366rb *rtl = (struct rtl8366rb *)file->private_data;
 888         struct rtl8366_smi *smi = &rtl->smi;
 889         unsigned long data;
 890         u32 reg = gl_dbg_reg;
 891         int err;
 892         size_t len;
 893         char *buf = rtl->buf;
 894
 895         len = min(count, sizeof(rtl->buf) - 1);
 896         if (copy_from_user(buf, user_buf, len)) {
 897                 dev_err(rtl->parent, "copy from user failed\n");
 898                 return -EFAULT;
 899         }
 900
 901         buf[len] = '\0';
 902         if (len > 0 && buf[len - 1] == '\n')
 903                 buf[len - 1] = '\0';
 904
 905
 906         if (strict_strtoul(buf, 16, &data)) {
 907                 dev_err(rtl->parent, "Invalid reg value %s\n", buf);
 908         } else {
 909                 err = rtl8366_smi_write_reg(smi, reg, data);
 910                 if (err) {
 911                         dev_err(rtl->parent,
 912                                 "writing reg 0x%04x val 0x%04lx failed\n",
 913                                 reg, data);
 914                 }
 915         }
 916
 917         return count;
 918 }
 919
 920 static const struct file_operations fops_rtl8366rb_regs = {
 921         .read = rtl8366rb_read_debugfs_reg,
 922         .write = rtl8366rb_write_debugfs_reg,
 923         .open = rtl8366rb_debugfs_open,
 924         .owner = THIS_MODULE
 925 };
 926
 927 static const struct file_operations fops_rtl8366rb_vlan = {
 928         .read = rtl8366rb_read_debugfs_vlan,
 929         .open = rtl8366rb_debugfs_open,
 930         .owner = THIS_MODULE
 931 };
 932
 933 static const struct file_operations fops_rtl8366rb_mibs = {
 934         .read = rtl8366rb_read_debugfs_mibs,
 935         .open = rtl8366rb_debugfs_open,
 936         .owner = THIS_MODULE
 937 };
 938
 939 static void rtl8366rb_debugfs_init(struct rtl8366rb *rtl)
 940 {
 941         struct dentry *node;
 942         struct dentry *root;
 943
 944         if (!rtl->debugfs_root)
 945                 rtl->debugfs_root = debugfs_create_dir("rtl8366rb", NULL);
 946
 947         if (!rtl->debugfs_root) {
 948                 dev_err(rtl->parent, "Unable to create debugfs dir\n");
 949                 return;
 950         }
 951         root = rtl->debugfs_root;
 952
 953         node = debugfs_create_x16("reg", S_IRUGO | S_IWUSR, root, &gl_dbg_reg);
 954         if (!node) {
 955                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 956                         "reg");
 957                 return;
 958         }
 959
 960         node = debugfs_create_file("val", S_IRUGO | S_IWUSR, root, rtl,
 961                                    &fops_rtl8366rb_regs);
 962         if (!node) {
 963                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 964                         "val");
 965                 return;
 966         }
 967
 968         node = debugfs_create_file("vlan", S_IRUSR, root, rtl,
 969                                    &fops_rtl8366rb_vlan);
 970         if (!node) {
 971                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 972                         "vlan");
 973                 return;
 974         }
 975
 976         node = debugfs_create_file("mibs", S_IRUSR, root, rtl,
 977                                    &fops_rtl8366rb_mibs);
 978         if (!node) {
 979                 dev_err(rtl->parent, "Creating debugfs file '%s' failed\n",
 980                         "mibs");
 981                 return;
 982         }
 983 }
 984
 985 static void rtl8366rb_debugfs_remove(struct rtl8366rb *rtl)
 986 {
 987         if (rtl->debugfs_root) {
 988                 debugfs_remove_recursive(rtl->debugfs_root);
 989                 rtl->debugfs_root = NULL;
 990         }
 991 }
 992
 993 #else
 994 static inline void rtl8366rb_debugfs_init(struct rtl8366rb *rtl) {}
 995 static inline void rtl8366rb_debugfs_remove(struct rtl8366rb *rtl) {}
 996 #endif /* CONFIG_RTL8366S_PHY_DEBUG_FS */
 997
 998 static int rtl8366rb_sw_reset_mibs(struct switch_dev *dev,
 999                                   const struct switch_attr *attr,
1000                                   struct switch_val *val)
1001 {
1002         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1003         struct rtl8366_smi *smi = &rtl->smi;
1004         u32 data = 0;
1005
1006         if (val->value.i == 1) {
1007                 rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
1008                 data |= (1 << 2);
1009                 rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
1010         }
1011
1012         return 0;
1013 }
1014
1015 static int rtl8366rb_sw_get_vlan_enable(struct switch_dev *dev,
1016                                        const struct switch_attr *attr,
1017                                        struct switch_val *val)
1018 {
1019         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1020         struct rtl8366_smi *smi = &rtl->smi;
1021         u32 data;
1022
1023         if (attr->ofs == 1) {
1024                 rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
1025
1026                 if (data & RTL8366_CHIP_CTRL_VLAN)
1027                         val->value.i = 1;
1028                 else
1029                         val->value.i = 0;
1030         } else if (attr->ofs == 2) {
1031                 rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
1032
1033                 if (data & RTL8366_CHIP_CTRL_VLAN_4KTB)
1034                         val->value.i = 1;
1035                 else
1036                         val->value.i = 0;
1037         }
1038
1039         return 0;
1040 }
1041
1042 static int rtl8366rb_sw_get_blinkrate(struct switch_dev *dev,
1043                                      const struct switch_attr *attr,
1044                                      struct switch_val *val)
1045 {
1046         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1047         struct rtl8366_smi *smi = &rtl->smi;
1048         u32 data;
1049
1050         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1051
1052         val->value.i = (data & (RTL8366_LED_BLINKRATE_MASK));
1053
1054         return 0;
1055 }
1056
1057 static int rtl8366rb_sw_set_blinkrate(struct switch_dev *dev,
1058                                     const struct switch_attr *attr,
1059                                     struct switch_val *val)
1060 {
1061         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1062         struct rtl8366_smi *smi = &rtl->smi;
1063         u32 data;
1064
1065         if (val->value.i >= 6)
1066                 return -EINVAL;
1067
1068         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1069
1070         data &= ~RTL8366_LED_BLINKRATE_MASK;
1071         data |= val->value.i;
1072
1073         rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1074
1075         return 0;
1076 }
1077
1078 static int rtl8366rb_sw_set_vlan_enable(struct switch_dev *dev,
1079                                        const struct switch_attr *attr,
1080                                        struct switch_val *val)
1081 {
1082         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1083
1084         if (attr->ofs == 1)
1085                 return rtl8366rb_vlan_set_vlan(rtl, val->value.i);
1086         else
1087                 return rtl8366rb_vlan_set_4ktable(rtl, val->value.i);
1088 }
1089
1090 static const char *rtl8366rb_speed_str(unsigned speed)
1091 {
1092         switch (speed) {
1093         case 0:
1094                 return "10baseT";
1095         case 1:
1096                 return "100baseT";
1097         case 2:
1098                 return "1000baseT";
1099         }
1100
1101         return "unknown";
1102 }
1103
1104 static int rtl8366rb_sw_get_port_link(struct switch_dev *dev,
1105                                      const struct switch_attr *attr,
1106                                      struct switch_val *val)
1107 {
1108         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1109         struct rtl8366_smi *smi = &rtl->smi;
1110         u32 len = 0, data = 0;
1111
1112         if (val->port_vlan >= RTL8366_NUM_PORTS)
1113                 return -EINVAL;
1114
1115         memset(rtl->buf, '\0', sizeof(rtl->buf));
1116         rtl8366_smi_read_reg(smi, RTL8366S_PORT_LINK_STATUS_BASE +
1117                              (val->port_vlan / 2), &data);
1118
1119         if (val->port_vlan % 2)
1120                 data = data >> 8;
1121
1122         if (data & RTL8366S_PORT_STATUS_LINK_MASK) {
1123                 len = snprintf(rtl->buf, sizeof(rtl->buf),
1124                                 "port:%d link:up speed:%s %s-duplex %s%s%s",
1125                                 val->port_vlan,
1126                                 rtl8366rb_speed_str(data &
1127                                           RTL8366S_PORT_STATUS_SPEED_MASK),
1128                                 (data & RTL8366S_PORT_STATUS_DUPLEX_MASK) ?
1129                                         "full" : "half",
1130                                 (data & RTL8366S_PORT_STATUS_TXPAUSE_MASK) ?
1131                                         "tx-pause ": "",
1132                                 (data & RTL8366S_PORT_STATUS_RXPAUSE_MASK) ?
1133                                         "rx-pause " : "",
1134                                 (data & RTL8366S_PORT_STATUS_AN_MASK) ?
1135                                         "nway ": "");
1136         } else {
1137                 len = snprintf(rtl->buf, sizeof(rtl->buf), "port:%d link: down",
1138                                 val->port_vlan);
1139         }
1140
1141         val->value.s = rtl->buf;
1142         val->len = len;
1143
1144         return 0;
1145 }
1146
1147 static int rtl8366rb_sw_get_vlan_info(struct switch_dev *dev,
1148                                      const struct switch_attr *attr,
1149                                      struct switch_val *val)
1150 {
1151         int i;
1152         u32 len = 0;
1153         struct rtl8366rb_vlan_mc vlanmc;
1154         struct rtl8366rb_vlan_4k vlan4k;
1155         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1156         char *buf = rtl->buf;
1157
1158         if (val->port_vlan == 0 || val->port_vlan >= RTL8366_NUM_VLANS)
1159                 return -EINVAL;
1160
1161         memset(buf, '\0', sizeof(rtl->buf));
1162
1163         rtl8366rb_get_vlan_mc(rtl, val->port_vlan, &vlanmc);
1164         rtl8366rb_get_vlan_4k(rtl, vlanmc.vid, &vlan4k);
1165
1166         len += snprintf(buf + len, sizeof(rtl->buf) - len, "VLAN %d: Ports: ",
1167                         val->port_vlan);
1168
1169         for (i = 0; i < RTL8366_NUM_PORTS; ++i) {
1170                 int index = 0;
1171                 if (!rtl8366rb_get_port_vlan_index(rtl, i, &index) &&
1172                     index == val->port_vlan)
1173                         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1174                                         "%d", i);
1175         }
1176         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\n");
1177
1178         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1179                         "\t\t vid \t prio \t member \t untag \t fid\n");
1180         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\tMC:\t");
1181         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1182                         "%d \t %d \t 0x%04x \t 0x%04x \t %d\n",
1183                         vlanmc.vid, vlanmc.priority, vlanmc.member,
1184                         vlanmc.untag, vlanmc.fid);
1185         len += snprintf(buf + len, sizeof(rtl->buf) - len, "\t4K:\t");
1186         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1187                         "%d \t  \t 0x%04x \t 0x%04x \t %d",
1188                         vlan4k.vid, vlan4k.member, vlan4k.untag, vlan4k.fid);
1189
1190         val->value.s = buf;
1191         val->len = len;
1192
1193         return 0;
1194 }
1195
1196 static int rtl8366rb_sw_set_port_led(struct switch_dev *dev,
1197                                     const struct switch_attr *attr,
1198                                     struct switch_val *val)
1199 {
1200         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1201         struct rtl8366_smi *smi = &rtl->smi;
1202         u32 data = 0;
1203
1204         if (val->port_vlan >= RTL8366_NUM_PORTS)
1205                 return -EINVAL;
1206
1207         if (val->port_vlan == RTL8366_PORT_NUM_CPU) {
1208                 rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1209                 data = (data & (~(0xF << 4))) | (val->value.i << 4);
1210                 rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1211         } else {
1212                 rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1213                 data = (data & (~(0xF << (val->port_vlan * 4)))) |
1214                         (val->value.i << (val->port_vlan * 4));
1215                 rtl8366_smi_write_reg(smi, RTL8366_LED_CTRL_REG, data);
1216         }
1217
1218         return 0;
1219 }
1220
1221 static int rtl8366rb_sw_get_port_led(struct switch_dev *dev,
1222                                     const struct switch_attr *attr,
1223                                     struct switch_val *val)
1224 {
1225         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1226         struct rtl8366_smi *smi = &rtl->smi;
1227         u32 data = 0;
1228
1229         if (val->port_vlan >= RTL8366_NUM_LEDGROUPS)
1230                 return -EINVAL;
1231
1232         rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1233         val->value.i = (data >> (val->port_vlan * 4)) & 0x000F;
1234
1235         return 0;
1236 }
1237
1238 static int rtl8366rb_sw_reset_port_mibs(struct switch_dev *dev,
1239                                        const struct switch_attr *attr,
1240                                        struct switch_val *val)
1241 {
1242         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1243         struct rtl8366_smi *smi = &rtl->smi;
1244         u32 data = 0;
1245
1246         if (val->port_vlan >= RTL8366_NUM_PORTS)
1247                 return -EINVAL;
1248
1249         rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
1250         data |= (1 << (val->port_vlan + 3));
1251         rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
1252
1253         return 0;
1254 }
1255
1256 static int rtl8366rb_sw_get_port_mib(struct switch_dev *dev,
1257                                     const struct switch_attr *attr,
1258                                     struct switch_val *val)
1259 {
1260         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1261         int i, len = 0;
1262         unsigned long long counter = 0;
1263         char *buf = rtl->buf;
1264
1265         if (val->port_vlan >= RTL8366_NUM_PORTS)
1266                 return -EINVAL;
1267
1268         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1269                         "Port %d MIB counters\n",
1270                         val->port_vlan);
1271
1272         for (i = 0; i < RTL8366S_MIB_COUNT; ++i) {
1273                 len += snprintf(buf + len, sizeof(rtl->buf) - len,
1274                                 "%d:%s\t", i, rtl8366rb_mib_counters[i].name);
1275                 if (!rtl8366_get_mib_counter(rtl, i, val->port_vlan, &counter))
1276                         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1277                                         "[%llu]\n", counter);
1278                 else
1279                         len += snprintf(buf + len, sizeof(rtl->buf) - len,
1280                                         "[error]\n");
1281         }
1282
1283         val->value.s = buf;
1284         val->len = len;
1285         return 0;
1286 }
1287
1288 static int rtl8366rb_sw_get_vlan_ports(struct switch_dev *dev,
1289                                       struct switch_val *val)
1290 {
1291         struct rtl8366rb_vlan_mc vlanmc;
1292         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1293         struct switch_port *port;
1294         int i;
1295
1296         if (val->port_vlan == 0 || val->port_vlan >= RTL8366_NUM_VLANS)
1297                 return -EINVAL;
1298
1299         rtl8366rb_get_vlan_mc(rtl, val->port_vlan, &vlanmc);
1300
1301         port = &val->value.ports[0];
1302         val->len = 0;
1303         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
1304                 if (!(vlanmc.member & BIT(i)))
1305                         continue;
1306
1307                 port->id = i;
1308                 port->flags = (vlanmc.untag & BIT(i)) ?
1309                                         0 : BIT(SWITCH_PORT_FLAG_TAGGED);
1310                 val->len++;
1311                 port++;
1312         }
1313         return 0;
1314 }
1315
1316 static int rtl8366rb_sw_set_vlan_ports(struct switch_dev *dev,
1317                                       struct switch_val *val)
1318 {
1319         struct rtl8366rb_vlan_mc vlanmc;
1320         struct rtl8366rb_vlan_4k vlan4k;
1321         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1322         struct switch_port *port;
1323         int i;
1324
1325         if (val->port_vlan == 0 || val->port_vlan >= RTL8366_NUM_VLANS)
1326                 return -EINVAL;
1327
1328         rtl8366rb_get_vlan_mc(rtl, val->port_vlan, &vlanmc);
1329         rtl8366rb_get_vlan_4k(rtl, vlanmc.vid, &vlan4k);
1330
1331         vlanmc.untag = 0;
1332         vlanmc.member = 0;
1333
1334         port = &val->value.ports[0];
1335         for (i = 0; i < val->len; i++, port++) {
1336                 vlanmc.member |= BIT(port->id);
1337
1338                 if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED)))
1339                         vlanmc.untag |= BIT(port->id);
1340         }
1341
1342         vlan4k.member = vlanmc.member;
1343         vlan4k.untag = vlanmc.untag;
1344
1345         rtl8366rb_set_vlan_mc(rtl, val->port_vlan, &vlanmc);
1346         rtl8366rb_set_vlan_4k(rtl, &vlan4k);
1347         return 0;
1348 }
1349
1350 static int rtl8366rb_sw_get_port_pvid(struct switch_dev *dev, int port, int *val)
1351 {
1352         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1353         return rtl8366rb_get_vlan_port_pvid(rtl, port, val);
1354 }
1355
1356 static int rtl8366rb_sw_set_port_pvid(struct switch_dev *dev, int port, int val)
1357 {
1358         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1359         return rtl8366rb_set_vlan_port_pvid(rtl, port, val);
1360 }
1361
1362 static int rtl8366rb_sw_reset_switch(struct switch_dev *dev)
1363 {
1364         struct rtl8366rb *rtl = sw_to_rtl8366rb(dev);
1365         int err;
1366
1367         err = rtl8366rb_reset_chip(rtl);
1368         if (err)
1369                 return err;
1370
1371         return rtl8366rb_reset_vlan(rtl);
1372 }
1373
1374 static struct switch_attr rtl8366rb_globals[] = {
1375         {
1376                 .type = SWITCH_TYPE_INT,
1377                 .name = "enable_vlan",
1378                 .description = "Enable VLAN mode",
1379                 .set = rtl8366rb_sw_set_vlan_enable,
1380                 .get = rtl8366rb_sw_get_vlan_enable,
1381                 .max = 1,
1382                 .ofs = 1
1383         }, {
1384                 .type = SWITCH_TYPE_INT,
1385                 .name = "enable_vlan4k",
1386                 .description = "Enable VLAN 4K mode",
1387                 .set = rtl8366rb_sw_set_vlan_enable,
1388                 .get = rtl8366rb_sw_get_vlan_enable,
1389                 .max = 1,
1390                 .ofs = 2
1391         }, {
1392                 .type = SWITCH_TYPE_INT,
1393                 .name = "reset_mibs",
1394                 .description = "Reset all MIB counters",
1395                 .set = rtl8366rb_sw_reset_mibs,
1396                 .get = NULL,
1397                 .max = 1
1398         }, {
1399                 .type = SWITCH_TYPE_INT,
1400                 .name = "blinkrate",
1401                 .description = "Get/Set LED blinking rate (0 = 43ms, 1 = 84ms,"
1402                 " 2 = 120ms, 3 = 170ms, 4 = 340ms, 5 = 670ms)",
1403                 .set = rtl8366rb_sw_set_blinkrate,
1404                 .get = rtl8366rb_sw_get_blinkrate,
1405                 .max = 5
1406         },
1407 };
1408
1409 static struct switch_attr rtl8366rb_port[] = {
1410         {
1411                 .type = SWITCH_TYPE_STRING,
1412                 .name = "link",
1413                 .description = "Get port link information",
1414                 .max = 1,
1415                 .set = NULL,
1416                 .get = rtl8366rb_sw_get_port_link,
1417         }, {
1418                 .type = SWITCH_TYPE_INT,
1419                 .name = "reset_mib",
1420                 .description = "Reset single port MIB counters",
1421                 .max = 1,
1422                 .set = rtl8366rb_sw_reset_port_mibs,
1423                 .get = NULL,
1424         }, {
1425                 .type = SWITCH_TYPE_STRING,
1426                 .name = "mib",
1427                 .description = "Get MIB counters for port",
1428                 .max = 33,
1429                 .set = NULL,
1430                 .get = rtl8366rb_sw_get_port_mib,
1431         }, {
1432                 .type = SWITCH_TYPE_INT,
1433                 .name = "led",
1434                 .description = "Get/Set port group (0 - 3) led mode (0 - 15)",
1435                 .max = 15,
1436                 .set = rtl8366rb_sw_set_port_led,
1437                 .get = rtl8366rb_sw_get_port_led,
1438         },
1439 };
1440
1441 static struct switch_attr rtl8366rb_vlan[] = {
1442         {
1443                 .type = SWITCH_TYPE_STRING,
1444                 .name = "info",
1445                 .description = "Get vlan information",
1446                 .max = 1,
1447                 .set = NULL,
1448                 .get = rtl8366rb_sw_get_vlan_info,
1449         },
1450 };
1451
1452 /* template */
1453 static struct switch_dev rtl8366_switch_dev = {
1454         .name = "RTL8366S",
1455         .cpu_port = RTL8366_PORT_NUM_CPU,
1456         .ports = RTL8366_NUM_PORTS,
1457         .vlans = RTL8366_NUM_VLANS,
1458         .attr_global = {
1459                 .attr = rtl8366rb_globals,
1460                 .n_attr = ARRAY_SIZE(rtl8366rb_globals),
1461         },
1462         .attr_port = {
1463                 .attr = rtl8366rb_port,
1464                 .n_attr = ARRAY_SIZE(rtl8366rb_port),
1465         },
1466         .attr_vlan = {
1467                 .attr = rtl8366rb_vlan,
1468                 .n_attr = ARRAY_SIZE(rtl8366rb_vlan),
1469         },
1470
1471         .get_vlan_ports = rtl8366rb_sw_get_vlan_ports,
1472         .set_vlan_ports = rtl8366rb_sw_set_vlan_ports,
1473         .get_port_pvid = rtl8366rb_sw_get_port_pvid,
1474         .set_port_pvid = rtl8366rb_sw_set_port_pvid,
1475         .reset_switch = rtl8366rb_sw_reset_switch,
1476 };
1477
1478 static int rtl8366rb_switch_init(struct rtl8366rb *rtl)
1479 {
1480         struct switch_dev *dev = &rtl->dev;
1481         int err;
1482
1483         memcpy(dev, &rtl8366_switch_dev, sizeof(struct switch_dev));
1484         dev->priv = rtl;
1485         dev->devname = dev_name(rtl->parent);
1486
1487         err = register_switch(dev, NULL);
1488         if (err)
1489                 dev_err(rtl->parent, "switch registration failed\n");
1490
1491         return err;
1492 }
1493
1494 static void rtl8366rb_switch_cleanup(struct rtl8366rb *rtl)
1495 {
1496         unregister_switch(&rtl->dev);
1497 }
1498
1499 static int rtl8366rb_mii_read(struct mii_bus *bus, int addr, int reg)
1500 {
1501         struct rtl8366_smi *smi = bus->priv;
1502         u32 val = 0;
1503         int err;
1504
1505         err = rtl8366rb_read_phy_reg(smi, addr, 0, reg, &val);
1506         if (err)
1507                 return 0xffff;
1508
1509         return val;
1510 }
1511
1512 static int rtl8366rb_mii_write(struct mii_bus *bus, int addr, int reg, u16 val)
1513 {
1514         struct rtl8366_smi *smi = bus->priv;
1515         u32 t;
1516         int err;
1517
1518         err = rtl8366rb_write_phy_reg(smi, addr, 0, reg, val);
1519         /* flush write */
1520         (void) rtl8366rb_read_phy_reg(smi, addr, 0, reg, &t);
1521
1522         return err;
1523 }
1524
1525 static int rtl8366rb_mii_bus_match(struct mii_bus *bus)
1526 {
1527         return (bus->read == rtl8366rb_mii_read &&
1528                 bus->write == rtl8366rb_mii_write);
1529 }
1530
1531 static int rtl8366rb_setup(struct rtl8366rb *rtl)
1532 {
1533         int ret;
1534
1535         ret = rtl8366rb_reset_chip(rtl);
1536         if (ret)
1537                 return ret;
1538
1539         rtl8366rb_debugfs_init(rtl);
1540         return 0;
1541 }
1542
1543 static int rtl8366rb_detect(struct rtl8366_smi *smi)
1544 {
1545         u32 chip_id = 0;
1546         u32 chip_ver = 0;
1547         int ret;
1548
1549         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_ID_REG, &chip_id);
1550         if (ret) {
1551                 dev_err(smi->parent, "unable to read chip id\n");
1552                 return ret;
1553         }
1554
1555         switch (chip_id) {
1556         case RTL8366S_CHIP_ID_8366:
1557                 break;
1558         default:
1559                 dev_err(smi->parent, "unknown chip id (%04x)\n", chip_id);
1560                 return -ENODEV;
1561         }
1562
1563         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_VERSION_CTRL_REG,
1564                                    &chip_ver);
1565         if (ret) {
1566                 dev_err(smi->parent, "unable to read chip version\n");
1567                 return ret;
1568         }
1569
1570         dev_info(smi->parent, "RTL%04x ver. %u chip found\n",
1571                  chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK);
1572
1573         return 0;
1574 }
1575
1576 static struct rtl8366_smi_ops rtl8366rb_smi_ops = {
1577         .detect         = rtl8366rb_detect,
1578         .mii_read       = rtl8366rb_mii_read,
1579         .mii_write      = rtl8366rb_mii_write,
1580 };
1581
1582 static int __init rtl8366rb_probe(struct platform_device *pdev)
1583 {
1584         static int rtl8366_smi_version_printed;
1585         struct rtl8366rb_platform_data *pdata;
1586         struct rtl8366rb *rtl;
1587         struct rtl8366_smi *smi;
1588         int err;
1589
1590         if (!rtl8366_smi_version_printed++)
1591                 printk(KERN_NOTICE RTL8366S_DRIVER_DESC
1592                        " version " RTL8366S_DRIVER_VER"\n");
1593
1594         pdata = pdev->dev.platform_data;
1595         if (!pdata) {
1596                 dev_err(&pdev->dev, "no platform data specified\n");
1597                 err = -EINVAL;
1598                 goto err_out;
1599         }
1600
1601         rtl = kzalloc(sizeof(*rtl), GFP_KERNEL);
1602         if (!rtl) {
1603                 dev_err(&pdev->dev, "no memory for private data\n");
1604                 err = -ENOMEM;
1605                 goto err_out;
1606         }
1607
1608         rtl->parent = &pdev->dev;
1609
1610         smi = &rtl->smi;
1611         smi->parent = &pdev->dev;
1612         smi->gpio_sda = pdata->gpio_sda;
1613         smi->gpio_sck = pdata->gpio_sck;
1614         smi->ops = &rtl8366rb_smi_ops;
1615
1616         err = rtl8366_smi_init(smi);
1617         if (err)
1618                 goto err_free_rtl;
1619
1620         platform_set_drvdata(pdev, rtl);
1621
1622         err = rtl8366rb_setup(rtl);
1623         if (err)
1624                 goto err_clear_drvdata;
1625
1626         err = rtl8366rb_switch_init(rtl);
1627         if (err)
1628                 goto err_clear_drvdata;
1629
1630         return 0;
1631
1632  err_clear_drvdata:
1633         platform_set_drvdata(pdev, NULL);
1634         rtl8366_smi_cleanup(smi);
1635  err_free_rtl:
1636         kfree(rtl);
1637  err_out:
1638         return err;
1639 }
1640
1641 static int rtl8366rb_phy_config_init(struct phy_device *phydev)
1642 {
1643         if (!rtl8366rb_mii_bus_match(phydev->bus))
1644                 return -EINVAL;
1645
1646         return 0;
1647 }
1648
1649 static int rtl8366rb_phy_config_aneg(struct phy_device *phydev)
1650 {
1651         return 0;
1652 }
1653
1654 static struct phy_driver rtl8366rb_phy_driver = {
1655         .phy_id         = 0x001cc960,
1656         .name           = "Realtek RTL8366RB",
1657         .phy_id_mask    = 0x1ffffff0,
1658         .features       = PHY_GBIT_FEATURES,
1659         .config_aneg    = rtl8366rb_phy_config_aneg,
1660         .config_init    = rtl8366rb_phy_config_init,
1661         .read_status    = genphy_read_status,
1662         .driver         = {
1663                 .owner = THIS_MODULE,
1664         },
1665 };
1666
1667 static int __devexit rtl8366rb_remove(struct platform_device *pdev)
1668 {
1669         struct rtl8366rb *rtl = platform_get_drvdata(pdev);
1670
1671         if (rtl) {
1672                 rtl8366rb_switch_cleanup(rtl);
1673                 rtl8366rb_debugfs_remove(rtl);
1674                 platform_set_drvdata(pdev, NULL);
1675                 rtl8366_smi_cleanup(&rtl->smi);
1676                 kfree(rtl);
1677         }
1678
1679         return 0;
1680 }
1681
1682 static struct platform_driver rtl8366rb_driver = {
1683         .driver = {
1684                 .name           = RTL8366RB_DRIVER_NAME,
1685                 .owner          = THIS_MODULE,
1686         },
1687         .probe          = rtl8366rb_probe,
1688         .remove         = __devexit_p(rtl8366rb_remove),
1689 };
1690
1691 static int __init rtl8366rb_module_init(void)
1692 {
1693         int ret;
1694         ret = platform_driver_register(&rtl8366rb_driver);
1695         if (ret)
1696                 return ret;
1697
1698         ret = phy_driver_register(&rtl8366rb_phy_driver);
1699         if (ret)
1700                 goto err_platform_unregister;
1701
1702         return 0;
1703
1704  err_platform_unregister:
1705         platform_driver_unregister(&rtl8366rb_driver);
1706         return ret;
1707 }
1708 module_init(rtl8366rb_module_init);
1709
1710 static void __exit rtl8366rb_module_exit(void)
1711 {
1712         phy_driver_unregister(&rtl8366rb_phy_driver);
1713         platform_driver_unregister(&rtl8366rb_driver);
1714 }
1715 module_exit(rtl8366rb_module_exit);
1716
1717 MODULE_DESCRIPTION(RTL8366S_DRIVER_DESC);
1718 MODULE_VERSION(RTL8366S_DRIVER_VER);
1719 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
1720 MODULE_AUTHOR("Antti Seppälä <a.seppala@gmail.com>");
1721 MODULE_LICENSE("GPL v2");
1722 MODULE_ALIAS("platform:" RTL8366RB_DRIVER_NAME);