2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
34 /* size of the vlan table */
35 #define AR8X16_MAX_VLANS 128
38 struct switch_dev dev;
39 struct phy_device *phy;
40 u32 (*read)(struct ar8216_priv *priv, int reg);
41 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
42 const struct net_device_ops *ndo_old;
43 struct net_device_ops ndo;
44 struct mutex reg_mutex;
47 /* all fields below are cleared on reset */
49 u16 vlan_id[AR8X16_MAX_VLANS];
50 u8 vlan_table[AR8X16_MAX_VLANS];
52 u16 pvid[AR8216_NUM_PORTS];
54 static struct switch_dev athdev;
56 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
59 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
68 *page = regaddr & 0x1ff;
72 ar8216_mii_read(struct ar8216_priv *priv, int reg)
74 struct phy_device *phy = priv->phy;
78 split_addr((u32) reg, &r1, &r2, &page);
79 phy->bus->write(phy->bus, 0x18, 0, page);
80 msleep(1); /* wait for the page switch to propagate */
81 lo = phy->bus->read(phy->bus, 0x10 | r2, r1);
82 hi = phy->bus->read(phy->bus, 0x10 | r2, r1 + 1);
84 return (hi << 16) | lo;
88 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
90 struct phy_device *phy = priv->phy;
94 split_addr((u32) reg, &r1, &r2, &r3);
95 phy->bus->write(phy->bus, 0x18, 0, r3);
96 msleep(1); /* wait for the page switch to propagate */
99 hi = (u16) (val >> 16);
100 phy->bus->write(phy->bus, 0x10 | r2, r1 + 1, hi);
101 phy->bus->write(phy->bus, 0x10 | r2, r1, lo);
105 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
109 v = priv->read(priv, reg);
112 priv->write(priv, reg, v);
118 ar8216_id_chip(struct ar8216_priv *priv)
122 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
123 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
131 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
132 (int)(val >> AR8216_CTRL_VERSION_S),
133 (int)(val & AR8216_CTRL_REVISION),
134 priv->phy->bus->read(priv->phy->bus, priv->phy->addr, 2),
135 priv->phy->bus->read(priv->phy->bus, priv->phy->addr, 3));
142 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
143 struct switch_val *val)
145 struct ar8216_priv *priv = to_ar8216(dev);
146 priv->vlan = !!val->value.i;
151 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
152 struct switch_val *val)
154 struct ar8216_priv *priv = to_ar8216(dev);
155 val->value.i = priv->vlan;
161 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
163 struct ar8216_priv *priv = to_ar8216(dev);
165 /* make sure no invalid PVIDs get set */
167 if (vlan >= dev->vlans)
170 priv->pvid[port] = vlan;
175 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
177 struct ar8216_priv *priv = to_ar8216(dev);
178 *vlan = priv->pvid[port];
183 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
184 struct switch_val *val)
186 struct ar8216_priv *priv = to_ar8216(dev);
187 priv->vlan_id[val->port_vlan] = val->value.i;
192 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
193 struct switch_val *val)
195 struct ar8216_priv *priv = to_ar8216(dev);
196 val->value.i = priv->vlan_id[val->port_vlan];
202 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
204 struct ar8216_priv *priv = dev->phy_ptr;
213 if (unlikely(skb_headroom(skb) < 2)) {
214 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
218 buf = skb_push(skb, 2);
223 return priv->ndo_old->ndo_start_xmit(skb, dev);
226 dev_kfree_skb_any(skb);
231 ar8216_mangle_rx(struct sk_buff *skb, int napi)
233 struct ar8216_priv *priv;
234 struct net_device *dev;
246 /* don't strip the header if vlan mode is disabled */
250 /* strip header, get vlan id */
254 /* check for vlan header presence */
255 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
260 /* no need to fix up packets coming from a tagged source */
261 if (priv->vlan_tagged & (1 << port))
264 /* lookup port vid from local table, the switch passes an invalid vlan id */
265 vlan = priv->vlan_id[priv->pvid[port]];
268 buf[14 + 2] |= vlan >> 8;
269 buf[15 + 2] = vlan & 0xff;
272 skb->protocol = eth_type_trans(skb, skb->dev);
275 return netif_receive_skb(skb);
277 return netif_rx(skb);
280 /* no vlan? eat the packet! */
281 dev_kfree_skb_any(skb);
286 ar8216_netif_rx(struct sk_buff *skb)
288 return ar8216_mangle_rx(skb, 0);
292 ar8216_netif_receive_skb(struct sk_buff *skb)
294 return ar8216_mangle_rx(skb, 1);
298 static struct switch_attr ar8216_globals[] = {
300 .type = SWITCH_TYPE_INT,
301 .name = "enable_vlan",
302 .description = "Enable VLAN mode",
303 .set = ar8216_set_vlan,
304 .get = ar8216_get_vlan,
309 static struct switch_attr ar8216_port[] = {
312 static struct switch_attr ar8216_vlan[] = {
314 .type = SWITCH_TYPE_INT,
316 .description = "VLAN ID",
317 .set = ar8216_set_vid,
318 .get = ar8216_get_vid,
325 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
327 struct ar8216_priv *priv = to_ar8216(dev);
328 u8 ports = priv->vlan_table[val->port_vlan];
332 for (i = 0; i < AR8216_NUM_PORTS; i++) {
333 struct switch_port *p;
335 if (!(ports & (1 << i)))
338 p = &val->value.ports[val->len++];
340 if (priv->vlan_tagged & (1 << i))
341 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
349 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
351 struct ar8216_priv *priv = to_ar8216(dev);
352 u8 *vt = &priv->vlan_table[val->port_vlan];
356 for (i = 0; i < val->len; i++) {
357 struct switch_port *p = &val->value.ports[i];
359 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
360 priv->vlan_tagged |= (1 << p->id);
362 priv->vlan_tagged &= ~(1 << p->id);
363 priv->pvid[p->id] = val->port_vlan;
365 /* make sure that an untagged port does not
366 * appear in other vlans */
367 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
368 if (j == val->port_vlan)
370 priv->vlan_table[j] &= ~(1 << p->id);
380 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
384 while ((priv->read(priv, reg) & mask) != val) {
385 if (timeout-- <= 0) {
386 printk(KERN_ERR "ar8216: timeout waiting for operation to complete\n");
394 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
396 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
398 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
399 val &= AR8216_VTUDATA_MEMBER;
400 val |= AR8216_VTUDATA_VALID;
401 priv->write(priv, AR8216_REG_VTU_DATA, val);
403 op |= AR8216_VTU_ACTIVE;
404 priv->write(priv, AR8216_REG_VTU, op);
408 ar8216_hw_apply(struct switch_dev *dev)
410 struct ar8216_priv *priv = to_ar8216(dev);
411 u8 portmask[AR8216_NUM_PORTS];
414 mutex_lock(&priv->reg_mutex);
415 /* flush all vlan translation unit entries */
416 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
418 memset(portmask, 0, sizeof(portmask));
420 /* calculate the port destination masks and load vlans
421 * into the vlan translation unit */
422 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
423 u8 vp = priv->vlan_table[j];
428 for (i = 0; i < AR8216_NUM_PORTS; i++) {
431 portmask[i] |= vp & ~mask;
436 (priv->vlan_id[j] << AR8216_VTU_VID_S),
437 priv->vlan_table[j]);
441 * isolate all ports, but connect them to the cpu port */
442 for (i = 0; i < AR8216_NUM_PORTS; i++) {
443 if (i == AR8216_PORT_CPU)
446 portmask[i] = 1 << AR8216_PORT_CPU;
447 portmask[AR8216_PORT_CPU] |= (1 << i);
451 /* update the port destination mask registers and tag settings */
452 for (i = 0; i < AR8216_NUM_PORTS; i++) {
457 pvid = priv->vlan_id[priv->pvid[i]];
462 if (priv->vlan && (priv->vlan_tagged & (1 << i))) {
463 egress = AR8216_OUT_ADD_VLAN;
465 egress = AR8216_OUT_STRIP_VLAN;
468 ingress = AR8216_IN_SECURE;
470 ingress = AR8216_IN_PORT_ONLY;
473 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(i),
474 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
475 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
476 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
477 AR8216_PORT_CTRL_LEARN |
478 (priv->vlan && i == AR8216_PORT_CPU && (priv->chip == AR8216) ?
479 AR8216_PORT_CTRL_HEADER : 0) |
480 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
481 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
483 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(i),
484 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
485 AR8216_PORT_VLAN_DEFAULT_ID,
486 (portmask[i] << AR8216_PORT_VLAN_DEST_PORTS_S) |
487 (ingress << AR8216_PORT_VLAN_MODE_S) |
488 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
490 mutex_unlock(&priv->reg_mutex);
495 ar8316_hw_init(struct ar8216_priv *priv) {
496 static int initialized;
504 val = priv->read(priv, 0x8);
506 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
507 /* value taken from Ubiquiti RouterStation Pro */
508 if (val == 0x81461bea) {
509 /* switch already intialized by bootloader */
513 priv->write(priv, 0x8, 0x81461bea);
514 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
515 /* value taken from AVM Fritz!Box 7390 sources */
516 if (val == 0x010e5b71) {
517 /* switch already initialized by bootloader */
521 priv->write(priv, 0x8, 0x010e5b71);
523 /* no known value for phy interface */
524 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
525 priv->phy->interface);
529 /* standard atheros magic */
530 priv->write(priv, 0x38, 0xc000050e);
532 /* Initialize the ports */
533 bus = priv->phy->bus;
534 for (i = 0; i < 5; i++) {
536 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
537 /* work around for phy4 rgmii mode */
538 bus->write(bus, i, MII_ATH_DBG_ADDR, 0x12);
539 bus->write(bus, i, MII_ATH_DBG_DATA, 0x480c);
541 bus->write(bus, i, MII_ATH_DBG_ADDR, 0x0);
542 bus->write(bus, i, MII_ATH_DBG_DATA, 0x824e);
544 bus->write(bus, i, MII_ATH_DBG_ADDR, 0x5);
545 bus->write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
549 /* initialize the port itself */
550 bus->write(bus, i, MII_ADVERTISE,
551 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
552 bus->write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
553 bus->write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
561 ar8216_reset_switch(struct switch_dev *dev)
563 struct ar8216_priv *priv = to_ar8216(dev);
566 mutex_lock(&priv->reg_mutex);
567 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
568 offsetof(struct ar8216_priv, vlan));
569 for (i = 0; i < AR8X16_MAX_VLANS; i++) {
570 priv->vlan_id[i] = i;
572 for (i = 0; i < AR8216_NUM_PORTS; i++) {
573 /* Enable port learning and tx */
574 priv->write(priv, AR8216_REG_PORT_CTRL(i),
575 AR8216_PORT_CTRL_LEARN |
576 (4 << AR8216_PORT_CTRL_STATE_S));
578 priv->write(priv, AR8216_REG_PORT_VLAN(i), 0);
580 /* Configure all PHYs */
581 if (i == AR8216_PORT_CPU) {
582 priv->write(priv, AR8216_REG_PORT_STATUS(i),
583 AR8216_PORT_STATUS_LINK_UP |
584 ((priv->chip == AR8316) ?
585 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
586 AR8216_PORT_STATUS_TXMAC |
587 AR8216_PORT_STATUS_RXMAC |
588 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
589 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
590 AR8216_PORT_STATUS_DUPLEX);
592 priv->write(priv, AR8216_REG_PORT_STATUS(i),
593 AR8216_PORT_STATUS_LINK_AUTO);
596 /* XXX: undocumented magic from atheros, required! */
597 priv->write(priv, 0x38, 0xc000050e);
599 if (priv->chip == AR8216) {
600 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
601 AR8216_GCTRL_MTU, 1518 + 8 + 2);
602 } else if (priv->chip == AR8316) {
603 /* enable jumbo frames */
604 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
605 AR8316_GCTRL_MTU, 9018 + 8 + 2);
608 if (priv->chip == AR8316) {
609 /* enable cpu port to receive multicast and broadcast frames */
610 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
612 mutex_unlock(&priv->reg_mutex);
613 return ar8216_hw_apply(dev);
617 ar8216_config_init(struct phy_device *pdev)
619 struct ar8216_priv *priv;
620 struct net_device *dev = pdev->attached_dev;
623 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
629 priv->chip = ar8216_id_chip(priv);
631 printk(KERN_INFO "%s: AR%d PHY driver attached.\n",
632 pdev->attached_dev->name, priv->chip);
634 if (pdev->addr != 0) {
635 if (priv->chip == AR8316) {
636 pdev->supported |= SUPPORTED_1000baseT_Full;
637 pdev->advertising |= ADVERTISED_1000baseT_Full;
643 pdev->supported = priv->chip == AR8316 ?
644 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
645 pdev->advertising = pdev->supported;
647 mutex_init(&priv->reg_mutex);
648 priv->read = ar8216_mii_read;
649 priv->write = ar8216_mii_write;
650 memcpy(&priv->dev, &athdev, sizeof(struct switch_dev));
653 if (priv->chip == AR8316) {
654 priv->dev.name = "Atheros AR8316";
655 priv->dev.vlans = AR8X16_MAX_VLANS;
656 /* port 5 connected to the other mac, therefore unusable */
657 priv->dev.ports = (AR8216_NUM_PORTS - 1);
660 if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
665 if (priv->chip == AR8316) {
666 ret = ar8316_hw_init(priv);
673 ret = ar8216_reset_switch(&priv->dev);
681 /* VID fixup only needed on ar8216 */
682 if (pdev->addr == 0 && priv->chip == AR8216) {
684 pdev->netif_receive_skb = ar8216_netif_receive_skb;
685 pdev->netif_rx = ar8216_netif_rx;
686 priv->ndo_old = dev->netdev_ops;
687 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
688 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
689 dev->netdev_ops = &priv->ndo;
697 ar8216_read_status(struct phy_device *phydev)
699 struct ar8216_priv *priv = phydev->priv;
701 if (phydev->addr != 0) {
702 return genphy_read_status(phydev);
705 phydev->speed = priv->chip == AR8316 ? SPEED_1000 : SPEED_100;
706 phydev->duplex = DUPLEX_FULL;
709 /* flush the address translation unit */
710 mutex_lock(&priv->reg_mutex);
711 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
714 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
717 mutex_unlock(&priv->reg_mutex);
719 phydev->state = PHY_RUNNING;
720 netif_carrier_on(phydev->attached_dev);
721 phydev->adjust_link(phydev->attached_dev);
727 ar8216_config_aneg(struct phy_device *phydev)
729 if (phydev->addr == 0)
732 return genphy_config_aneg(phydev);
736 ar8216_probe(struct phy_device *pdev)
738 struct ar8216_priv priv;
741 if (ar8216_id_chip(&priv) == UNKNOWN) {
748 ar8216_remove(struct phy_device *pdev)
750 struct ar8216_priv *priv = pdev->priv;
751 struct net_device *dev = pdev->attached_dev;
756 if (priv->ndo_old && dev)
757 dev->netdev_ops = priv->ndo_old;
759 unregister_switch(&priv->dev);
764 static struct switch_dev athdev = {
765 .name = "Atheros AR8216",
766 .cpu_port = AR8216_PORT_CPU,
767 .ports = AR8216_NUM_PORTS,
768 .vlans = AR8216_NUM_VLANS,
770 .attr = ar8216_globals,
771 .n_attr = ARRAY_SIZE(ar8216_globals),
775 .n_attr = ARRAY_SIZE(ar8216_port),
779 .n_attr = ARRAY_SIZE(ar8216_vlan),
781 .get_port_pvid = ar8216_get_pvid,
782 .set_port_pvid = ar8216_set_pvid,
783 .get_vlan_ports = ar8216_get_ports,
784 .set_vlan_ports = ar8216_set_ports,
785 .apply_config = ar8216_hw_apply,
786 .reset_switch = ar8216_reset_switch,
789 static struct phy_driver ar8216_driver = {
790 .phy_id = 0x004d0000,
791 .name = "Atheros AR8216/AR8316",
792 .phy_id_mask = 0xffff0000,
793 .features = PHY_BASIC_FEATURES,
794 .probe = ar8216_probe,
795 .remove = ar8216_remove,
796 .config_init = &ar8216_config_init,
797 .config_aneg = &ar8216_config_aneg,
798 .read_status = &ar8216_read_status,
799 .driver = { .owner = THIS_MODULE },
805 return phy_driver_register(&ar8216_driver);
811 phy_driver_unregister(&ar8216_driver);
814 module_init(ar8216_init);
815 module_exit(ar8216_exit);
816 MODULE_LICENSE("GPL");