target/linux/avr32-2.6/patches/100-git_sync.patch

   1 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/boards/atngw100/flash.c avr32-git/arch/avr32/boards/atngw100/flash.c
   2 --- linux-2.6.21.3/arch/avr32/boards/atngw100/flash.c   1970-01-01 01:00:00.000000000 +0100
   3 +++ avr32-git/arch/avr32/boards/atngw100/flash.c        2007-06-06 11:33:46.000000000 +0200
   4 @@ -0,0 +1,95 @@
   5 +/*
   6 + * ATNGW100 board-specific flash initialization
   7 + *
   8 + * Copyright (C) 2005-2006 Atmel Corporation
   9 + *
  10 + * This program is free software; you can redistribute it and/or modify
  11 + * it under the terms of the GNU General Public License version 2 as
  12 + * published by the Free Software Foundation.
  13 + */
  14 +#include <linux/init.h>
  15 +#include <linux/platform_device.h>
  16 +#include <linux/mtd/mtd.h>
  17 +#include <linux/mtd/partitions.h>
  18 +#include <linux/mtd/physmap.h>
  19 +
  20 +#include <asm/arch/smc.h>
  21 +
  22 +static struct smc_config flash_config __initdata = {
  23 +       .ncs_read_setup         = 0,
  24 +       .nrd_setup              = 40,
  25 +       .ncs_write_setup        = 0,
  26 +       .nwe_setup              = 10,
  27 +
  28 +       .ncs_read_pulse         = 80,
  29 +       .nrd_pulse              = 40,
  30 +       .ncs_write_pulse        = 65,
  31 +       .nwe_pulse              = 55,
  32 +
  33 +       .read_cycle             = 120,
  34 +       .write_cycle            = 120,
  35 +
  36 +       .bus_width              = 2,
  37 +       .nrd_controlled         = 1,
  38 +       .nwe_controlled         = 1,
  39 +       .byte_write             = 1,
  40 +};
  41 +
  42 +static struct mtd_partition flash_parts[] = {
  43 +       {
  44 +               .name           = "u-boot",
  45 +               .offset         = 0x00000000,
  46 +               .size           = 0x00020000,           /* 128 KiB */
  47 +               .mask_flags     = MTD_WRITEABLE,
  48 +       },
  49 +       {
  50 +               .name           = "root",
  51 +               .offset         = 0x00020000,
  52 +               .size           = 0x007d0000,
  53 +       },
  54 +       {
  55 +               .name           = "env",
  56 +               .offset         = 0x007f0000,
  57 +               .size           = 0x00010000,
  58 +               .mask_flags     = MTD_WRITEABLE,
  59 +       },
  60 +};
  61 +
  62 +static struct physmap_flash_data flash_data = {
  63 +       .width          = 2,
  64 +       .nr_parts       = ARRAY_SIZE(flash_parts),
  65 +       .parts          = flash_parts,
  66 +};
  67 +
  68 +static struct resource flash_resource = {
  69 +       .start          = 0x00000000,
  70 +       .end            = 0x007fffff,
  71 +       .flags          = IORESOURCE_MEM,
  72 +};
  73 +
  74 +static struct platform_device flash_device = {
  75 +       .name           = "physmap-flash",
  76 +       .id             = 0,
  77 +       .resource       = &flash_resource,
  78 +       .num_resources  = 1,
  79 +       .dev            = {
  80 +               .platform_data = &flash_data,
  81 +       },
  82 +};
  83 +
  84 +/* This needs to be called after the SMC has been initialized */
  85 +static int __init atngw100_flash_init(void)
  86 +{
  87 +       int ret;
  88 +
  89 +       ret = smc_set_configuration(0, &flash_config);
  90 +       if (ret < 0) {
  91 +               printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
  92 +               return ret;
  93 +       }
  94 +
  95 +       platform_device_register(&flash_device);
  96 +
  97 +       return 0;
  98 +}
  99 +device_initcall(atngw100_flash_init);
 100 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/boards/atngw100/Makefile avr32-git/arch/avr32/boards/atngw100/Makefile
 101 --- linux-2.6.21.3/arch/avr32/boards/atngw100/Makefile  1970-01-01 01:00:00.000000000 +0100
 102 +++ avr32-git/arch/avr32/boards/atngw100/Makefile       2007-06-06 11:33:46.000000000 +0200
 103 @@ -0,0 +1 @@
 104 +obj-y                          += setup.o flash.o
 105 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/boards/atngw100/setup.c avr32-git/arch/avr32/boards/atngw100/setup.c
 106 --- linux-2.6.21.3/arch/avr32/boards/atngw100/setup.c   1970-01-01 01:00:00.000000000 +0100
 107 +++ avr32-git/arch/avr32/boards/atngw100/setup.c        2007-06-06 11:33:46.000000000 +0200
 108 @@ -0,0 +1,131 @@
 109 +/*
 110 + * Board-specific setup code for the ATNGW100 Network Gateway
 111 + *
 112 + * Copyright (C) 2005-2006 Atmel Corporation
 113 + *
 114 + * This program is free software; you can redistribute it and/or modify
 115 + * it under the terms of the GNU General Public License version 2 as
 116 + * published by the Free Software Foundation.
 117 + */
 118 +#include <linux/clk.h>
 119 +#include <linux/etherdevice.h>
 120 +#include <linux/init.h>
 121 +#include <linux/linkage.h>
 122 +#include <linux/platform_device.h>
 123 +#include <linux/types.h>
 124 +#include <linux/spi/spi.h>
 125 +
 126 +#include <asm/io.h>
 127 +#include <asm/setup.h>
 128 +
 129 +#include <asm/arch/at32ap7000.h>
 130 +#include <asm/arch/board.h>
 131 +#include <asm/arch/init.h>
 132 +
 133 +/* Initialized by bootloader-specific startup code. */
 134 +struct tag *bootloader_tags __initdata;
 135 +
 136 +struct eth_addr {
 137 +       u8 addr[6];
 138 +};
 139 +static struct eth_addr __initdata hw_addr[2];
 140 +static struct eth_platform_data __initdata eth_data[2];
 141 +
 142 +static struct spi_board_info spi0_board_info[] __initdata = {
 143 +       {
 144 +               .modalias       = "mtd_dataflash",
 145 +               .max_speed_hz   = 10000000,
 146 +               .chip_select    = 0,
 147 +       },
 148 +};
 149 +
 150 +static struct mci_platform_data __initdata mci0_data = {
 151 +       .detect_pin     = GPIO_PIN_PC(25),
 152 +       .wp_pin         = GPIO_PIN_PE(0),
 153 +};
 154 +
 155 +/*
 156 + * The next two functions should go away as the boot loader is
 157 + * supposed to initialize the macb address registers with a valid
 158 + * ethernet address. But we need to keep it around for a while until
 159 + * we can be reasonably sure the boot loader does this.
 160 + *
 161 + * The phy_id is ignored as the driver will probe for it.
 162 + */
 163 +static int __init parse_tag_ethernet(struct tag *tag)
 164 +{
 165 +       int i;
 166 +
 167 +       i = tag->u.ethernet.mac_index;
 168 +       if (i < ARRAY_SIZE(hw_addr))
 169 +               memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
 170 +                      sizeof(hw_addr[i].addr));
 171 +
 172 +       return 0;
 173 +}
 174 +__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
 175 +
 176 +static void __init set_hw_addr(struct platform_device *pdev)
 177 +{
 178 +       struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 179 +       const u8 *addr;
 180 +       void __iomem *regs;
 181 +       struct clk *pclk;
 182 +
 183 +       if (!res)
 184 +               return;
 185 +       if (pdev->id >= ARRAY_SIZE(hw_addr))
 186 +               return;
 187 +
 188 +       addr = hw_addr[pdev->id].addr;
 189 +       if (!is_valid_ether_addr(addr))
 190 +               return;
 191 +
 192 +       /*
 193 +        * Since this is board-specific code, we'll cheat and use the
 194 +        * physical address directly as we happen to know that it's
 195 +        * the same as the virtual address.
 196 +        */
 197 +       regs = (void __iomem __force *)res->start;
 198 +       pclk = clk_get(&pdev->dev, "pclk");
 199 +       if (!pclk)
 200 +               return;
 201 +
 202 +       clk_enable(pclk);
 203 +       __raw_writel((addr[3] << 24) | (addr[2] << 16)
 204 +                    | (addr[1] << 8) | addr[0], regs + 0x98);
 205 +       __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
 206 +       clk_disable(pclk);
 207 +       clk_put(pclk);
 208 +}
 209 +
 210 +struct platform_device *at32_usart_map[1];
 211 +unsigned int at32_nr_usarts = 1;
 212 +
 213 +void __init setup_board(void)
 214 +{
 215 +       at32_map_usart(1, 0);   /* USART 1: /dev/ttyS0, DB9 */
 216 +       at32_setup_serial_console(0);
 217 +}
 218 +
 219 +static int __init atngw100_init(void)
 220 +{
 221 +       /*
 222 +        * ATNGW100 uses 16-bit SDRAM interface, so we don't need to
 223 +        * reserve any pins for it.
 224 +        */
 225 +
 226 +       at32_add_system_devices();
 227 +
 228 +       at32_add_device_usart(0);
 229 +
 230 +       set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
 231 +       set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
 232 +
 233 +       at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
 234 +       at32_add_device_mci(0, &mci0_data);
 235 +       at32_add_device_usba(0);
 236 +
 237 +       return 0;
 238 +}
 239 +postcore_initcall(atngw100_init);
 240 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/boards/atstk1000/atstk1000.h avr32-git/arch/avr32/boards/atstk1000/atstk1000.h
 241 --- linux-2.6.21.3/arch/avr32/boards/atstk1000/atstk1000.h      1970-01-01 01:00:00.000000000 +0100
 242 +++ avr32-git/arch/avr32/boards/atstk1000/atstk1000.h   2007-06-06 11:33:46.000000000 +0200
 243 @@ -0,0 +1,15 @@
 244 +/*
 245 + * ATSTK1000 setup code: Daughterboard interface
 246 + *
 247 + * Copyright (C) 2007 Atmel Corporation
 248 + *
 249 + * This program is free software; you can redistribute it and/or modify
 250 + * it under the terms of the GNU General Public License version 2 as
 251 + * published by the Free Software Foundation.
 252 + */
 253 +#ifndef __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H
 254 +#define __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H
 255 +
 256 +extern struct atmel_lcdfb_info atstk1000_lcdc_data;
 257 +
 258 +#endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
 259 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/boards/atstk1000/atstk1002.c avr32-git/arch/avr32/boards/atstk1000/atstk1002.c
 260 --- linux-2.6.21.3/arch/avr32/boards/atstk1000/atstk1002.c      2007-05-24 23:22:47.000000000 +0200
 261 +++ avr32-git/arch/avr32/boards/atstk1000/atstk1002.c   2007-06-06 11:33:46.000000000 +0200
 262 @@ -16,6 +16,8 @@
 263  #include <linux/types.h>
 264  #include <linux/spi/spi.h>
 265
 266 +#include <video/atmel_lcdc.h>
 267 +
 268  #include <asm/io.h>
 269  #include <asm/setup.h>
 270  #include <asm/arch/at32ap7000.h>
 271 @@ -23,6 +25,7 @@
 272  #include <asm/arch/init.h>
 273  #include <asm/arch/portmux.h>
 274
 275 +#include "atstk1000.h"
 276
 277  #define        SW2_DEFAULT             /* MMCI and UART_A available */
 278
 279 @@ -31,9 +34,7 @@
 280  };
 281
 282  static struct eth_addr __initdata hw_addr[2];
 283 -
 284  static struct eth_platform_data __initdata eth_data[2];
 285 -extern struct lcdc_platform_data atstk1000_fb0_data;
 286
 287  static struct spi_board_info spi0_board_info[] __initdata = {
 288         {
 289 @@ -41,9 +42,15 @@
 290                 .modalias       = "ltv350qv",
 291                 .max_speed_hz   = 16000000,
 292                 .chip_select    = 1,
 293 +               .mode           = SPI_MODE_3,
 294         },
 295  };
 296
 297 +static struct mci_platform_data __initdata mci0_data = {
 298 +       .detect_pin     = GPIO_PIN_NONE,
 299 +       .wp_pin         = GPIO_PIN_NONE,
 300 +};
 301 +
 302  /*
 303   * The next two functions should go away as the boot loader is
 304   * supposed to initialize the macb address registers with a valid
 305 @@ -148,7 +155,12 @@
 306         set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
 307
 308         at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
 309 -       at32_add_device_lcdc(0, &atstk1000_fb0_data);
 310 +       at32_add_device_twi(0);
 311 +       at32_add_device_mci(0, &mci0_data);
 312 +       at32_add_device_lcdc(0, &atstk1000_lcdc_data,
 313 +                            fbmem_start, fbmem_size);
 314 +       at32_add_device_usba(0);
 315 +       at32_add_device_abdac(0);
 316
 317         return 0;
 318  }
 319 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/boards/atstk1000/setup.c avr32-git/arch/avr32/boards/atstk1000/setup.c
 320 --- linux-2.6.21.3/arch/avr32/boards/atstk1000/setup.c  2007-05-24 23:22:47.000000000 +0200
 321 +++ avr32-git/arch/avr32/boards/atstk1000/setup.c       2007-06-06 11:33:46.000000000 +0200
 322 @@ -8,43 +8,56 @@
 323   * published by the Free Software Foundation.
 324   */
 325  #include <linux/bootmem.h>
 326 +#include <linux/fb.h>
 327  #include <linux/init.h>
 328  #include <linux/types.h>
 329  #include <linux/linkage.h>
 330
 331 -#include <asm/setup.h>
 332 +#include <video/atmel_lcdc.h>
 333
 334 +#include <asm/setup.h>
 335  #include <asm/arch/board.h>
 336
 337 +#include "atstk1000.h"
 338 +
 339  /* Initialized by bootloader-specific startup code. */
 340  struct tag *bootloader_tags __initdata;
 341
 342 -struct lcdc_platform_data __initdata atstk1000_fb0_data;
 343 -
 344 -void __init board_setup_fbmem(unsigned long fbmem_start,
 345 -                             unsigned long fbmem_size)
 346 -{
 347 -       if (!fbmem_size)
 348 -               return;
 349 -
 350 -       if (!fbmem_start) {
 351 -               void *fbmem;
 352 -
 353 -               fbmem = alloc_bootmem_low_pages(fbmem_size);
 354 -               fbmem_start = __pa(fbmem);
 355 -       } else {
 356 -               pg_data_t *pgdat;
 357 -
 358 -               for_each_online_pgdat(pgdat) {
 359 -                       if (fbmem_start >= pgdat->bdata->node_boot_start
 360 -                           && fbmem_start <= pgdat->bdata->node_low_pfn)
 361 -                               reserve_bootmem_node(pgdat, fbmem_start,
 362 -                                                    fbmem_size);
 363 -               }
 364 -       }
 365 -
 366 -       printk("%luKiB framebuffer memory at address 0x%08lx\n",
 367 -              fbmem_size >> 10, fbmem_start);
 368 -       atstk1000_fb0_data.fbmem_start = fbmem_start;
 369 -       atstk1000_fb0_data.fbmem_size = fbmem_size;
 370 -}
 371 +static struct fb_videomode __initdata ltv350qv_modes[] = {
 372 +       {
 373 +               .name           = "320x240 @ 75",
 374 +               .refresh        = 75,
 375 +               .xres           = 320,          .yres           = 240,
 376 +               .pixclock       = KHZ2PICOS(6891),
 377 +
 378 +               .left_margin    = 17,           .right_margin   = 33,
 379 +               .upper_margin   = 10,           .lower_margin   = 10,
 380 +               .hsync_len      = 16,           .vsync_len      = 1,
 381 +
 382 +               .sync           = 0,
 383 +               .vmode          = FB_VMODE_NONINTERLACED,
 384 +       },
 385 +};
 386 +
 387 +static struct fb_monspecs __initdata atstk1000_default_monspecs = {
 388 +       .manufacturer           = "SNG",
 389 +       .monitor                = "LTV350QV",
 390 +       .modedb                 = ltv350qv_modes,
 391 +       .modedb_len             = ARRAY_SIZE(ltv350qv_modes),
 392 +       .hfmin                  = 14820,
 393 +       .hfmax                  = 22230,
 394 +       .vfmin                  = 60,
 395 +       .vfmax                  = 90,
 396 +       .dclkmax                = 30000000,
 397 +};
 398 +
 399 +struct atmel_lcdfb_info __initdata atstk1000_lcdc_data = {
 400 +       .default_bpp            = 24,
 401 +       .default_dmacon         = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
 402 +       .default_lcdcon2        = (ATMEL_LCDC_DISTYPE_TFT
 403 +                                  | ATMEL_LCDC_INVCLK
 404 +                                  | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
 405 +                                  | ATMEL_LCDC_MEMOR_BIG),
 406 +       .default_monspecs       = &atstk1000_default_monspecs,
 407 +       .guard_time             = 2,
 408 +};
 409 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/drivers/dw-dmac.c avr32-git/arch/avr32/drivers/dw-dmac.c
 410 --- linux-2.6.21.3/arch/avr32/drivers/dw-dmac.c 1970-01-01 01:00:00.000000000 +0100
 411 +++ avr32-git/arch/avr32/drivers/dw-dmac.c      2007-06-06 11:33:46.000000000 +0200
 412 @@ -0,0 +1,761 @@
 413 +/*
 414 + * Driver for the Synopsys DesignWare DMA Controller
 415 + *
 416 + * Copyright (C) 2005-2006 Atmel Corporation
 417 + *
 418 + * This program is free software; you can redistribute it and/or modify
 419 + * it under the terms of the GNU General Public License version 2 as
 420 + * published by the Free Software Foundation.
 421 + */
 422 +#include <linux/clk.h>
 423 +#include <linux/device.h>
 424 +#include <linux/dma-mapping.h>
 425 +#include <linux/dmapool.h>
 426 +#include <linux/init.h>
 427 +#include <linux/interrupt.h>
 428 +#include <linux/module.h>
 429 +#include <linux/platform_device.h>
 430 +
 431 +#include <asm/dma-controller.h>
 432 +#include <asm/io.h>
 433 +
 434 +#include "dw-dmac.h"
 435 +
 436 +#define DMAC_NR_CHANNELS 3
 437 +#define DMAC_MAX_BLOCKSIZE 4095
 438 +
 439 +enum {
 440 +       CH_STATE_FREE = 0,
 441 +       CH_STATE_ALLOCATED,
 442 +       CH_STATE_BUSY,
 443 +};
 444 +
 445 +struct dw_dma_lli {
 446 +       dma_addr_t      sar;
 447 +       dma_addr_t      dar;
 448 +       dma_addr_t      llp;
 449 +       u32             ctllo;
 450 +       u32             ctlhi;
 451 +       u32             sstat;
 452 +       u32             dstat;
 453 +};
 454 +
 455 +struct dw_dma_block {
 456 +       struct dw_dma_lli *lli_vaddr;
 457 +       dma_addr_t lli_dma_addr;
 458 +};
 459 +
 460 +struct dw_dma_channel {
 461 +       unsigned int state;
 462 +        int is_cyclic;
 463 +       struct dma_request_sg *req_sg;
 464 +       struct dma_request_cyclic *req_cyclic;
 465 +       unsigned int nr_blocks;
 466 +       int direction;
 467 +       struct dw_dma_block *block;
 468 +};
 469 +
 470 +struct dw_dma_controller {
 471 +       spinlock_t lock;
 472 +       void * __iomem  regs;
 473 +       struct dma_pool *lli_pool;
 474 +       struct clk *hclk;
 475 +       struct dma_controller dma;
 476 +       struct dw_dma_channel channel[DMAC_NR_CHANNELS];
 477 +};
 478 +#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
 479 +
 480 +#define dmac_writel_hi(dmac, reg, value) \
 481 +       __raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
 482 +#define dmac_readl_hi(dmac, reg) \
 483 +       __raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
 484 +#define dmac_writel_lo(dmac, reg, value) \
 485 +       __raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
 486 +#define dmac_readl_lo(dmac, reg) \
 487 +       __raw_readl((dmac)->regs + DW_DMAC_##reg)
 488 +#define dmac_chan_writel_hi(dmac, chan, reg, value) \
 489 +       __raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
 490 +                              + DW_DMAC_CHAN_##reg + 4))
 491 +#define dmac_chan_readl_hi(dmac, chan, reg) \
 492 +       __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
 493 +#define dmac_chan_writel_lo(dmac, chan, reg, value) \
 494 +       __raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
 495 +#define dmac_chan_readl_lo(dmac, chan, reg) \
 496 +       __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
 497 +#define set_channel_bit(dmac, reg, chan) \
 498 +       dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
 499 +#define clear_channel_bit(dmac, reg, chan) \
 500 +       dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
 501 +
 502 +static int dmac_alloc_channel(struct dma_controller *_dmac)
 503 +{
 504 +       struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
 505 +       struct dw_dma_channel *chan;
 506 +       unsigned long flags;
 507 +       int i;
 508 +
 509 +       spin_lock_irqsave(&dmac->lock, flags);
 510 +       for (i = 0; i < DMAC_NR_CHANNELS; i++)
 511 +               if (dmac->channel[i].state == CH_STATE_FREE)
 512 +                       break;
 513 +
 514 +       if (i < DMAC_NR_CHANNELS) {
 515 +               chan = &dmac->channel[i];
 516 +               chan->state = CH_STATE_ALLOCATED;
 517 +       } else {
 518 +               i = -EBUSY;
 519 +       }
 520 +
 521 +       spin_unlock_irqrestore(&dmac->lock, flags);
 522 +
 523 +       return i;
 524 +}
 525 +
 526 +static void dmac_release_channel(struct dma_controller *_dmac, int channel)
 527 +{
 528 +       struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
 529 +
 530 +       BUG_ON(channel >= DMAC_NR_CHANNELS
 531 +              || dmac->channel[channel].state != CH_STATE_ALLOCATED);
 532 +
 533 +       dmac->channel[channel].state = CH_STATE_FREE;
 534 +}
 535 +
 536 +static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
 537 +                                           unsigned int nr_blocks)
 538 +{
 539 +       struct dw_dma_block *block;
 540 +       void *p;
 541 +       unsigned int i;
 542 +
 543 +       block = kmalloc(nr_blocks * sizeof(*block),
 544 +                       GFP_KERNEL);
 545 +       if (unlikely(!block))
 546 +               return NULL;
 547 +
 548 +       for (i = 0; i < nr_blocks; i++) {
 549 +               p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
 550 +                                  &block[i].lli_dma_addr);
 551 +               block[i].lli_vaddr = p;
 552 +               if (unlikely(!p))
 553 +                       goto fail;
 554 +       }
 555 +
 556 +       return block;
 557 +
 558 +fail:
 559 +       for (i = 0; i < nr_blocks; i++) {
 560 +               if (!block[i].lli_vaddr)
 561 +                       break;
 562 +               dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
 563 +                             block[i].lli_dma_addr);
 564 +       }
 565 +       kfree(block);
 566 +       return NULL;
 567 +}
 568 +
 569 +static void cleanup_channel(struct dw_dma_controller *dmac,
 570 +                           struct dw_dma_channel *chan)
 571 +{
 572 +       unsigned int i;
 573 +
 574 +       if (chan->nr_blocks > 1) {
 575 +               for (i = 0; i < chan->nr_blocks; i++)
 576 +                       dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
 577 +                                     chan->block[i].lli_dma_addr);
 578 +               kfree(chan->block);
 579 +       }
 580 +
 581 +       chan->state = CH_STATE_ALLOCATED;
 582 +}
 583 +
 584 +static int dmac_prepare_request_sg(struct dma_controller *_dmac,
 585 +                                  struct dma_request_sg *req)
 586 +{
 587 +       struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
 588 +       struct dw_dma_channel *chan;
 589 +       unsigned long ctlhi, ctllo, cfghi, cfglo;
 590 +       unsigned long block_size;
 591 +       unsigned int nr_blocks;
 592 +       int ret, i, direction;
 593 +       unsigned long flags;
 594 +
 595 +       spin_lock_irqsave(&dmac->lock, flags);
 596 +
 597 +       ret = -EINVAL;
 598 +       if (req->req.channel >= DMAC_NR_CHANNELS
 599 +           || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
 600 +           || req->block_size > DMAC_MAX_BLOCKSIZE) {
 601 +               spin_unlock_irqrestore(&dmac->lock, flags);
 602 +               return -EINVAL;
 603 +       }
 604 +
 605 +       chan = &dmac->channel[req->req.channel];
 606 +       chan->state = CH_STATE_BUSY;
 607 +       chan->req_sg = req;
 608 +       chan->is_cyclic = 0;
 609 +
 610 +       /*
 611 +        * We have marked the channel as busy, so no need to keep the
 612 +        * lock as long as we only touch the channel-specific
 613 +        * registers
 614 +        */
 615 +       spin_unlock_irqrestore(&dmac->lock, flags);
 616 +
 617 +       /*
 618 +        * There may be limitations in the driver and/or the DMA
 619 +        * controller that prevents us from sending a whole
 620 +        * scatterlist item in one go.  Taking this into account,
 621 +        * calculate the number of block transfers we need to set up.
 622 +        *
 623 +        * FIXME: Let the peripheral driver know about the maximum
 624 +        * block size we support. We really don't want to use a
 625 +        * different block size than what was suggested by the
 626 +        * peripheral.
 627 +        *
 628 +        * Each block will get its own Linked List Item (LLI) below.
 629 +        */
 630 +       block_size = req->block_size;
 631 +       nr_blocks = req->nr_blocks;
 632 +       pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
 633 +                block_size, nr_blocks, req->nr_sg);
 634 +
 635 +       BUG_ON(nr_blocks == 0);
 636 +       chan->nr_blocks = nr_blocks;
 637 +
 638 +       ret = -EINVAL;
 639 +       cfglo = cfghi = 0;
 640 +       switch (req->direction) {
 641 +       case DMA_DIR_MEM_TO_PERIPH:
 642 +               direction = DMA_TO_DEVICE;
 643 +               cfghi = req->periph_id << (43 - 32);
 644 +               break;
 645 +
 646 +       case DMA_DIR_PERIPH_TO_MEM:
 647 +               direction = DMA_FROM_DEVICE;
 648 +               cfghi = req->periph_id << (39 - 32);
 649 +               break;
 650 +       default:
 651 +               goto out_unclaim_channel;
 652 +       }
 653 +
 654 +        chan->direction = direction;
 655 +
 656 +       dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
 657 +       dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
 658 +
 659 +       ctlhi = block_size >> req->width;
 660 +       ctllo = ((req->direction << 20)
 661 +                // | (1 << 14) | (1 << 11) // source/dest burst trans len
 662 +                | (req->width << 4) | (req->width << 1)
 663 +                | (1 << 0));            // interrupt enable
 664 +
 665 +       if (nr_blocks == 1) {
 666 +               /* Only one block: No need to use block chaining */
 667 +               if (direction == DMA_TO_DEVICE) {
 668 +                       dmac_chan_writel_lo(dmac, req->req.channel, SAR,
 669 +                                           req->sg->dma_address);
 670 +                       dmac_chan_writel_lo(dmac, req->req.channel, DAR,
 671 +                                           req->data_reg);
 672 +                       ctllo |= 2 << 7; // no dst increment
 673 +               } else {
 674 +                       dmac_chan_writel_lo(dmac, req->req.channel, SAR,
 675 +                                           req->data_reg);
 676 +                       dmac_chan_writel_lo(dmac, req->req.channel, DAR,
 677 +                                           req->sg->dma_address);
 678 +                       ctllo |= 2 << 9; // no src increment
 679 +               }
 680 +               dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
 681 +               dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
 682 +               pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
 683 +       } else {
 684 +               struct dw_dma_lli *lli, *lli_prev = NULL;
 685 +               int j = 0, offset = 0;
 686 +
 687 +               ret = -ENOMEM;
 688 +               chan->block = allocate_blocks(dmac, nr_blocks);
 689 +               if (!chan->block)
 690 +                       goto out_unclaim_channel;
 691 +
 692 +               if (direction == DMA_TO_DEVICE)
 693 +                       ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
 694 +               else
 695 +                       ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
 696 +
 697 +               /*
 698 +                * Map scatterlist items to blocks. One scatterlist
 699 +                * item may need more than one block for the reasons
 700 +                * mentioned above.
 701 +                */
 702 +               for (i = 0; i < nr_blocks; i++) {
 703 +                       lli = chan->block[i].lli_vaddr;
 704 +                       if (lli_prev) {
 705 +                               lli_prev->llp = chan->block[i].lli_dma_addr;
 706 +                               pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
 707 +                                        i - 1, chan->block[i - 1].lli_vaddr,
 708 +                                        chan->block[i - 1].lli_dma_addr,
 709 +                                        lli_prev->sar, lli_prev->dar, lli_prev->llp,
 710 +                                        lli_prev->ctllo, lli_prev->ctlhi);
 711 +                       }
 712 +                       lli->llp = 0;
 713 +                       lli->ctllo = ctllo;
 714 +                       lli->ctlhi = ctlhi;
 715 +                       if (direction == DMA_TO_DEVICE) {
 716 +                               lli->sar = req->sg[j].dma_address + offset;
 717 +                               lli->dar = req->data_reg;
 718 +                       } else {
 719 +                               lli->sar = req->data_reg;
 720 +                               lli->dar = req->sg[j].dma_address + offset;
 721 +                       }
 722 +                       lli_prev = lli;
 723 +
 724 +                       offset += block_size;
 725 +                       if (offset > req->sg[j].length) {
 726 +                               j++;
 727 +                               offset = 0;
 728 +                       }
 729 +               }
 730 +
 731 +               pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
 732 +                        i - 1, chan->block[i - 1].lli_vaddr,
 733 +                        chan->block[i - 1].lli_dma_addr, lli_prev->sar,
 734 +                        lli_prev->dar, lli_prev->llp,
 735 +                        lli_prev->ctllo, lli_prev->ctlhi);
 736 +
 737 +               /*
 738 +                * SAR, DAR and CTL are initialized from the LLI. We
 739 +                * only have to enable the LLI bits in CTL.
 740 +                */
 741 +               dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
 742 +               dmac_chan_writel_lo(dmac, req->req.channel, LLP,
 743 +                                   chan->block[0].lli_dma_addr);
 744 +               dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
 745 +       }
 746 +
 747 +       set_channel_bit(dmac, MASK_XFER, req->req.channel);
 748 +       set_channel_bit(dmac, MASK_ERROR, req->req.channel);
 749 +       if (req->req.block_complete)
 750 +               set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
 751 +       else
 752 +               clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
 753 +
 754 +       return 0;
 755 +
 756 +out_unclaim_channel:
 757 +       chan->state = CH_STATE_ALLOCATED;
 758 +       return ret;
 759 +}
 760 +
 761 +static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
 762 +                                       struct dma_request_cyclic *req)
 763 +{
 764 +       struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
 765 +       struct dw_dma_channel *chan;
 766 +       unsigned long ctlhi, ctllo, cfghi, cfglo;
 767 +       unsigned long block_size;
 768 +       int ret, i, direction;
 769 +       unsigned long flags;
 770 +
 771 +       spin_lock_irqsave(&dmac->lock, flags);
 772 +
 773 +        block_size = (req->buffer_size/req->periods) >> req->width;
 774 +
 775 +       ret = -EINVAL;
 776 +       if (req->req.channel >= DMAC_NR_CHANNELS
 777 +           || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
 778 +            || (req->periods == 0)
 779 +           || block_size > DMAC_MAX_BLOCKSIZE) {
 780 +               spin_unlock_irqrestore(&dmac->lock, flags);
 781 +               return -EINVAL;
 782 +       }
 783 +
 784 +       chan = &dmac->channel[req->req.channel];
 785 +       chan->state = CH_STATE_BUSY;
 786 +       chan->is_cyclic = 1;
 787 +        chan->req_cyclic = req;
 788 +
 789 +       /*
 790 +        * We have marked the channel as busy, so no need to keep the
 791 +        * lock as long as we only touch the channel-specific
 792 +        * registers
 793 +        */
 794 +       spin_unlock_irqrestore(&dmac->lock, flags);
 795 +
 796 +       /*
 797 +          Setup
 798 +        */
 799 +       BUG_ON(req->buffer_size % req->periods);
 800 +       /* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
 801 +
 802 +       chan->nr_blocks = req->periods;
 803 +
 804 +       ret = -EINVAL;
 805 +       cfglo = cfghi = 0;
 806 +       switch (req->direction) {
 807 +       case DMA_DIR_MEM_TO_PERIPH:
 808 +               direction = DMA_TO_DEVICE;
 809 +               cfghi = req->periph_id << (43 - 32);
 810 +               break;
 811 +
 812 +       case DMA_DIR_PERIPH_TO_MEM:
 813 +               direction = DMA_FROM_DEVICE;
 814 +               cfghi = req->periph_id << (39 - 32);
 815 +               break;
 816 +       default:
 817 +               goto out_unclaim_channel;
 818 +       }
 819 +
 820 +        chan->direction = direction;
 821 +
 822 +       dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
 823 +       dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
 824 +
 825 +       ctlhi = block_size;
 826 +       ctllo = ((req->direction << 20)
 827 +                | (req->width << 4) | (req->width << 1)
 828 +                | (1 << 0));            // interrupt enable
 829 +
 830 +        {
 831 +               struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
 832 +
 833 +               ret = -ENOMEM;
 834 +               chan->block = allocate_blocks(dmac, req->periods);
 835 +               if (!chan->block)
 836 +                       goto out_unclaim_channel;
 837 +
 838 +               if (direction == DMA_TO_DEVICE)
 839 +                       ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
 840 +               else
 841 +                       ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
 842 +
 843 +               /*
 844 +                * Set up a linked list items where each period gets
 845 +                * an item. The linked list item for the last period
 846 +                * points back to the star of the buffer making a
 847 +                * cyclic buffer.
 848 +                */
 849 +               for (i = 0; i < req->periods; i++) {
 850 +                       lli = chan->block[i].lli_vaddr;
 851 +                       if (lli_prev) {
 852 +                               lli_prev->llp = chan->block[i].lli_dma_addr;
 853 +                               /* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
 854 +                                  i - 1, chan->block[i - 1].lli_vaddr,
 855 +                                  chan->block[i - 1].lli_dma_addr,
 856 +                                  lli_prev->sar, lli_prev->dar, lli_prev->llp,
 857 +                                  lli_prev->ctllo, lli_prev->ctlhi);*/
 858 +                       }
 859 +                       lli->llp = 0;
 860 +                       lli->ctllo = ctllo;
 861 +                       lli->ctlhi = ctlhi;
 862 +                       if (direction == DMA_TO_DEVICE) {
 863 +                               lli->sar = req->buffer_start + i*(block_size << req->width);
 864 +                               lli->dar = req->data_reg;
 865 +                       } else {
 866 +                               lli->sar = req->data_reg;
 867 +                               lli->dar = req->buffer_start + i*(block_size << req->width);
 868 +                       }
 869 +                       lli_prev = lli;
 870 +               }
 871 +               lli->llp = chan->block[0].lli_dma_addr;
 872 +
 873 +               /*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
 874 +                 i - 1, chan->block[i - 1].lli_vaddr,
 875 +                 chan->block[i - 1].lli_dma_addr, lli_prev->sar,
 876 +                 lli_prev->dar, lli_prev->llp,
 877 +                 lli_prev->ctllo, lli_prev->ctlhi); */
 878 +
 879 +               /*
 880 +                * SAR, DAR and CTL are initialized from the LLI. We
 881 +                * only have to enable the LLI bits in CTL.
 882 +                */
 883 +               dmac_chan_writel_lo(dmac, req->req.channel, LLP,
 884 +                                   chan->block[0].lli_dma_addr);
 885 +               dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
 886 +       }
 887 +
 888 +       clear_channel_bit(dmac, MASK_XFER, req->req.channel);
 889 +       set_channel_bit(dmac, MASK_ERROR, req->req.channel);
 890 +       if (req->req.block_complete)
 891 +               set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
 892 +       else
 893 +               clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
 894 +
 895 +       return 0;
 896 +
 897 +out_unclaim_channel:
 898 +       chan->state = CH_STATE_ALLOCATED;
 899 +       return ret;
 900 +}
 901 +
 902 +static int dmac_start_request(struct dma_controller *_dmac,
 903 +                             unsigned int channel)
 904 +{
 905 +       struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
 906 +
 907 +       BUG_ON(channel >= DMAC_NR_CHANNELS);
 908 +
 909 +       set_channel_bit(dmac, CH_EN, channel);
 910 +
 911 +       return 0;
 912 +}
 913 +
 914 +static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
 915 +                                       unsigned int channel)
 916 +{
 917 +       struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
 918 +       struct dw_dma_channel *chan;
 919 +        dma_addr_t current_pos;
 920 +
 921 +       BUG_ON(channel >= DMAC_NR_CHANNELS);
 922 +
 923 +        chan = &dmac->channel[channel];
 924 +
 925 +       switch (chan->direction) {
 926 +       case DMA_TO_DEVICE:
 927 +               current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
 928 +               break;
 929 +       case DMA_FROM_DEVICE:
 930 +               current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
 931 +               break;
 932 +       default:
 933 +               return 0;
 934 +       }
 935 +
 936 +
 937 +        if (!current_pos) {
 938 +               if (chan->is_cyclic) {
 939 +                       current_pos = chan->req_cyclic->buffer_start;
 940 +               } else {
 941 +                       current_pos = chan->req_sg->sg->dma_address;
 942 +               }
 943 +       }
 944 +
 945 +       return current_pos;
 946 +}
 947 +
 948 +
 949 +static int dmac_stop_request(struct dma_controller *_dmac,
 950 +                             unsigned int channel)
 951 +{
 952 +       struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
 953 +       struct dw_dma_channel *chan;
 954 +
 955 +       BUG_ON(channel >= DMAC_NR_CHANNELS);
 956 +
 957 +       chan = &dmac->channel[channel];
 958 +       pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
 959 +                chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
 960 +                dmac_chan_readl_lo(dmac, channel, DAR),
 961 +                dmac_chan_readl_lo(dmac, channel, LLP),
 962 +                dmac_chan_readl_hi(dmac, channel, CTL),
 963 +                dmac_chan_readl_lo(dmac, channel, CTL));
 964 +
 965 +       if (chan->state == CH_STATE_BUSY) {
 966 +               clear_channel_bit(dmac, CH_EN, channel);
 967 +               cleanup_channel(dmac, &dmac->channel[channel]);
 968 +       }
 969 +
 970 +       return 0;
 971 +}
 972 +
 973 +
 974 +static void dmac_block_complete(struct dw_dma_controller *dmac)
 975 +{
 976 +       struct dw_dma_channel *chan;
 977 +       unsigned long status, chanid;
 978 +
 979 +       status = dmac_readl_lo(dmac, STATUS_BLOCK);
 980 +
 981 +       while (status) {
 982 +               struct dma_request *req;
 983 +               chanid = __ffs(status);
 984 +               chan = &dmac->channel[chanid];
 985 +
 986 +                if (chan->is_cyclic) {
 987 +                       BUG_ON(!chan->req_cyclic
 988 +                              || !chan->req_cyclic->req.block_complete);
 989 +                       req = &chan->req_cyclic->req;
 990 +                } else {
 991 +                       BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
 992 +                       req = &chan->req_sg->req;
 993 +                }
 994 +               dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
 995 +               req->block_complete(req);
 996 +               status = dmac_readl_lo(dmac, STATUS_BLOCK);
 997 +       }
 998 +}
 999 +
1000 +static void dmac_xfer_complete(struct dw_dma_controller *dmac)
1001 +{
1002 +       struct dw_dma_channel *chan;
1003 +       struct dma_request *req;
1004 +       unsigned long status, chanid;
1005 +
1006 +       status = dmac_readl_lo(dmac, STATUS_XFER);
1007 +
1008 +       while (status) {
1009 +               chanid = __ffs(status);
1010 +               chan = &dmac->channel[chanid];
1011 +
1012 +               dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
1013 +
1014 +                req = &chan->req_sg->req;
1015 +                BUG_ON(!req);
1016 +                cleanup_channel(dmac, chan);
1017 +                if (req->xfer_complete)
1018 +                       req->xfer_complete(req);
1019 +
1020 +               status = dmac_readl_lo(dmac, STATUS_XFER);
1021 +       }
1022 +}
1023 +
1024 +static void dmac_error(struct dw_dma_controller *dmac)
1025 +{
1026 +       struct dw_dma_channel *chan;
1027 +       unsigned long status, chanid;
1028 +
1029 +       status = dmac_readl_lo(dmac, STATUS_ERROR);
1030 +
1031 +       while (status) {
1032 +               struct dma_request *req;
1033 +
1034 +               chanid = __ffs(status);
1035 +               chan = &dmac->channel[chanid];
1036 +
1037 +               dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
1038 +               clear_channel_bit(dmac, CH_EN, chanid);
1039 +
1040 +                if (chan->is_cyclic) {
1041 +                       BUG_ON(!chan->req_cyclic);
1042 +                       req = &chan->req_cyclic->req;
1043 +                } else {
1044 +                       BUG_ON(!chan->req_sg);
1045 +                       req = &chan->req_sg->req;
1046 +                }
1047 +
1048 +               cleanup_channel(dmac, chan);
1049 +               if (req->error)
1050 +                       req->error(req);
1051 +
1052 +               status = dmac_readl_lo(dmac, STATUS_XFER);
1053 +       }
1054 +}
1055 +
1056 +static irqreturn_t dmac_interrupt(int irq, void *dev_id)
1057 +{
1058 +       struct dw_dma_controller *dmac = dev_id;
1059 +       unsigned long status;
1060 +       int ret = IRQ_NONE;
1061 +
1062 +       spin_lock(&dmac->lock);
1063 +
1064 +       status = dmac_readl_lo(dmac, STATUS_INT);
1065 +
1066 +       while (status) {
1067 +               ret = IRQ_HANDLED;
1068 +               if (status & 0x10)
1069 +                       dmac_error(dmac);
1070 +               if (status & 0x02)
1071 +                       dmac_block_complete(dmac);
1072 +               if (status & 0x01)
1073 +                       dmac_xfer_complete(dmac);
1074 +
1075 +               status = dmac_readl_lo(dmac, STATUS_INT);
1076 +       }
1077 +
1078 +       spin_unlock(&dmac->lock);
1079 +       return ret;
1080 +}
1081 +
1082 +static int __devinit dmac_probe(struct platform_device *pdev)
1083 +{
1084 +       struct dw_dma_controller *dmac;
1085 +       struct resource *regs;
1086 +       int ret;
1087 +
1088 +       regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1089 +       if (!regs)
1090 +               return -ENXIO;
1091 +
1092 +       dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
1093 +       if (!dmac)
1094 +               return -ENOMEM;
1095 +       memset(dmac, 0, sizeof(*dmac));
1096 +
1097 +       dmac->hclk = clk_get(&pdev->dev, "hclk");
1098 +       if (IS_ERR(dmac->hclk)) {
1099 +               ret = PTR_ERR(dmac->hclk);
1100 +               goto out_free_dmac;
1101 +       }
1102 +       clk_enable(dmac->hclk);
1103 +
1104 +       ret = -ENOMEM;
1105 +       dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
1106 +                                        sizeof(struct dw_dma_lli), 4, 0);
1107 +       if (!dmac->lli_pool)
1108 +               goto out_disable_clk;
1109 +
1110 +       spin_lock_init(&dmac->lock);
1111 +       dmac->dma.dev = &pdev->dev;
1112 +       dmac->dma.alloc_channel = dmac_alloc_channel;
1113 +       dmac->dma.release_channel = dmac_release_channel;
1114 +       dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
1115 +       dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
1116 +       dmac->dma.start_request = dmac_start_request;
1117 +       dmac->dma.stop_request = dmac_stop_request;
1118 +       dmac->dma.get_current_pos = dmac_get_current_pos;
1119 +
1120 +       dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
1121 +       if (!dmac->regs)
1122 +               goto out_free_pool;
1123 +
1124 +       ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
1125 +                         SA_SAMPLE_RANDOM, pdev->name, dmac);
1126 +       if (ret)
1127 +               goto out_unmap_regs;
1128 +
1129 +       /* Enable the DMA controller */
1130 +       dmac_writel_lo(dmac, CFG, 1);
1131 +
1132 +       register_dma_controller(&dmac->dma);
1133 +
1134 +       printk(KERN_INFO
1135 +              "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
1136 +              dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
1137 +
1138 +       return 0;
1139 +
1140 +out_unmap_regs:
1141 +       iounmap(dmac->regs);
1142 +out_free_pool:
1143 +       dma_pool_destroy(dmac->lli_pool);
1144 +out_disable_clk:
1145 +       clk_disable(dmac->hclk);
1146 +       clk_put(dmac->hclk);
1147 +out_free_dmac:
1148 +       kfree(dmac);
1149 +       return ret;
1150 +}
1151 +
1152 +static struct platform_driver dmac_driver = {
1153 +       .probe          = dmac_probe,
1154 +       .driver         = {
1155 +               .name           = "dmaca",
1156 +       },
1157 +};
1158 +
1159 +static int __init dmac_init(void)
1160 +{
1161 +       return platform_driver_register(&dmac_driver);
1162 +}
1163 +subsys_initcall(dmac_init);
1164 +
1165 +static void __exit dmac_exit(void)
1166 +{
1167 +       platform_driver_unregister(&dmac_driver);
1168 +}
1169 +module_exit(dmac_exit);
1170 +
1171 +MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
1172 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
1173 +MODULE_LICENSE("GPL");
1174 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/drivers/dw-dmac.h avr32-git/arch/avr32/drivers/dw-dmac.h
1175 --- linux-2.6.21.3/arch/avr32/drivers/dw-dmac.h 1970-01-01 01:00:00.000000000 +0100
1176 +++ avr32-git/arch/avr32/drivers/dw-dmac.h      2007-06-06 11:33:46.000000000 +0200
1177 @@ -0,0 +1,42 @@
1178 +/*
1179 + * Driver for the Synopsys DesignWare DMA Controller
1180 + *
1181 + * Copyright (C) 2005-2006 Atmel Corporation
1182 + *
1183 + * This program is free software; you can redistribute it and/or modify
1184 + * it under the terms of the GNU General Public License version 2 as
1185 + * published by the Free Software Foundation.
1186 + */
1187 +#ifndef __AVR32_DW_DMAC_H__
1188 +#define __AVR32_DW_DMAC_H__
1189 +
1190 +#define DW_DMAC_CFG            0x398
1191 +#define DW_DMAC_CH_EN          0x3a0
1192 +
1193 +#define DW_DMAC_STATUS_XFER    0x2e8
1194 +#define DW_DMAC_STATUS_BLOCK   0x2f0
1195 +#define DW_DMAC_STATUS_ERROR   0x308
1196 +
1197 +#define DW_DMAC_MASK_XFER      0x310
1198 +#define DW_DMAC_MASK_BLOCK     0x318
1199 +#define DW_DMAC_MASK_ERROR     0x330
1200 +
1201 +#define DW_DMAC_CLEAR_XFER     0x338
1202 +#define DW_DMAC_CLEAR_BLOCK    0x340
1203 +#define DW_DMAC_CLEAR_ERROR    0x358
1204 +
1205 +#define DW_DMAC_STATUS_INT     0x360
1206 +
1207 +#define DW_DMAC_CHAN_SAR       0x000
1208 +#define DW_DMAC_CHAN_DAR       0x008
1209 +#define DW_DMAC_CHAN_LLP       0x010
1210 +#define DW_DMAC_CHAN_CTL       0x018
1211 +#define DW_DMAC_CHAN_SSTAT     0x020
1212 +#define DW_DMAC_CHAN_DSTAT     0x028
1213 +#define DW_DMAC_CHAN_SSTATAR   0x030
1214 +#define DW_DMAC_CHAN_DSTATAR   0x038
1215 +#define DW_DMAC_CHAN_CFG       0x040
1216 +#define DW_DMAC_CHAN_SGR       0x048
1217 +#define DW_DMAC_CHAN_DSR       0x050
1218 +
1219 +#endif /* __AVR32_DW_DMAC_H__ */
1220 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/drivers/Makefile avr32-git/arch/avr32/drivers/Makefile
1221 --- linux-2.6.21.3/arch/avr32/drivers/Makefile  1970-01-01 01:00:00.000000000 +0100
1222 +++ avr32-git/arch/avr32/drivers/Makefile       2007-06-06 11:33:46.000000000 +0200
1223 @@ -0,0 +1 @@
1224 +obj-$(CONFIG_DW_DMAC)                  += dw-dmac.o
1225 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/Kconfig avr32-git/arch/avr32/Kconfig
1226 --- linux-2.6.21.3/arch/avr32/Kconfig   2007-05-24 23:22:47.000000000 +0200
1227 +++ avr32-git/arch/avr32/Kconfig        2007-06-06 11:33:46.000000000 +0200
1228 @@ -57,9 +57,6 @@
1229         bool
1230         default n
1231
1232 -config GENERIC_BUST_SPINLOCK
1233 -       bool
1234 -
1235  config GENERIC_HWEIGHT
1236         bool
1237         default y
1238 @@ -68,6 +65,11 @@
1239         bool
1240         default y
1241
1242 +config GENERIC_BUG
1243 +       bool
1244 +       default y
1245 +       depends on BUG
1246 +
1247  source "init/Kconfig"
1248
1249  menu "System Type and features"
1250 @@ -106,6 +108,9 @@
1251  config BOARD_ATSTK1000
1252         bool "ATSTK1000 evaluation board"
1253         select BOARD_ATSTK1002 if CPU_AT32AP7000
1254 +
1255 +config BOARD_ATNGW100
1256 +       bool "ATNGW100 Network Gateway"
1257  endchoice
1258
1259  choice
1260 @@ -116,6 +121,8 @@
1261         bool "U-Boot (or similar) bootloader"
1262  endchoice
1263
1264 +source "arch/avr32/mach-at32ap/Kconfig"
1265 +
1266  config LOAD_ADDRESS
1267         hex
1268         default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
1269 @@ -164,6 +171,10 @@
1270           enabling Nexus-compliant debuggers to keep track of the PID of the
1271           currently executing task.
1272
1273 +config DW_DMAC
1274 +       tristate "Synopsys DesignWare DMA Controller support"
1275 +       default y if CPU_AT32AP7000
1276 +
1277  # FPU emulation goes here
1278
1279  source "kernel/Kconfig.hz"
1280 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/cpu.c avr32-git/arch/avr32/kernel/cpu.c
1281 --- linux-2.6.21.3/arch/avr32/kernel/cpu.c      2007-05-24 23:22:47.000000000 +0200
1282 +++ avr32-git/arch/avr32/kernel/cpu.c   2007-06-06 11:33:46.000000000 +0200
1283 @@ -209,16 +209,17 @@
1284  void __init setup_processor(void)
1285  {
1286         unsigned long config0, config1;
1287 +       unsigned long features;
1288         unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
1289         unsigned tmp;
1290
1291 -       config0 = sysreg_read(CONFIG0); /* 0x0000013e; */
1292 -       config1 = sysreg_read(CONFIG1); /* 0x01f689a2; */
1293 -       cpu_id = config0 >> 24;
1294 -       cpu_rev = (config0 >> 16) & 0xff;
1295 -       arch_id = (config0 >> 13) & 0x07;
1296 -       arch_rev = (config0 >> 10) & 0x07;
1297 -       mmu_type = (config0 >> 7) & 0x03;
1298 +       config0 = sysreg_read(CONFIG0);
1299 +       config1 = sysreg_read(CONFIG1);
1300 +       cpu_id = SYSREG_BFEXT(PROCESSORID, config0);
1301 +       cpu_rev = SYSREG_BFEXT(PROCESSORREVISION, config0);
1302 +       arch_id = SYSREG_BFEXT(AT, config0);
1303 +       arch_rev = SYSREG_BFEXT(AR, config0);
1304 +       mmu_type = SYSREG_BFEXT(MMUT, config0);
1305
1306         boot_cpu_data.arch_type = arch_id;
1307         boot_cpu_data.cpu_type = cpu_id;
1308 @@ -226,16 +227,16 @@
1309         boot_cpu_data.cpu_revision = cpu_rev;
1310         boot_cpu_data.tlb_config = mmu_type;
1311
1312 -       tmp = (config1 >> 13) & 0x07;
1313 +       tmp = SYSREG_BFEXT(ILSZ, config1);
1314         if (tmp) {
1315 -               boot_cpu_data.icache.ways = 1 << ((config1 >> 10) & 0x07);
1316 -               boot_cpu_data.icache.sets = 1 << ((config1 >> 16) & 0x0f);
1317 +               boot_cpu_data.icache.ways = 1 << SYSREG_BFEXT(IASS, config1);
1318 +               boot_cpu_data.icache.sets = 1 << SYSREG_BFEXT(ISET, config1);
1319                 boot_cpu_data.icache.linesz = 1 << (tmp + 1);
1320         }
1321 -       tmp = (config1 >> 3) & 0x07;
1322 +       tmp = SYSREG_BFEXT(DLSZ, config1);
1323         if (tmp) {
1324 -               boot_cpu_data.dcache.ways = 1 << (config1 & 0x07);
1325 -               boot_cpu_data.dcache.sets = 1 << ((config1 >> 6) & 0x0f);
1326 +               boot_cpu_data.dcache.ways = 1 << SYSREG_BFEXT(DASS, config1);
1327 +               boot_cpu_data.dcache.sets = 1 << SYSREG_BFEXT(DSET, config1);
1328                 boot_cpu_data.dcache.linesz = 1 << (tmp + 1);
1329         }
1330
1331 @@ -250,16 +251,39 @@
1332                 cpu_names[cpu_id], cpu_id, cpu_rev,
1333                 arch_names[arch_id], arch_rev);
1334         printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
1335 +
1336         printk ("CPU: features:");
1337 -       if (config0 & (1 << 6))
1338 -               printk(" fpu");
1339 -       if (config0 & (1 << 5))
1340 -               printk(" java");
1341 -       if (config0 & (1 << 4))
1342 -               printk(" perfctr");
1343 -       if (config0 & (1 << 3))
1344 +       features = 0;
1345 +       if (config0 & SYSREG_BIT(CONFIG0_R)) {
1346 +               features |= AVR32_FEATURE_RMW;
1347 +               printk(" rmw");
1348 +       }
1349 +       if (config0 & SYSREG_BIT(CONFIG0_D)) {
1350 +               features |= AVR32_FEATURE_DSP;
1351 +               printk(" dsp");
1352 +       }
1353 +       if (config0 & SYSREG_BIT(CONFIG0_S)) {
1354 +               features |= AVR32_FEATURE_SIMD;
1355 +               printk(" simd");
1356 +       }
1357 +       if (config0 & SYSREG_BIT(CONFIG0_O)) {
1358 +               features |= AVR32_FEATURE_OCD;
1359                 printk(" ocd");
1360 +       }
1361 +       if (config0 & SYSREG_BIT(CONFIG0_P)) {
1362 +               features |= AVR32_FEATURE_PCTR;
1363 +               printk(" perfctr");
1364 +       }
1365 +       if (config0 & SYSREG_BIT(CONFIG0_J)) {
1366 +               features |= AVR32_FEATURE_JAVA;
1367 +               printk(" java");
1368 +       }
1369 +       if (config0 & SYSREG_BIT(CONFIG0_F)) {
1370 +               features |= AVR32_FEATURE_FPU;
1371 +               printk(" fpu");
1372 +       }
1373         printk("\n");
1374 +       boot_cpu_data.features = features;
1375  }
1376
1377  #ifdef CONFIG_PROC_FS
1378 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/dma-controller.c avr32-git/arch/avr32/kernel/dma-controller.c
1379 --- linux-2.6.21.3/arch/avr32/kernel/dma-controller.c   1970-01-01 01:00:00.000000000 +0100
1380 +++ avr32-git/arch/avr32/kernel/dma-controller.c        2007-06-06 11:33:46.000000000 +0200
1381 @@ -0,0 +1,34 @@
1382 +/*
1383 + * Preliminary DMA controller framework for AVR32
1384 + *
1385 + * Copyright (C) 2005-2006 Atmel Corporation
1386 + *
1387 + * This program is free software; you can redistribute it and/or modify
1388 + * it under the terms of the GNU General Public License version 2 as
1389 + * published by the Free Software Foundation.
1390 + */
1391 +#include <asm/dma-controller.h>
1392 +
1393 +static LIST_HEAD(controllers);
1394 +
1395 +int register_dma_controller(struct dma_controller *dmac)
1396 +{
1397 +       static int next_id;
1398 +
1399 +       dmac->id = next_id++;
1400 +       list_add_tail(&dmac->list, &controllers);
1401 +
1402 +       return 0;
1403 +}
1404 +EXPORT_SYMBOL(register_dma_controller);
1405 +
1406 +struct dma_controller *find_dma_controller(int id)
1407 +{
1408 +       struct dma_controller *dmac;
1409 +
1410 +       list_for_each_entry(dmac, &controllers, list)
1411 +               if (dmac->id == id)
1412 +                       return dmac;
1413 +       return NULL;
1414 +}
1415 +EXPORT_SYMBOL(find_dma_controller);
1416 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/entry-avr32b.S avr32-git/arch/avr32/kernel/entry-avr32b.S
1417 --- linux-2.6.21.3/arch/avr32/kernel/entry-avr32b.S     2007-05-24 23:22:47.000000000 +0200
1418 +++ avr32-git/arch/avr32/kernel/entry-avr32b.S  2007-06-06 11:33:46.000000000 +0200
1419 @@ -100,55 +100,49 @@
1420
1421         .global tlb_miss_common
1422  tlb_miss_common:
1423 -       mfsr    r0, SYSREG_PTBR
1424 -       mfsr    r1, SYSREG_TLBEAR
1425 +       mfsr    r0, SYSREG_TLBEAR
1426 +       mfsr    r1, SYSREG_PTBR
1427
1428         /* Is it the vmalloc space? */
1429 -       bld     r1, 31
1430 +       bld     r0, 31
1431         brcs    handle_vmalloc_miss
1432
1433         /* First level lookup */
1434  pgtbl_lookup:
1435 -       lsr     r2, r1, PGDIR_SHIFT
1436 -       ld.w    r0, r0[r2 << 2]
1437 -       bld     r0, _PAGE_BIT_PRESENT
1438 +       lsr     r2, r0, PGDIR_SHIFT
1439 +       ld.w    r3, r1[r2 << 2]
1440 +       bfextu  r1, r0, PAGE_SHIFT, PGDIR_SHIFT - PAGE_SHIFT
1441 +       bld     r3, _PAGE_BIT_PRESENT
1442         brcc    page_table_not_present
1443
1444 -       /* TODO: Check access rights on page table if necessary */
1445 -
1446         /* Translate to virtual address in P1. */
1447 -       andl    r0, 0xf000
1448 -       sbr     r0, 31
1449 +       andl    r3, 0xf000
1450 +       sbr     r3, 31
1451
1452         /* Second level lookup */
1453 -       lsl     r1, (32 - PGDIR_SHIFT)
1454 -       lsr     r1, (32 - PGDIR_SHIFT) + PAGE_SHIFT
1455 -       add     r2, r0, r1 << 2
1456 -       ld.w    r1, r2[0]
1457 -       bld     r1, _PAGE_BIT_PRESENT
1458 +       ld.w    r2, r3[r1 << 2]
1459 +       mfsr    r0, SYSREG_TLBARLO
1460 +       bld     r2, _PAGE_BIT_PRESENT
1461         brcc    page_not_present
1462
1463         /* Mark the page as accessed */
1464 -       sbr     r1, _PAGE_BIT_ACCESSED
1465 -       st.w    r2[0], r1
1466 +       sbr     r2, _PAGE_BIT_ACCESSED
1467 +       st.w    r3[r1 << 2], r2
1468
1469         /* Drop software flags */
1470 -       andl    r1, _PAGE_FLAGS_HARDWARE_MASK & 0xffff
1471 -       mtsr    SYSREG_TLBELO, r1
1472 +       andl    r2, _PAGE_FLAGS_HARDWARE_MASK & 0xffff
1473 +       mtsr    SYSREG_TLBELO, r2
1474
1475         /* Figure out which entry we want to replace */
1476 -       mfsr    r0, SYSREG_TLBARLO
1477 +       mfsr    r1, SYSREG_MMUCR
1478         clz     r2, r0
1479         brcc    1f
1480 -       mov     r1, -1                  /* All entries have been accessed, */
1481 -       mtsr    SYSREG_TLBARLO, r1      /* so reset TLBAR */
1482 -       mov     r2, 0                   /* and start at 0 */
1483 -1:     mfsr    r1, SYSREG_MMUCR
1484 -       lsl     r2, 14
1485 -       andl    r1, 0x3fff, COH
1486 -       or      r1, r2
1487 -       mtsr    SYSREG_MMUCR, r1
1488 +       mov     r3, -1                  /* All entries have been accessed, */
1489 +       mov     r2, 0                   /* so start at 0 */
1490 +       mtsr    SYSREG_TLBARLO, r3      /* and reset TLBAR */
1491
1492 +1:     bfins   r1, r2, SYSREG_DRP_OFFSET, SYSREG_DRP_SIZE
1493 +       mtsr    SYSREG_MMUCR, r1
1494         tlbw
1495
1496         tlbmiss_restore
1497 @@ -156,8 +150,8 @@
1498
1499  handle_vmalloc_miss:
1500         /* Simply do the lookup in init's page table */
1501 -       mov     r0, lo(swapper_pg_dir)
1502 -       orh     r0, hi(swapper_pg_dir)
1503 +       mov     r1, lo(swapper_pg_dir)
1504 +       orh     r1, hi(swapper_pg_dir)
1505         rjmp    pgtbl_lookup
1506
1507
1508 @@ -340,12 +334,34 @@
1509  do_nmi_ll:
1510         sub     sp, 4
1511         stmts   --sp, r0-lr
1512 -       /* FIXME: Make sure RAR_NMI and RSR_NMI are pushed instead of *_EX */
1513 -       rcall   save_full_context_ex
1514 +       mfsr    r9, SYSREG_RSR_NMI
1515 +       mfsr    r8, SYSREG_RAR_NMI
1516 +       bfextu  r0, r9, MODE_SHIFT, 3
1517 +       brne    2f
1518 +
1519 +1:     pushm   r8, r9  /* PC and SR */
1520         mfsr    r12, SYSREG_ECR
1521         mov     r11, sp
1522         rcall   do_nmi
1523 -       rjmp    bad_return
1524 +       popm    r8-r9
1525 +       mtsr    SYSREG_RAR_NMI, r8
1526 +       tst     r0, r0
1527 +       mtsr    SYSREG_RSR_NMI, r9
1528 +       brne    3f
1529 +
1530 +       ldmts   sp++, r0-lr
1531 +       sub     sp, -4          /* skip r12_orig */
1532 +       rete
1533 +
1534 +2:     sub     r10, sp, -(FRAME_SIZE_FULL - REG_LR)
1535 +       stdsp   sp[4], r10      /* replace saved SP */
1536 +       rjmp    1b
1537 +
1538 +3:     popm    lr
1539 +       sub     sp, -4          /* skip sp */
1540 +       popm    r0-r12
1541 +       sub     sp, -4          /* skip r12_orig */
1542 +       rete
1543
1544  handle_address_fault:
1545         sub     sp, 4
1546 @@ -630,9 +646,12 @@
1547         rcall   do_IRQ
1548
1549         lddsp   r4, sp[REG_SR]
1550 -       andh    r4, (MODE_MASK >> 16), COH
1551 +       bfextu  r4, r4, SYSREG_M0_OFFSET, 3
1552 +       cp.w    r4, MODE_SUPERVISOR >> SYSREG_M0_OFFSET
1553 +       breq    2f
1554 +       cp.w    r4, MODE_USER >> SYSREG_M0_OFFSET
1555  #ifdef CONFIG_PREEMPT
1556 -       brne    2f
1557 +       brne    3f
1558  #else
1559         brne    1f
1560  #endif
1561 @@ -649,9 +668,18 @@
1562         sub     sp, -4          /* ignore r12_orig */
1563         rete
1564
1565 +2:     get_thread_info r0
1566 +       ld.w    r1, r0[TI_flags]
1567 +       bld     r1, TIF_CPU_GOING_TO_SLEEP
1568  #ifdef CONFIG_PREEMPT
1569 -2:
1570 -       get_thread_info r0
1571 +       brcc    3f
1572 +#else
1573 +       brcc    1b
1574 +#endif
1575 +       sub     r1, pc, . - cpu_idle_skip_sleep
1576 +       stdsp   sp[REG_PC], r1
1577 +#ifdef CONFIG_PREEMPT
1578 +3:     get_thread_info r0
1579         ld.w    r2, r0[TI_preempt_count]
1580         cp.w    r2, 0
1581         brne    1b
1582 @@ -662,12 +690,32 @@
1583         bld     r4, SYSREG_GM_OFFSET
1584         brcs    1b
1585         rcall   preempt_schedule_irq
1586 -       rjmp    1b
1587  #endif
1588 +       rjmp    1b
1589         .endm
1590
1591         .section .irq.text,"ax",@progbits
1592
1593 +.global cpu_idle_sleep
1594 +cpu_idle_sleep:
1595 +       mask_interrupts
1596 +       get_thread_info r8
1597 +       ld.w    r9, r8[TI_flags]
1598 +       bld     r9, TIF_NEED_RESCHED
1599 +       brcs    cpu_idle_enable_int_and_exit
1600 +       sbr     r9, TIF_CPU_GOING_TO_SLEEP
1601 +       st.w    r8[TI_flags], r9
1602 +       unmask_interrupts
1603 +       sleep 0
1604 +cpu_idle_skip_sleep:
1605 +       mask_interrupts
1606 +       ld.w    r9, r8[TI_flags]
1607 +       cbr     r9, TIF_CPU_GOING_TO_SLEEP
1608 +       st.w    r8[TI_flags], r9
1609 +cpu_idle_enable_int_and_exit:
1610 +       unmask_interrupts
1611 +       retal   r12
1612 +
1613         .global irq_level0
1614         .global irq_level1
1615         .global irq_level2
1616 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/irq.c avr32-git/arch/avr32/kernel/irq.c
1617 --- linux-2.6.21.3/arch/avr32/kernel/irq.c      2007-05-24 23:22:47.000000000 +0200
1618 +++ avr32-git/arch/avr32/kernel/irq.c   2007-06-06 11:33:46.000000000 +0200
1619 @@ -7,15 +7,6 @@
1620   * This program is free software; you can redistribute it and/or modify
1621   * it under the terms of the GNU General Public License version 2 as
1622   * published by the Free Software Foundation.
1623 - *
1624 - * This file contains the code used by various IRQ handling routines:
1625 - * asking for different IRQ's should be done through these routines
1626 - * instead of just grabbing them. Thus setups with different IRQ numbers
1627 - * shouldn't result in any weird surprises, and installing new handlers
1628 - * should be easier.
1629 - *
1630 - * IRQ's are in fact implemented a bit like signal handlers for the kernel.
1631 - * Naturally it's not a 1:1 relation, but there are similarities.
1632   */
1633
1634  #include <linux/interrupt.h>
1635 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/kprobes.c avr32-git/arch/avr32/kernel/kprobes.c
1636 --- linux-2.6.21.3/arch/avr32/kernel/kprobes.c  2007-05-24 23:22:47.000000000 +0200
1637 +++ avr32-git/arch/avr32/kernel/kprobes.c       2007-06-06 11:33:46.000000000 +0200
1638 @@ -179,7 +179,7 @@
1639         return 1;
1640  }
1641
1642 -static int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
1643 +int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
1644  {
1645         struct kprobe *cur = kprobe_running();
1646
1647 @@ -216,11 +216,6 @@
1648                 if (post_kprobe_handler(args->regs))
1649                         ret = NOTIFY_STOP;
1650                 break;
1651 -       case DIE_FAULT:
1652 -               if (kprobe_running()
1653 -                   && kprobe_fault_handler(args->regs, args->trapnr))
1654 -                       ret = NOTIFY_STOP;
1655 -               break;
1656         default:
1657                 break;
1658         }
1659 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/Makefile avr32-git/arch/avr32/kernel/Makefile
1660 --- linux-2.6.21.3/arch/avr32/kernel/Makefile   2007-05-24 23:22:47.000000000 +0200
1661 +++ avr32-git/arch/avr32/kernel/Makefile        2007-06-06 11:33:46.000000000 +0200
1662 @@ -9,6 +9,7 @@
1663  obj-y                          += setup.o traps.o semaphore.o ptrace.o
1664  obj-y                          += signal.o sys_avr32.o process.o time.o
1665  obj-y                          += init_task.o switch_to.o cpu.o
1666 +obj-y                          += dma-controller.o
1667  obj-$(CONFIG_MODULES)          += module.o avr32_ksyms.o
1668  obj-$(CONFIG_KPROBES)          += kprobes.o
1669
1670 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/module.c avr32-git/arch/avr32/kernel/module.c
1671 --- linux-2.6.21.3/arch/avr32/kernel/module.c   2007-05-24 23:22:47.000000000 +0200
1672 +++ avr32-git/arch/avr32/kernel/module.c        2007-06-06 11:33:46.000000000 +0200
1673 @@ -12,10 +12,11 @@
1674   * published by the Free Software Foundation.
1675   */
1676
1677 -#include <linux/moduleloader.h>
1678 -#include <linux/module.h>
1679 -#include <linux/kernel.h>
1680 +#include <linux/bug.h>
1681  #include <linux/elf.h>
1682 +#include <linux/kernel.h>
1683 +#include <linux/module.h>
1684 +#include <linux/moduleloader.h>
1685  #include <linux/vmalloc.h>
1686
1687  void *module_alloc(unsigned long size)
1688 @@ -315,10 +316,10 @@
1689         vfree(module->arch.syminfo);
1690         module->arch.syminfo = NULL;
1691
1692 -       return 0;
1693 +       return module_bug_finalize(hdr, sechdrs, module);
1694  }
1695
1696  void module_arch_cleanup(struct module *module)
1697  {
1698 -
1699 +       module_bug_cleanup(module);
1700  }
1701 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/process.c avr32-git/arch/avr32/kernel/process.c
1702 --- linux-2.6.21.3/arch/avr32/kernel/process.c  2007-05-24 23:22:47.000000000 +0200
1703 +++ avr32-git/arch/avr32/kernel/process.c       2007-06-06 11:33:46.000000000 +0200
1704 @@ -11,6 +11,7 @@
1705  #include <linux/fs.h>
1706  #include <linux/ptrace.h>
1707  #include <linux/reboot.h>
1708 +#include <linux/uaccess.h>
1709  #include <linux/unistd.h>
1710
1711  #include <asm/sysreg.h>
1712 @@ -19,6 +20,8 @@
1713  void (*pm_power_off)(void) = NULL;
1714  EXPORT_SYMBOL(pm_power_off);
1715
1716 +extern void cpu_idle_sleep(void);
1717 +
1718  /*
1719   * This file handles the architecture-dependent parts of process handling..
1720   */
1721 @@ -27,9 +30,8 @@
1722  {
1723         /* endless idle loop with no priority at all */
1724         while (1) {
1725 -               /* TODO: Enter sleep mode */
1726                 while (!need_resched())
1727 -                       cpu_relax();
1728 +                       cpu_idle_sleep();
1729                 preempt_enable_no_resched();
1730                 schedule();
1731                 preempt_disable();
1732 @@ -114,39 +116,178 @@
1733         /* do nothing */
1734  }
1735
1736 +static void dump_mem(const char *str, const char *log_lvl,
1737 +                    unsigned long bottom, unsigned long top)
1738 +{
1739 +       unsigned long p;
1740 +       int i;
1741 +
1742 +       printk("%s%s(0x%08lx to 0x%08lx)\n", log_lvl, str, bottom, top);
1743 +
1744 +       for (p = bottom & ~31; p < top; ) {
1745 +               printk("%s%04lx: ", log_lvl, p & 0xffff);
1746 +
1747 +               for (i = 0; i < 8; i++, p += 4) {
1748 +                       unsigned int val;
1749 +
1750 +                       if (p < bottom || p >= top)
1751 +                               printk("         ");
1752 +                       else {
1753 +                               if (__get_user(val, (unsigned int __user *)p)) {
1754 +                                       printk("\n");
1755 +                                       goto out;
1756 +                               }
1757 +                               printk("%08x ", val);
1758 +                       }
1759 +               }
1760 +               printk("\n");
1761 +       }
1762 +
1763 +out:
1764 +       return;
1765 +}
1766 +
1767 +static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p)
1768 +{
1769 +       return (p > (unsigned long)tinfo)
1770 +               && (p < (unsigned long)tinfo + THREAD_SIZE - 3);
1771 +}
1772 +
1773 +#ifdef CONFIG_FRAME_POINTER
1774 +static void show_trace_log_lvl(struct task_struct *tsk, unsigned long *sp,
1775 +                              struct pt_regs *regs, const char *log_lvl)
1776 +{
1777 +       unsigned long lr, fp;
1778 +       struct thread_info *tinfo;
1779 +
1780 +       if (regs)
1781 +               fp = regs->r7;
1782 +       else if (tsk == current)
1783 +               asm("mov %0, r7" : "=r"(fp));
1784 +       else
1785 +               fp = tsk->thread.cpu_context.r7;
1786 +
1787 +       /*
1788 +        * Walk the stack as long as the frame pointer (a) is within
1789 +        * the kernel stack of the task, and (b) it doesn't move
1790 +        * downwards.
1791 +        */
1792 +       tinfo = task_thread_info(tsk);
1793 +       printk("%sCall trace:\n", log_lvl);
1794 +       while (valid_stack_ptr(tinfo, fp)) {
1795 +               unsigned long new_fp;
1796 +
1797 +               lr = *(unsigned long *)fp;
1798 +#ifdef CONFIG_KALLSYMS
1799 +               printk("%s [<%08lx>] ", log_lvl, lr);
1800 +#else
1801 +               printk(" [<%08lx>] ", lr);
1802 +#endif
1803 +               print_symbol("%s\n", lr);
1804 +
1805 +               new_fp = *(unsigned long *)(fp + 4);
1806 +               if (new_fp <= fp)
1807 +                       break;
1808 +               fp = new_fp;
1809 +       }
1810 +       printk("\n");
1811 +}
1812 +#else
1813 +static void show_trace_log_lvl(struct task_struct *tsk, unsigned long *sp,
1814 +                              struct pt_regs *regs, const char *log_lvl)
1815 +{
1816 +       unsigned long addr;
1817 +
1818 +       printk("%sCall trace:\n", log_lvl);
1819 +
1820 +       while (!kstack_end(sp)) {
1821 +               addr = *sp++;
1822 +               if (kernel_text_address(addr)) {
1823 +#ifdef CONFIG_KALLSYMS
1824 +                       printk("%s [<%08lx>] ", log_lvl, addr);
1825 +#else
1826 +                       printk(" [<%08lx>] ", addr);
1827 +#endif
1828 +                       print_symbol("%s\n", addr);
1829 +               }
1830 +       }
1831 +       printk("\n");
1832 +}
1833 +#endif
1834 +
1835 +void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp,
1836 +                       struct pt_regs *regs, const char *log_lvl)
1837 +{
1838 +       struct thread_info *tinfo;
1839 +
1840 +       if (sp == 0) {
1841 +               if (tsk)
1842 +                       sp = tsk->thread.cpu_context.ksp;
1843 +               else
1844 +                       sp = (unsigned long)&tinfo;
1845 +       }
1846 +       if (!tsk)
1847 +               tsk = current;
1848 +
1849 +       tinfo = task_thread_info(tsk);
1850 +
1851 +       if (valid_stack_ptr(tinfo, sp)) {
1852 +               dump_mem("Stack: ", log_lvl, sp,
1853 +                        THREAD_SIZE + (unsigned long)tinfo);
1854 +               show_trace_log_lvl(tsk, (unsigned long *)sp, regs, log_lvl);
1855 +       }
1856 +}
1857 +
1858 +void show_stack(struct task_struct *tsk, unsigned long *stack)
1859 +{
1860 +       show_stack_log_lvl(tsk, (unsigned long)stack, NULL, "");
1861 +}
1862 +
1863 +void dump_stack(void)
1864 +{
1865 +       unsigned long stack;
1866 +
1867 +       show_trace_log_lvl(current, &stack, NULL, "");
1868 +}
1869 +EXPORT_SYMBOL(dump_stack);
1870 +
1871  static const char *cpu_modes[] = {
1872         "Application", "Supervisor", "Interrupt level 0", "Interrupt level 1",
1873         "Interrupt level 2", "Interrupt level 3", "Exception", "NMI"
1874  };
1875
1876 -void show_regs(struct pt_regs *regs)
1877 +void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl)
1878  {
1879         unsigned long sp = regs->sp;
1880         unsigned long lr = regs->lr;
1881         unsigned long mode = (regs->sr & MODE_MASK) >> MODE_SHIFT;
1882
1883 -       if (!user_mode(regs))
1884 +       if (!user_mode(regs)) {
1885                 sp = (unsigned long)regs + FRAME_SIZE_FULL;
1886
1887 -       print_symbol("PC is at %s\n", instruction_pointer(regs));
1888 -       print_symbol("LR is at %s\n", lr);
1889 -       printk("pc : [<%08lx>]    lr : [<%08lx>]    %s\n"
1890 -              "sp : %08lx  r12: %08lx  r11: %08lx\n",
1891 -              instruction_pointer(regs),
1892 -              lr, print_tainted(), sp, regs->r12, regs->r11);
1893 -       printk("r10: %08lx  r9 : %08lx  r8 : %08lx\n",
1894 -              regs->r10, regs->r9, regs->r8);
1895 -       printk("r7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
1896 -              regs->r7, regs->r6, regs->r5, regs->r4);
1897 -       printk("r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
1898 -              regs->r3, regs->r2, regs->r1, regs->r0);
1899 -       printk("Flags: %c%c%c%c%c\n",
1900 +               printk("%s", log_lvl);
1901 +               print_symbol("PC is at %s\n", instruction_pointer(regs));
1902 +               printk("%s", log_lvl);
1903 +               print_symbol("LR is at %s\n", lr);
1904 +       }
1905 +
1906 +       printk("%spc : [<%08lx>]    lr : [<%08lx>]    %s\n"
1907 +              "%ssp : %08lx  r12: %08lx  r11: %08lx\n",
1908 +              log_lvl, instruction_pointer(regs), lr, print_tainted(),
1909 +              log_lvl, sp, regs->r12, regs->r11);
1910 +       printk("%sr10: %08lx  r9 : %08lx  r8 : %08lx\n",
1911 +              log_lvl, regs->r10, regs->r9, regs->r8);
1912 +       printk("%sr7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
1913 +              log_lvl, regs->r7, regs->r6, regs->r5, regs->r4);
1914 +       printk("%sr3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
1915 +              log_lvl, regs->r3, regs->r2, regs->r1, regs->r0);
1916 +       printk("%sFlags: %c%c%c%c%c\n", log_lvl,
1917                regs->sr & SR_Q ? 'Q' : 'q',
1918                regs->sr & SR_V ? 'V' : 'v',
1919                regs->sr & SR_N ? 'N' : 'n',
1920                regs->sr & SR_Z ? 'Z' : 'z',
1921                regs->sr & SR_C ? 'C' : 'c');
1922 -       printk("Mode bits: %c%c%c%c%c%c%c%c%c\n",
1923 +       printk("%sMode bits: %c%c%c%c%c%c%c%c%c\n", log_lvl,
1924                regs->sr & SR_H ? 'H' : 'h',
1925                regs->sr & SR_R ? 'R' : 'r',
1926                regs->sr & SR_J ? 'J' : 'j',
1927 @@ -156,9 +297,21 @@
1928                regs->sr & SR_I1M ? '1' : '.',
1929                regs->sr & SR_I0M ? '0' : '.',
1930                regs->sr & SR_GM ? 'G' : 'g');
1931 -       printk("CPU Mode: %s\n", cpu_modes[mode]);
1932 +       printk("%sCPU Mode: %s\n", log_lvl, cpu_modes[mode]);
1933 +       printk("%sProcess: %s [%d] (task: %p thread: %p)\n",
1934 +              log_lvl, current->comm, current->pid, current,
1935 +              task_thread_info(current));
1936 +}
1937 +
1938 +void show_regs(struct pt_regs *regs)
1939 +{
1940 +       unsigned long sp = regs->sp;
1941 +
1942 +       if (!user_mode(regs))
1943 +               sp = (unsigned long)regs + FRAME_SIZE_FULL;
1944
1945 -       show_trace(NULL, (unsigned long *)sp, regs);
1946 +       show_regs_log_lvl(regs, "");
1947 +       show_trace_log_lvl(current, (unsigned long *)sp, regs, "");
1948  }
1949  EXPORT_SYMBOL(show_regs);
1950
1951 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/setup.c avr32-git/arch/avr32/kernel/setup.c
1952 --- linux-2.6.21.3/arch/avr32/kernel/setup.c    2007-05-24 23:22:47.000000000 +0200
1953 +++ avr32-git/arch/avr32/kernel/setup.c 2007-06-06 11:33:46.000000000 +0200
1954 @@ -8,12 +8,14 @@
1955
1956  #include <linux/clk.h>
1957  #include <linux/init.h>
1958 +#include <linux/initrd.h>
1959  #include <linux/sched.h>
1960  #include <linux/console.h>
1961  #include <linux/ioport.h>
1962  #include <linux/bootmem.h>
1963  #include <linux/fs.h>
1964  #include <linux/module.h>
1965 +#include <linux/pfn.h>
1966  #include <linux/root_dev.h>
1967  #include <linux/cpu.h>
1968  #include <linux/kernel.h>
1969 @@ -30,13 +32,6 @@
1970  extern int root_mountflags;
1971
1972  /*
1973 - * Bootloader-provided information about physical memory
1974 - */
1975 -struct tag_mem_range *mem_phys;
1976 -struct tag_mem_range *mem_reserved;
1977 -struct tag_mem_range *mem_ramdisk;
1978 -
1979 -/*
1980   * Initialize loops_per_jiffy as 5000000 (500MIPS).
1981   * Better make it too large than too small...
1982   */
1983 @@ -48,48 +43,193 @@
1984  static char __initdata command_line[COMMAND_LINE_SIZE];
1985
1986  /*
1987 - * Should be more than enough, but if you have a _really_ complex
1988 - * setup, you might need to increase the size of this...
1989 + * Standard memory resources
1990   */
1991 -static struct tag_mem_range __initdata mem_range_cache[32];
1992 -static unsigned mem_range_next_free;
1993 +static struct resource __initdata kernel_data = {
1994 +       .name   = "Kernel data",
1995 +       .start  = 0,
1996 +       .end    = 0,
1997 +       .flags  = IORESOURCE_MEM,
1998 +};
1999 +static struct resource __initdata kernel_code = {
2000 +       .name   = "Kernel code",
2001 +       .start  = 0,
2002 +       .end    = 0,
2003 +       .flags  = IORESOURCE_MEM,
2004 +       .sibling = &kernel_data,
2005 +};
2006
2007  /*
2008 - * Standard memory resources
2009 + * Available system RAM and reserved regions as singly linked
2010 + * lists. These lists are traversed using the sibling pointer in
2011 + * struct resource and are kept sorted at all times.
2012   */
2013 -static struct resource mem_res[] = {
2014 -       {
2015 -               .name   = "Kernel code",
2016 -               .start  = 0,
2017 -               .end    = 0,
2018 -               .flags  = IORESOURCE_MEM
2019 -       },
2020 -       {
2021 -               .name   = "Kernel data",
2022 -               .start  = 0,
2023 -               .end    = 0,
2024 -               .flags  = IORESOURCE_MEM,
2025 -       },
2026 -};
2027 +static struct resource *__initdata system_ram;
2028 +static struct resource *__initdata reserved = &kernel_code;
2029 +
2030 +/*
2031 + * We need to allocate these before the bootmem allocator is up and
2032 + * running, so we need this "cache". 32 entries are probably enough
2033 + * for all but the most insanely complex systems.
2034 + */
2035 +static struct resource __initdata res_cache[32];
2036 +static unsigned int __initdata res_cache_next_free;
2037 +
2038 +static void __init resource_init(void)
2039 +{
2040 +       struct resource *mem, *res;
2041 +       struct resource *new;
2042 +
2043 +       kernel_code.start = __pa(init_mm.start_code);
2044 +
2045 +       for (mem = system_ram; mem; mem = mem->sibling) {
2046 +               new = alloc_bootmem_low(sizeof(struct resource));
2047 +               memcpy(new, mem, sizeof(struct resource));
2048 +
2049 +               new->sibling = NULL;
2050 +               if (request_resource(&iomem_resource, new))
2051 +                       printk(KERN_WARNING "Bad RAM resource %08x-%08x\n",
2052 +                              mem->start, mem->end);
2053 +       }
2054 +
2055 +       for (res = reserved; res; res = res->sibling) {
2056 +               new = alloc_bootmem_low(sizeof(struct resource));
2057 +               memcpy(new, res, sizeof(struct resource));
2058 +
2059 +               new->sibling = NULL;
2060 +               if (insert_resource(&iomem_resource, new))
2061 +                       printk(KERN_WARNING
2062 +                              "Bad reserved resource %s (%08x-%08x)\n",
2063 +                              res->name, res->start, res->end);
2064 +       }
2065 +}
2066 +
2067 +static void __init
2068 +add_physical_memory(resource_size_t start, resource_size_t end)
2069 +{
2070 +       struct resource *new, *next, **pprev;
2071 +
2072 +       for (pprev = &system_ram, next = system_ram; next;
2073 +            pprev = &next->sibling, next = next->sibling) {
2074 +               if (end < next->start)
2075 +                       break;
2076 +               if (start <= next->end) {
2077 +                       printk(KERN_WARNING
2078 +                              "Warning: Physical memory map is broken\n");
2079 +                       printk(KERN_WARNING
2080 +                              "Warning: %08x-%08x overlaps %08x-%08x\n",
2081 +                              start, end, next->start, next->end);
2082 +                       return;
2083 +               }
2084 +       }
2085 +
2086 +       if (res_cache_next_free >= ARRAY_SIZE(res_cache)) {
2087 +               printk(KERN_WARNING
2088 +                      "Warning: Failed to add physical memory %08x-%08x\n",
2089 +                      start, end);
2090 +               return;
2091 +       }
2092 +
2093 +       new = &res_cache[res_cache_next_free++];
2094 +       new->start = start;
2095 +       new->end = end;
2096 +       new->name = "System RAM";
2097 +       new->flags = IORESOURCE_MEM;
2098 +
2099 +       *pprev = new;
2100 +}
2101 +
2102 +static int __init
2103 +add_reserved_region(resource_size_t start, resource_size_t end,
2104 +                   const char *name)
2105 +{
2106 +       struct resource *new, *next, **pprev;
2107 +
2108 +       if (end < start)
2109 +               return -EINVAL;
2110 +
2111 +       if (res_cache_next_free >= ARRAY_SIZE(res_cache))
2112 +               return -ENOMEM;
2113 +
2114 +       for (pprev = &reserved, next = reserved; next;
2115 +            pprev = &next->sibling, next = next->sibling) {
2116 +               if (end < next->start)
2117 +                       break;
2118 +               if (start <= next->end)
2119 +                       return -EBUSY;
2120 +       }
2121 +
2122 +       new = &res_cache[res_cache_next_free++];
2123 +       new->start = start;
2124 +       new->end = end;
2125 +       new->name = name;
2126 +       new->flags = IORESOURCE_MEM;
2127
2128 -#define kernel_code    mem_res[0]
2129 -#define kernel_data    mem_res[1]
2130 +       *pprev = new;
2131 +
2132 +       return 0;
2133 +}
2134 +
2135 +static unsigned long __init
2136 +find_free_region(const struct resource *mem, resource_size_t size,
2137 +                resource_size_t align)
2138 +{
2139 +       struct resource *res;
2140 +       unsigned long target;
2141 +
2142 +       target = ALIGN(mem->start, align);
2143 +       for (res = reserved; res; res = res->sibling) {
2144 +               if ((target + size) <= res->start)
2145 +                       break;
2146 +               if (target <= res->end)
2147 +                       target = ALIGN(res->end + 1, align);
2148 +       }
2149 +
2150 +       if ((target + size) > (mem->end + 1))
2151 +               return mem->end + 1;
2152 +
2153 +       return target;
2154 +}
2155 +
2156 +static int __init
2157 +alloc_reserved_region(resource_size_t *start, resource_size_t size,
2158 +                     resource_size_t align, const char *name)
2159 +{
2160 +       struct resource *mem;
2161 +       resource_size_t target;
2162 +       int ret;
2163 +
2164 +       for (mem = system_ram; mem; mem = mem->sibling) {
2165 +               target = find_free_region(mem, size, align);
2166 +               if (target <= mem->end) {
2167 +                       ret = add_reserved_region(target, target + size - 1,
2168 +                                                 name);
2169 +                       if (!ret)
2170 +                               *start = target;
2171 +                       return ret;
2172 +               }
2173 +       }
2174 +
2175 +       return -ENOMEM;
2176 +}
2177
2178  /*
2179   * Early framebuffer allocation. Works as follows:
2180   *   - If fbmem_size is zero, nothing will be allocated or reserved.
2181   *   - If fbmem_start is zero when setup_bootmem() is called,
2182 - *     fbmem_size bytes will be allocated from the bootmem allocator.
2183 + *     a block of fbmem_size bytes will be reserved before bootmem
2184 + *     initialization. It will be aligned to the largest page size
2185 + *     that fbmem_size is a multiple of.
2186   *   - If fbmem_start is nonzero, an area of size fbmem_size will be
2187 - *     reserved at the physical address fbmem_start if necessary. If
2188 - *     the area isn't in a memory region known to the kernel, it will
2189 - *     be left alone.
2190 + *     reserved at the physical address fbmem_start if possible. If
2191 + *     it collides with other reserved memory, a different block of
2192 + *     same size will be allocated, just as if fbmem_start was zero.
2193   *
2194   * Board-specific code may use these variables to set up platform data
2195   * for the framebuffer driver if fbmem_size is nonzero.
2196   */
2197 -static unsigned long __initdata fbmem_start;
2198 -static unsigned long __initdata fbmem_size;
2199 +resource_size_t __initdata fbmem_start;
2200 +resource_size_t __initdata fbmem_size;
2201
2202  /*
2203   * "fbmem=xxx[kKmM]" allocates the specified amount of boot memory for
2204 @@ -103,48 +243,42 @@
2205   */
2206  static int __init early_parse_fbmem(char *p)
2207  {
2208 +       int ret;
2209 +       unsigned long align;
2210 +
2211         fbmem_size = memparse(p, &p);
2212 -       if (*p == '@')
2213 +       if (*p == '@') {
2214                 fbmem_start = memparse(p, &p);
2215 -       return 0;
2216 -}
2217 -early_param("fbmem", early_parse_fbmem);
2218 -
2219 -static inline void __init resource_init(void)
2220 -{
2221 -       struct tag_mem_range *region;
2222 -
2223 -       kernel_code.start = __pa(init_mm.start_code);
2224 -       kernel_code.end = __pa(init_mm.end_code - 1);
2225 -       kernel_data.start = __pa(init_mm.end_code);
2226 -       kernel_data.end = __pa(init_mm.brk - 1);
2227 +               ret = add_reserved_region(fbmem_start,
2228 +                                         fbmem_start + fbmem_size - 1,
2229 +                                         "Framebuffer");
2230 +               if (ret) {
2231 +                       printk(KERN_WARNING
2232 +                              "Failed to reserve framebuffer memory\n");
2233 +                       fbmem_start = 0;
2234 +               }
2235 +       }
2236
2237 -       for (region = mem_phys; region; region = region->next) {
2238 -               struct resource *res;
2239 -               unsigned long phys_start, phys_end;
2240 -
2241 -               if (region->size == 0)
2242 -                       continue;
2243 -
2244 -               phys_start = region->addr;
2245 -               phys_end = phys_start + region->size - 1;
2246 -
2247 -               res = alloc_bootmem_low(sizeof(*res));
2248 -               res->name = "System RAM";
2249 -               res->start = phys_start;
2250 -               res->end = phys_end;
2251 -               res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
2252 -
2253 -               request_resource (&iomem_resource, res);
2254 -
2255 -               if (kernel_code.start >= res->start &&
2256 -                   kernel_code.end <= res->end)
2257 -                       request_resource (res, &kernel_code);
2258 -               if (kernel_data.start >= res->start &&
2259 -                   kernel_data.end <= res->end)
2260 -                       request_resource (res, &kernel_data);
2261 +       if (!fbmem_start) {
2262 +               if ((fbmem_size & 0x000fffffUL) == 0)
2263 +                       align = 0x100000;       /* 1 MiB */
2264 +               else if ((fbmem_size & 0x0000ffffUL) == 0)
2265 +                       align = 0x10000;        /* 64 KiB */
2266 +               else
2267 +                       align = 0x1000;         /* 4 KiB */
2268 +
2269 +               ret = alloc_reserved_region(&fbmem_start, fbmem_size,
2270 +                                           align, "Framebuffer");
2271 +               if (ret) {
2272 +                       printk(KERN_WARNING
2273 +                              "Failed to allocate framebuffer memory\n");
2274 +                       fbmem_size = 0;
2275 +               }
2276         }
2277 +
2278 +       return 0;
2279  }
2280 +early_param("fbmem", early_parse_fbmem);
2281
2282  static int __init parse_tag_core(struct tag *tag)
2283  {
2284 @@ -157,11 +291,9 @@
2285  }
2286  __tagtable(ATAG_CORE, parse_tag_core);
2287
2288 -static int __init parse_tag_mem_range(struct tag *tag,
2289 -                                     struct tag_mem_range **root)
2290 +static int __init parse_tag_mem(struct tag *tag)
2291  {
2292 -       struct tag_mem_range *cur, **pprev;
2293 -       struct tag_mem_range *new;
2294 +       unsigned long start, end;
2295
2296         /*
2297          * Ignore zero-sized entries. If we're running standalone, the
2298 @@ -171,34 +303,53 @@
2299         if (tag->u.mem_range.size == 0)
2300                 return 0;
2301
2302 -       /*
2303 -        * Copy the data so the bootmem init code doesn't need to care
2304 -        * about it.
2305 -        */
2306 -       if (mem_range_next_free >= ARRAY_SIZE(mem_range_cache))
2307 -               panic("Physical memory map too complex!\n");
2308 +       start = tag->u.mem_range.addr;
2309 +       end = tag->u.mem_range.addr + tag->u.mem_range.size - 1;
2310
2311 -       new = &mem_range_cache[mem_range_next_free++];
2312 -       *new = tag->u.mem_range;
2313 +       add_physical_memory(start, end);
2314 +       return 0;
2315 +}
2316 +__tagtable(ATAG_MEM, parse_tag_mem);
2317
2318 -       pprev = root;
2319 -       cur = *root;
2320 -       while (cur) {
2321 -               pprev = &cur->next;
2322 -               cur = cur->next;
2323 +static int __init parse_tag_rdimg(struct tag *tag)
2324 +{
2325 +#ifdef CONFIG_INITRD
2326 +       struct tag_mem_range *mem = &tag->u.mem_range;
2327 +       int ret;
2328 +
2329 +       if (initrd_start) {
2330 +               printk(KERN_WARNING
2331 +                      "Warning: Only the first initrd image will be used\n");
2332 +               return 0;
2333         }
2334
2335 -       *pprev = new;
2336 -       new->next = NULL;
2337 +       ret = add_reserved_region(mem->start, mem->start + mem->size - 1,
2338 +                                 "initrd");
2339 +       if (ret) {
2340 +               printk(KERN_WARNING
2341 +                      "Warning: Failed to reserve initrd memory\n");
2342 +               return ret;
2343 +       }
2344 +
2345 +       initrd_start = (unsigned long)__va(mem->addr);
2346 +       initrd_end = initrd_start + mem->size;
2347 +#else
2348 +       printk(KERN_WARNING "RAM disk image present, but "
2349 +              "no initrd support in kernel, ignoring\n");
2350 +#endif
2351
2352         return 0;
2353  }
2354 +__tagtable(ATAG_RDIMG, parse_tag_rdimg);
2355
2356 -static int __init parse_tag_mem(struct tag *tag)
2357 +static int __init parse_tag_rsvd_mem(struct tag *tag)
2358  {
2359 -       return parse_tag_mem_range(tag, &mem_phys);
2360 +       struct tag_mem_range *mem = &tag->u.mem_range;
2361 +
2362 +       return add_reserved_region(mem->addr, mem->addr + mem->size - 1,
2363 +                                  "Reserved");
2364  }
2365 -__tagtable(ATAG_MEM, parse_tag_mem);
2366 +__tagtable(ATAG_RSVD_MEM, parse_tag_rsvd_mem);
2367
2368  static int __init parse_tag_cmdline(struct tag *tag)
2369  {
2370 @@ -207,12 +358,6 @@
2371  }
2372  __tagtable(ATAG_CMDLINE, parse_tag_cmdline);
2373
2374 -static int __init parse_tag_rdimg(struct tag *tag)
2375 -{
2376 -       return parse_tag_mem_range(tag, &mem_ramdisk);
2377 -}
2378 -__tagtable(ATAG_RDIMG, parse_tag_rdimg);
2379 -
2380  static int __init parse_tag_clock(struct tag *tag)
2381  {
2382         /*
2383 @@ -223,12 +368,6 @@
2384  }
2385  __tagtable(ATAG_CLOCK, parse_tag_clock);
2386
2387 -static int __init parse_tag_rsvd_mem(struct tag *tag)
2388 -{
2389 -       return parse_tag_mem_range(tag, &mem_reserved);
2390 -}
2391 -__tagtable(ATAG_RSVD_MEM, parse_tag_rsvd_mem);
2392 -
2393  /*
2394   * Scan the tag table for this tag, and call its parse function. The
2395   * tag table is built by the linker from all the __tagtable
2396 @@ -260,10 +399,137 @@
2397                                t->hdr.tag);
2398  }
2399
2400 +/*
2401 + * Find a free memory region large enough for storing the
2402 + * bootmem bitmap.
2403 + */
2404 +static unsigned long __init
2405 +find_bootmap_pfn(const struct resource *mem)
2406 +{
2407 +       unsigned long bootmap_pages, bootmap_len;
2408 +       unsigned long node_pages = PFN_UP(mem->end - mem->start + 1);
2409 +       unsigned long bootmap_start;
2410 +
2411 +       bootmap_pages = bootmem_bootmap_pages(node_pages);
2412 +       bootmap_len = bootmap_pages << PAGE_SHIFT;
2413 +
2414 +       /*
2415 +        * Find a large enough region without reserved pages for
2416 +        * storing the bootmem bitmap. We can take advantage of the
2417 +        * fact that all lists have been sorted.
2418 +        *
2419 +        * We have to check that we don't collide with any reserved
2420 +        * regions, which includes the kernel image and any RAMDISK
2421 +        * images.
2422 +        */
2423 +       bootmap_start = find_free_region(mem, bootmap_len, PAGE_SIZE);
2424 +
2425 +       return bootmap_start >> PAGE_SHIFT;
2426 +}
2427 +
2428 +#define MAX_LOWMEM     HIGHMEM_START
2429 +#define MAX_LOWMEM_PFN PFN_DOWN(MAX_LOWMEM)
2430 +
2431 +static void __init setup_bootmem(void)
2432 +{
2433 +       unsigned bootmap_size;
2434 +       unsigned long first_pfn, bootmap_pfn, pages;
2435 +       unsigned long max_pfn, max_low_pfn;
2436 +       unsigned node = 0;
2437 +       struct resource *res;
2438 +
2439 +       printk(KERN_INFO "Physical memory:\n");
2440 +       for (res = system_ram; res; res = res->sibling)
2441 +               printk("  %08x-%08x\n", res->start, res->end);
2442 +       printk(KERN_INFO "Reserved memory:\n");
2443 +       for (res = reserved; res; res = res->sibling)
2444 +               printk("  %08x-%08x: %s\n",
2445 +                      res->start, res->end, res->name);
2446 +
2447 +       nodes_clear(node_online_map);
2448 +
2449 +       if (system_ram->sibling)
2450 +               printk(KERN_WARNING "Only using first memory bank\n");
2451 +
2452 +       for (res = system_ram; res; res = NULL) {
2453 +               first_pfn = PFN_UP(res->start);
2454 +               max_low_pfn = max_pfn = PFN_DOWN(res->end + 1);
2455 +               bootmap_pfn = find_bootmap_pfn(res);
2456 +               if (bootmap_pfn > max_pfn)
2457 +                       panic("No space for bootmem bitmap!\n");
2458 +
2459 +               if (max_low_pfn > MAX_LOWMEM_PFN) {
2460 +                       max_low_pfn = MAX_LOWMEM_PFN;
2461 +#ifndef CONFIG_HIGHMEM
2462 +                       /*
2463 +                        * Lowmem is memory that can be addressed
2464 +                        * directly through P1/P2
2465 +                        */
2466 +                       printk(KERN_WARNING
2467 +                              "Node %u: Only %ld MiB of memory will be used.\n",
2468 +                              node, MAX_LOWMEM >> 20);
2469 +                       printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
2470 +#else
2471 +#error HIGHMEM is not supported by AVR32 yet
2472 +#endif
2473 +               }
2474 +
2475 +               /* Initialize the boot-time allocator with low memory only. */
2476 +               bootmap_size = init_bootmem_node(NODE_DATA(node), bootmap_pfn,
2477 +                                                first_pfn, max_low_pfn);
2478 +
2479 +               /*
2480 +                * Register fully available RAM pages with the bootmem
2481 +                * allocator.
2482 +                */
2483 +               pages = max_low_pfn - first_pfn;
2484 +               free_bootmem_node (NODE_DATA(node), PFN_PHYS(first_pfn),
2485 +                                  PFN_PHYS(pages));
2486 +
2487 +               /* Reserve space for the bootmem bitmap... */
2488 +               reserve_bootmem_node(NODE_DATA(node),
2489 +                                    PFN_PHYS(bootmap_pfn),
2490 +                                    bootmap_size);
2491 +
2492 +               /* ...and any other reserved regions. */
2493 +               for (res = reserved; res; res = res->sibling) {
2494 +                       if (res->start > PFN_PHYS(max_pfn))
2495 +                               break;
2496 +
2497 +                       /*
2498 +                        * resource_init will complain about partial
2499 +                        * overlaps, so we'll just ignore such
2500 +                        * resources for now.
2501 +                        */
2502 +                       if (res->start >= PFN_PHYS(first_pfn)
2503 +                           && res->end < PFN_PHYS(max_pfn))
2504 +                               reserve_bootmem_node(
2505 +                                       NODE_DATA(node), res->start,
2506 +                                       res->end - res->start + 1);
2507 +               }
2508 +
2509 +               node_set_online(node);
2510 +       }
2511 +}
2512 +
2513  void __init setup_arch (char **cmdline_p)
2514  {
2515         struct clk *cpu_clk;
2516
2517 +       init_mm.start_code = (unsigned long)_text;
2518 +       init_mm.end_code = (unsigned long)_etext;
2519 +       init_mm.end_data = (unsigned long)_edata;
2520 +       init_mm.brk = (unsigned long)_end;
2521 +
2522 +       /*
2523 +        * Include .init section to make allocations easier. It will
2524 +        * be removed before the resource is actually requested.
2525 +        */
2526 +       kernel_code.start = __pa(__init_begin);
2527 +       kernel_code.end = __pa(init_mm.end_code - 1);
2528 +       kernel_data.start = __pa(init_mm.end_code);
2529 +       kernel_data.end = __pa(init_mm.brk - 1);
2530 +
2531         parse_tags(bootloader_tags);
2532
2533         setup_processor();
2534 @@ -289,24 +555,16 @@
2535                        ((cpu_hz + 500) / 1000) % 1000);
2536         }
2537
2538 -       init_mm.start_code = (unsigned long) &_text;
2539 -       init_mm.end_code = (unsigned long) &_etext;
2540 -       init_mm.end_data = (unsigned long) &_edata;
2541 -       init_mm.brk = (unsigned long) &_end;
2542 -
2543         strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
2544         *cmdline_p = command_line;
2545         parse_early_param();
2546
2547         setup_bootmem();
2548
2549 -       board_setup_fbmem(fbmem_start, fbmem_size);
2550 -
2551  #ifdef CONFIG_VT
2552         conswitchp = &dummy_con;
2553  #endif
2554
2555         paging_init();
2556 -
2557         resource_init();
2558  }
2559 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/time.c avr32-git/arch/avr32/kernel/time.c
2560 --- linux-2.6.21.3/arch/avr32/kernel/time.c     2007-05-24 23:22:47.000000000 +0200
2561 +++ avr32-git/arch/avr32/kernel/time.c  2007-06-06 11:33:46.000000000 +0200
2562 @@ -1,5 +1,5 @@
2563  /*
2564 - * Copyright (C) 2004-2006 Atmel Corporation
2565 + * Copyright (C) 2004-2007 Atmel Corporation
2566   *
2567   * Based on MIPS implementation arch/mips/kernel/time.c
2568   *   Copyright 2001 MontaVista Software Inc.
2569 @@ -20,18 +20,25 @@
2570  #include <linux/init.h>
2571  #include <linux/profile.h>
2572  #include <linux/sysdev.h>
2573 +#include <linux/err.h>
2574
2575  #include <asm/div64.h>
2576  #include <asm/sysreg.h>
2577  #include <asm/io.h>
2578  #include <asm/sections.h>
2579
2580 -static cycle_t read_cycle_count(void)
2581 +/* how many counter cycles in a jiffy? */
2582 +static u32 cycles_per_jiffy;
2583 +
2584 +/* the count value for the next timer interrupt */
2585 +static u32 expirelo;
2586 +
2587 +cycle_t __weak read_cycle_count(void)
2588  {
2589         return (cycle_t)sysreg_read(COUNT);
2590  }
2591
2592 -static struct clocksource clocksource_avr32 = {
2593 +struct clocksource __weak clocksource_avr32 = {
2594         .name           = "avr32",
2595         .rating         = 350,
2596         .read           = read_cycle_count,
2597 @@ -40,12 +47,20 @@
2598         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
2599  };
2600
2601 +irqreturn_t __weak timer_interrupt(int irq, void *dev_id);
2602 +
2603 +struct irqaction timer_irqaction = {
2604 +       .handler        = timer_interrupt,
2605 +       .flags          = IRQF_DISABLED,
2606 +       .name           = "timer",
2607 +};
2608 +
2609  /*
2610   * By default we provide the null RTC ops
2611   */
2612  static unsigned long null_rtc_get_time(void)
2613  {
2614 -       return mktime(2004, 1, 1, 0, 0, 0);
2615 +       return mktime(2007, 1, 1, 0, 0, 0);
2616  }
2617
2618  static int null_rtc_set_time(unsigned long sec)
2619 @@ -56,23 +71,14 @@
2620  static unsigned long (*rtc_get_time)(void) = null_rtc_get_time;
2621  static int (*rtc_set_time)(unsigned long) = null_rtc_set_time;
2622
2623 -/* how many counter cycles in a jiffy? */
2624 -static unsigned long cycles_per_jiffy;
2625 -
2626 -/* cycle counter value at the previous timer interrupt */
2627 -static unsigned int timerhi, timerlo;
2628 -
2629 -/* the count value for the next timer interrupt */
2630 -static unsigned int expirelo;
2631 -
2632  static void avr32_timer_ack(void)
2633  {
2634 -       unsigned int count;
2635 +       u32 count;
2636
2637         /* Ack this timer interrupt and set the next one */
2638         expirelo += cycles_per_jiffy;
2639 +       /* setting COMPARE to 0 stops the COUNT-COMPARE */
2640         if (expirelo == 0) {
2641 -               printk(KERN_DEBUG "expirelo == 0\n");
2642                 sysreg_write(COMPARE, expirelo + 1);
2643         } else {
2644                 sysreg_write(COMPARE, expirelo);
2645 @@ -86,27 +92,56 @@
2646         }
2647  }
2648
2649 -static unsigned int avr32_hpt_read(void)
2650 +int __weak avr32_hpt_init(void)
2651  {
2652 -       return sysreg_read(COUNT);
2653 +       int ret;
2654 +       unsigned long mult, shift, count_hz;
2655 +
2656 +       count_hz = clk_get_rate(boot_cpu_data.clk);
2657 +       shift = clocksource_avr32.shift;
2658 +       mult = clocksource_hz2mult(count_hz, shift);
2659 +       clocksource_avr32.mult = mult;
2660 +
2661 +       {
2662 +               u64 tmp;
2663 +
2664 +               tmp = TICK_NSEC;
2665 +               tmp <<= shift;
2666 +               tmp += mult / 2;
2667 +               do_div(tmp, mult);
2668 +
2669 +               cycles_per_jiffy = tmp;
2670 +       }
2671 +
2672 +       ret = setup_irq(0, &timer_irqaction);
2673 +       if (ret) {
2674 +               pr_debug("timer: could not request IRQ 0: %d\n", ret);
2675 +               return -ENODEV;
2676 +       }
2677 +
2678 +       printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, "
2679 +                       "%lu.%03lu MHz\n",
2680 +                       ((count_hz + 500) / 1000) / 1000,
2681 +                       ((count_hz + 500) / 1000) % 1000);
2682 +
2683 +       return 0;
2684  }
2685
2686  /*
2687   * Taken from MIPS c0_hpt_timer_init().
2688   *
2689 - * Why is it so complicated, and what is "count"?  My assumption is
2690 - * that `count' specifies the "reference cycle", i.e. the cycle since
2691 - * reset that should mean "zero". The reason COUNT is written twice is
2692 - * probably to make sure we don't get any timer interrupts while we
2693 - * are messing with the counter.
2694 + * The reason COUNT is written twice is probably to make sure we don't get any
2695 + * timer interrupts while we are messing with the counter.
2696   */
2697 -static void avr32_hpt_init(unsigned int count)
2698 +int __weak avr32_hpt_start(void)
2699  {
2700 -       count = sysreg_read(COUNT) - count;
2701 +       u32 count = sysreg_read(COUNT);
2702         expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
2703         sysreg_write(COUNT, expirelo - cycles_per_jiffy);
2704         sysreg_write(COMPARE, expirelo);
2705         sysreg_write(COUNT, count);
2706 +
2707 +       return 0;
2708  }
2709
2710  /*
2711 @@ -115,26 +150,18 @@
2712   *
2713   * In UP mode, it is invoked from the (global) timer_interrupt.
2714   */
2715 -static void local_timer_interrupt(int irq, void *dev_id)
2716 +void local_timer_interrupt(int irq, void *dev_id)
2717  {
2718         if (current->pid)
2719                 profile_tick(CPU_PROFILING);
2720         update_process_times(user_mode(get_irq_regs()));
2721  }
2722
2723 -static irqreturn_t
2724 -timer_interrupt(int irq, void *dev_id)
2725 +irqreturn_t __weak timer_interrupt(int irq, void *dev_id)
2726  {
2727 -       unsigned int count;
2728 -
2729         /* ack timer interrupt and try to set next interrupt */
2730 -       count = avr32_hpt_read();
2731         avr32_timer_ack();
2732
2733 -       /* Update timerhi/timerlo for intra-jiffy calibration */
2734 -       timerhi += count < timerlo;     /* Wrap around */
2735 -       timerlo = count;
2736 -
2737         /*
2738          * Call the generic timer interrupt handler
2739          */
2740 @@ -153,60 +180,37 @@
2741         return IRQ_HANDLED;
2742  }
2743
2744 -static struct irqaction timer_irqaction = {
2745 -       .handler        = timer_interrupt,
2746 -       .flags          = IRQF_DISABLED,
2747 -       .name           = "timer",
2748 -};
2749 -
2750  void __init time_init(void)
2751  {
2752 -       unsigned long mult, shift, count_hz;
2753         int ret;
2754
2755 +       /*
2756 +        * Make sure we don't get any COMPARE interrupts before we can
2757 +        * handle them.
2758 +        */
2759 +       sysreg_write(COMPARE, 0);
2760 +
2761         xtime.tv_sec = rtc_get_time();
2762         xtime.tv_nsec = 0;
2763
2764         set_normalized_timespec(&wall_to_monotonic,
2765                                 -xtime.tv_sec, -xtime.tv_nsec);
2766
2767 -       printk("Before time_init: count=%08lx, compare=%08lx\n",
2768 -              (unsigned long)sysreg_read(COUNT),
2769 -              (unsigned long)sysreg_read(COMPARE));
2770 -
2771 -       count_hz = clk_get_rate(boot_cpu_data.clk);
2772 -       shift = clocksource_avr32.shift;
2773 -       mult = clocksource_hz2mult(count_hz, shift);
2774 -       clocksource_avr32.mult = mult;
2775 -
2776 -       printk("Cycle counter: mult=%lu, shift=%lu\n", mult, shift);
2777 -
2778 -       {
2779 -               u64 tmp;
2780 -
2781 -               tmp = TICK_NSEC;
2782 -               tmp <<= shift;
2783 -               tmp += mult / 2;
2784 -               do_div(tmp, mult);
2785 -
2786 -               cycles_per_jiffy = tmp;
2787 +       ret = avr32_hpt_init();
2788 +       if (ret) {
2789 +               pr_debug("timer: failed setup: %d\n", ret);
2790 +               return;
2791         }
2792
2793 -       /* This sets up the high precision timer for the first interrupt. */
2794 -       avr32_hpt_init(avr32_hpt_read());
2795 -
2796 -       printk("After time_init: count=%08lx, compare=%08lx\n",
2797 -              (unsigned long)sysreg_read(COUNT),
2798 -              (unsigned long)sysreg_read(COMPARE));
2799 -
2800         ret = clocksource_register(&clocksource_avr32);
2801         if (ret)
2802 -               printk(KERN_ERR
2803 -                      "timer: could not register clocksource: %d\n", ret);
2804 +               pr_debug("timer: could not register clocksource: %d\n", ret);
2805
2806 -       ret = setup_irq(0, &timer_irqaction);
2807 -       if (ret)
2808 -               printk("timer: could not request IRQ 0: %d\n", ret);
2809 +       ret = avr32_hpt_start();
2810 +       if (ret) {
2811 +               pr_debug("timer: failed starting: %d\n", ret);
2812 +               return;
2813 +       }
2814  }
2815
2816  static struct sysdev_class timer_class = {
2817 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/traps.c avr32-git/arch/avr32/kernel/traps.c
2818 --- linux-2.6.21.3/arch/avr32/kernel/traps.c    2007-05-24 23:22:47.000000000 +0200
2819 +++ avr32-git/arch/avr32/kernel/traps.c 2007-06-06 11:33:46.000000000 +0200
2820 @@ -5,158 +5,25 @@
2821   * it under the terms of the GNU General Public License version 2 as
2822   * published by the Free Software Foundation.
2823   */
2824 -#undef DEBUG
2825 -#include <linux/sched.h>
2826 +
2827 +#include <linux/bug.h>
2828  #include <linux/init.h>
2829 -#include <linux/module.h>
2830  #include <linux/kallsyms.h>
2831 +#include <linux/module.h>
2832  #include <linux/notifier.h>
2833 +#include <linux/sched.h>
2834 +#include <linux/uaccess.h>
2835
2836 -#include <asm/traps.h>
2837 -#include <asm/sysreg.h>
2838  #include <asm/addrspace.h>
2839 -#include <asm/ocd.h>
2840  #include <asm/mmu_context.h>
2841 -#include <asm/uaccess.h>
2842 -
2843 -static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
2844 -{
2845 -       unsigned long p;
2846 -       int i;
2847 -
2848 -       printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
2849 -
2850 -       for (p = bottom & ~31; p < top; ) {
2851 -               printk("%04lx: ", p & 0xffff);
2852 -
2853 -               for (i = 0; i < 8; i++, p += 4) {
2854 -                       unsigned int val;
2855 -
2856 -                       if (p < bottom || p >= top)
2857 -                               printk("         ");
2858 -                       else {
2859 -                               if (__get_user(val, (unsigned int __user *)p)) {
2860 -                                       printk("\n");
2861 -                                       goto out;
2862 -                               }
2863 -                               printk("%08x ", val);
2864 -                       }
2865 -               }
2866 -               printk("\n");
2867 -       }
2868 -
2869 -out:
2870 -       return;
2871 -}
2872 -
2873 -static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p)
2874 -{
2875 -       return (p > (unsigned long)tinfo)
2876 -               && (p < (unsigned long)tinfo + THREAD_SIZE - 3);
2877 -}
2878 -
2879 -#ifdef CONFIG_FRAME_POINTER
2880 -static inline void __show_trace(struct task_struct *tsk, unsigned long *sp,
2881 -                               struct pt_regs *regs)
2882 -{
2883 -       unsigned long lr, fp;
2884 -       struct thread_info *tinfo;
2885 -
2886 -       tinfo = (struct thread_info *)
2887 -               ((unsigned long)sp & ~(THREAD_SIZE - 1));
2888 -
2889 -       if (regs)
2890 -               fp = regs->r7;
2891 -       else if (tsk == current)
2892 -               asm("mov %0, r7" : "=r"(fp));
2893 -       else
2894 -               fp = tsk->thread.cpu_context.r7;
2895 -
2896 -       /*
2897 -        * Walk the stack as long as the frame pointer (a) is within
2898 -        * the kernel stack of the task, and (b) it doesn't move
2899 -        * downwards.
2900 -        */
2901 -       while (valid_stack_ptr(tinfo, fp)) {
2902 -               unsigned long new_fp;
2903 -
2904 -               lr = *(unsigned long *)fp;
2905 -               printk(" [<%08lx>] ", lr);
2906 -               print_symbol("%s\n", lr);
2907 -
2908 -               new_fp = *(unsigned long *)(fp + 4);
2909 -               if (new_fp <= fp)
2910 -                       break;
2911 -               fp = new_fp;
2912 -       }
2913 -       printk("\n");
2914 -}
2915 -#else
2916 -static inline void __show_trace(struct task_struct *tsk, unsigned long *sp,
2917 -                               struct pt_regs *regs)
2918 -{
2919 -       unsigned long addr;
2920 -
2921 -       while (!kstack_end(sp)) {
2922 -               addr = *sp++;
2923 -               if (kernel_text_address(addr)) {
2924 -                       printk(" [<%08lx>] ", addr);
2925 -                       print_symbol("%s\n", addr);
2926 -               }
2927 -       }
2928 -}
2929 -#endif
2930 -
2931 -void show_trace(struct task_struct *tsk, unsigned long *sp,
2932 -                      struct pt_regs *regs)
2933 -{
2934 -       if (regs &&
2935 -           (((regs->sr & MODE_MASK) == MODE_EXCEPTION) ||
2936 -            ((regs->sr & MODE_MASK) == MODE_USER)))
2937 -               return;
2938 -
2939 -       printk ("Call trace:");
2940 -#ifdef CONFIG_KALLSYMS
2941 -       printk("\n");
2942 -#endif
2943 -
2944 -       __show_trace(tsk, sp, regs);
2945 -       printk("\n");
2946 -}
2947 -
2948 -void show_stack(struct task_struct *tsk, unsigned long *sp)
2949 -{
2950 -       unsigned long stack;
2951 -
2952 -       if (!tsk)
2953 -               tsk = current;
2954 -       if (sp == 0) {
2955 -               if (tsk == current) {
2956 -                       register unsigned long *real_sp __asm__("sp");
2957 -                       sp = real_sp;
2958 -               } else {
2959 -                       sp = (unsigned long *)tsk->thread.cpu_context.ksp;
2960 -               }
2961 -       }
2962 -
2963 -       stack = (unsigned long)sp;
2964 -       dump_mem("Stack: ", stack,
2965 -                THREAD_SIZE + (unsigned long)tsk->thread_info);
2966 -       show_trace(tsk, sp, NULL);
2967 -}
2968 -
2969 -void dump_stack(void)
2970 -{
2971 -       show_stack(NULL, NULL);
2972 -}
2973 -EXPORT_SYMBOL(dump_stack);
2974 +#include <asm/ocd.h>
2975 +#include <asm/sysreg.h>
2976 +#include <asm/traps.h>
2977
2978  ATOMIC_NOTIFIER_HEAD(avr32_die_chain);
2979
2980  int register_die_notifier(struct notifier_block *nb)
2981  {
2982 -       pr_debug("register_die_notifier: %p\n", nb);
2983 -
2984         return atomic_notifier_chain_register(&avr32_die_chain, nb);
2985  }
2986  EXPORT_SYMBOL(register_die_notifier);
2987 @@ -169,98 +36,108 @@
2988
2989  static DEFINE_SPINLOCK(die_lock);
2990
2991 -void __die(const char *str, struct pt_regs *regs, unsigned long err,
2992 -          const char *file, const char *func, unsigned long line)
2993 +void NORET_TYPE die(const char *str, struct pt_regs *regs, long err)
2994  {
2995 -       struct task_struct *tsk = current;
2996         static int die_counter;
2997
2998         console_verbose();
2999         spin_lock_irq(&die_lock);
3000         bust_spinlocks(1);
3001
3002 -       printk(KERN_ALERT "%s", str);
3003 -       if (file && func)
3004 -               printk(" in %s:%s, line %ld", file, func, line);
3005 -       printk("[#%d]:\n", ++die_counter);
3006 -       print_modules();
3007 -       show_regs(regs);
3008 -       printk("Process %s (pid: %d, stack limit = 0x%p)\n",
3009 -              tsk->comm, tsk->pid, tsk->thread_info + 1);
3010 -
3011 -       if (!user_mode(regs) || in_interrupt()) {
3012 -               dump_mem("Stack: ", regs->sp,
3013 -                        THREAD_SIZE + (unsigned long)tsk->thread_info);
3014 +       printk(KERN_ALERT "Oops: %s, sig: %ld [#%d]\n" KERN_EMERG,
3015 +              str, err, ++die_counter);
3016 +#ifdef CONFIG_PREEMPT
3017 +       printk("PREEMPT ");
3018 +#endif
3019 +#ifdef CONFIG_FRAME_POINTER
3020 +       printk("FRAME_POINTER ");
3021 +#endif
3022 +       if (current_cpu_data.features & AVR32_FEATURE_OCD) {
3023 +               unsigned long did = __mfdr(DBGREG_DID);
3024 +               printk("chip: 0x%03lx:0x%04lx rev %lu\n",
3025 +                      (did >> 1) & 0x7ff,
3026 +                      (did >> 12) & 0x7fff,
3027 +                      (did >> 28) & 0xf);
3028 +       } else {
3029 +               printk("cpu: arch %u r%u / core %u r%u\n",
3030 +                      current_cpu_data.arch_type,
3031 +                      current_cpu_data.arch_revision,
3032 +                      current_cpu_data.cpu_type,
3033 +                      current_cpu_data.cpu_revision);
3034         }
3035
3036 +       print_modules();
3037 +       show_regs_log_lvl(regs, KERN_EMERG);
3038 +       show_stack_log_lvl(current, regs->sp, regs, KERN_EMERG);
3039         bust_spinlocks(0);
3040         spin_unlock_irq(&die_lock);
3041 -       do_exit(SIGSEGV);
3042 +
3043 +       if (in_interrupt())
3044 +               panic("Fatal exception in interrupt");
3045 +
3046 +       if (panic_on_oops)
3047 +               panic("Fatal exception");
3048 +
3049 +       do_exit(err);
3050  }
3051
3052 -void __die_if_kernel(const char *str, struct pt_regs *regs, unsigned long err,
3053 -                    const char *file, const char *func, unsigned long line)
3054 +void _exception(long signr, struct pt_regs *regs, int code,
3055 +               unsigned long addr)
3056  {
3057 +       siginfo_t info;
3058 +
3059         if (!user_mode(regs))
3060 -               __die(str, regs, err, file, func, line);
3061 -}
3062 +               die("Unhandled exception in kernel mode", regs, signr);
3063 +
3064 +       memset(&info, 0, sizeof(info));
3065 +       info.si_signo = signr;
3066 +       info.si_code = code;
3067 +       info.si_addr = (void __user *)addr;
3068 +       force_sig_info(signr, &info, current);
3069
3070 -asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
3071 -{
3072 -#ifdef CONFIG_SUBARCH_AVR32B
3073         /*
3074 -        * The exception entry always saves RSR_EX. For NMI, this is
3075 -        * wrong; it should be RSR_NMI
3076 +        * Init gets no signals that it doesn't have a handler for.
3077 +        * That's all very well, but if it has caused a synchronous
3078 +        * exception and we ignore the resulting signal, it will just
3079 +        * generate the same exception over and over again and we get
3080 +        * nowhere.  Better to kill it and let the kernel panic.
3081          */
3082 -       regs->sr = sysreg_read(RSR_NMI);
3083 -#endif
3084 +       if (is_init(current)) {
3085 +               __sighandler_t handler;
3086
3087 -       printk("NMI taken!!!!\n");
3088 -       die("NMI", regs, ecr);
3089 -       BUG();
3090 +               spin_lock_irq(&current->sighand->siglock);
3091 +               handler = current->sighand->action[signr-1].sa.sa_handler;
3092 +               spin_unlock_irq(&current->sighand->siglock);
3093 +               if (handler == SIG_DFL) {
3094 +                       /* init has generated a synchronous exception
3095 +                          and it doesn't have a handler for the signal */
3096 +                       printk(KERN_CRIT "init has generated signal %ld "
3097 +                              "but has no handler for it\n", signr);
3098 +                       do_exit(signr);
3099 +               }
3100 +       }
3101 +}
3102 +
3103 +asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
3104 +{
3105 +       printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n");
3106 +       show_regs_log_lvl(regs, KERN_ALERT);
3107 +       show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT);
3108  }
3109
3110  asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
3111  {
3112 -       printk("Unable to handle critical exception %lu at pc = %08lx!\n",
3113 -              ecr, regs->pc);
3114 -       die("Oops", regs, ecr);
3115 -       BUG();
3116 +       die("Critical exception", regs, SIGKILL);
3117  }
3118
3119  asmlinkage void do_address_exception(unsigned long ecr, struct pt_regs *regs)
3120  {
3121 -       siginfo_t info;
3122 -
3123 -       die_if_kernel("Oops: Address exception in kernel mode", regs, ecr);
3124 -
3125 -#ifdef DEBUG
3126 -       if (ecr == ECR_ADDR_ALIGN_X)
3127 -               pr_debug("Instruction Address Exception at pc = %08lx\n",
3128 -                        regs->pc);
3129 -       else if (ecr == ECR_ADDR_ALIGN_R)
3130 -               pr_debug("Data Address Exception (Read) at pc = %08lx\n",
3131 -                        regs->pc);
3132 -       else if (ecr == ECR_ADDR_ALIGN_W)
3133 -               pr_debug("Data Address Exception (Write) at pc = %08lx\n",
3134 -                        regs->pc);
3135 -       else
3136 -               BUG();
3137 -
3138 -       show_regs(regs);
3139 -#endif
3140 -
3141 -       info.si_signo = SIGBUS;
3142 -       info.si_errno = 0;
3143 -       info.si_code = BUS_ADRALN;
3144 -       info.si_addr = (void __user *)regs->pc;
3145 -
3146 -       force_sig_info(SIGBUS, &info, current);
3147 +       _exception(SIGBUS, regs, BUS_ADRALN, regs->pc);
3148  }
3149
3150  /* This way of handling undefined instructions is stolen from ARM */
3151  static LIST_HEAD(undef_hook);
3152 -static spinlock_t undef_lock = SPIN_LOCK_UNLOCKED;
3153 +static DEFINE_SPINLOCK(undef_lock);
3154
3155  void register_undef_hook(struct undef_hook *hook)
3156  {
3157 @@ -280,7 +157,8 @@
3158  {
3159         int cop_nr;
3160         u32 cpucr;
3161 -       if ( (insn & 0xfdf00000) == 0xf1900000 )
3162 +
3163 +       if ((insn & 0xfdf00000) == 0xf1900000)
3164                 /* LDC0 */
3165                 cop_nr = 0;
3166         else
3167 @@ -292,136 +170,91 @@
3168         sysreg_write(CPUCR, cpucr);
3169
3170         cpucr = sysreg_read(CPUCR);
3171 -       if ( !(cpucr & (1 << (24 + cop_nr))) ){
3172 -               printk("Coprocessor #%i not found!\n", cop_nr);
3173 -               return -1;
3174 -       }
3175 +       if (!(cpucr & (1 << (24 + cop_nr))))
3176 +               return -ENODEV;
3177
3178         return 0;
3179  }
3180
3181 -#ifdef CONFIG_BUG
3182 -#ifdef CONFIG_DEBUG_BUGVERBOSE
3183 -static inline void do_bug_verbose(struct pt_regs *regs, u32 insn)
3184 -{
3185 -       char *file;
3186 -       u16 line;
3187 -       char c;
3188 -
3189 -       if (__get_user(line, (u16 __user *)(regs->pc + 2)))
3190 -               return;
3191 -       if (__get_user(file, (char * __user *)(regs->pc + 4))
3192 -           || (unsigned long)file < PAGE_OFFSET
3193 -           || __get_user(c, file))
3194 -               file = "<bad filename>";
3195 -
3196 -       printk(KERN_ALERT "kernel BUG at %s:%d!\n", file, line);
3197 -}
3198 -#else
3199 -static inline void do_bug_verbose(struct pt_regs *regs, u32 insn)
3200 +int is_valid_bugaddr(unsigned long pc)
3201  {
3202 +       unsigned short opcode;
3203 +
3204 +       if (pc < PAGE_OFFSET)
3205 +               return 0;
3206 +       if (probe_kernel_address((u16 *)pc, opcode))
3207 +               return 0;
3208
3209 +       return opcode == AVR32_BUG_OPCODE;
3210  }
3211 -#endif
3212 -#endif
3213
3214  asmlinkage void do_illegal_opcode(unsigned long ecr, struct pt_regs *regs)
3215  {
3216         u32 insn;
3217         struct undef_hook *hook;
3218 -       siginfo_t info;
3219         void __user *pc;
3220 +       long code;
3221
3222 -       if (!user_mode(regs))
3223 -               goto kernel_trap;
3224 +       if (!user_mode(regs) && (ecr == ECR_ILLEGAL_OPCODE)) {
3225 +               enum bug_trap_type type;
3226 +
3227 +               type = report_bug(regs->pc);
3228 +               switch (type) {
3229 +               case BUG_TRAP_TYPE_NONE:
3230 +                       break;
3231 +               case BUG_TRAP_TYPE_WARN:
3232 +                       regs->pc += 2;
3233 +                       return;
3234 +               case BUG_TRAP_TYPE_BUG:
3235 +                       die("Kernel BUG", regs, SIGKILL);
3236 +               }
3237 +       }
3238
3239         local_irq_enable();
3240
3241 -       pc = (void __user *)instruction_pointer(regs);
3242 -       if (__get_user(insn, (u32 __user *)pc))
3243 -               goto invalid_area;
3244 +       if (user_mode(regs)) {
3245 +               pc = (void __user *)instruction_pointer(regs);
3246 +               if (get_user(insn, (u32 __user *)pc))
3247 +                       goto invalid_area;
3248
3249 -        if (ecr == ECR_COPROC_ABSENT) {
3250 -               if (do_cop_absent(insn) == 0)
3251 +               if (ecr == ECR_COPROC_ABSENT && !do_cop_absent(insn))
3252                         return;
3253 -        }
3254
3255 -       spin_lock_irq(&undef_lock);
3256 -       list_for_each_entry(hook, &undef_hook, node) {
3257 -               if ((insn & hook->insn_mask) == hook->insn_val) {
3258 -                       if (hook->fn(regs, insn) == 0) {
3259 -                               spin_unlock_irq(&undef_lock);
3260 -                               return;
3261 +               spin_lock_irq(&undef_lock);
3262 +               list_for_each_entry(hook, &undef_hook, node) {
3263 +                       if ((insn & hook->insn_mask) == hook->insn_val) {
3264 +                               if (hook->fn(regs, insn) == 0) {
3265 +                                       spin_unlock_irq(&undef_lock);
3266 +                                       return;
3267 +                               }
3268                         }
3269                 }
3270 +               spin_unlock_irq(&undef_lock);
3271         }
3272 -       spin_unlock_irq(&undef_lock);
3273 -
3274 -invalid_area:
3275
3276 -#ifdef DEBUG
3277 -       printk("Illegal instruction at pc = %08lx\n", regs->pc);
3278 -       if (regs->pc < TASK_SIZE) {
3279 -               unsigned long ptbr, pgd, pte, *p;
3280 -
3281 -               ptbr = sysreg_read(PTBR);
3282 -               p = (unsigned long *)ptbr;
3283 -               pgd = p[regs->pc >> 22];
3284 -               p = (unsigned long *)((pgd & 0x1ffff000) | 0x80000000);
3285 -               pte = p[(regs->pc >> 12) & 0x3ff];
3286 -               printk("page table: 0x%08lx -> 0x%08lx -> 0x%08lx\n", ptbr, pgd, pte);
3287 -       }
3288 -#endif
3289 -
3290 -       info.si_signo = SIGILL;
3291 -       info.si_errno = 0;
3292 -       info.si_addr = (void __user *)regs->pc;
3293         switch (ecr) {
3294 -       case ECR_ILLEGAL_OPCODE:
3295 -       case ECR_UNIMPL_INSTRUCTION:
3296 -               info.si_code = ILL_ILLOPC;
3297 -               break;
3298         case ECR_PRIVILEGE_VIOLATION:
3299 -               info.si_code = ILL_PRVOPC;
3300 +               code = ILL_PRVOPC;
3301                 break;
3302         case ECR_COPROC_ABSENT:
3303 -               info.si_code = ILL_COPROC;
3304 +               code = ILL_COPROC;
3305                 break;
3306         default:
3307 -               BUG();
3308 +               code = ILL_ILLOPC;
3309 +               break;
3310         }
3311
3312 -       force_sig_info(SIGILL, &info, current);
3313 +       _exception(SIGILL, regs, code, regs->pc);
3314         return;
3315
3316 -kernel_trap:
3317 -#ifdef CONFIG_BUG
3318 -       if (__kernel_text_address(instruction_pointer(regs))) {
3319 -               insn = *(u16 *)instruction_pointer(regs);
3320 -               if (insn == AVR32_BUG_OPCODE) {
3321 -                       do_bug_verbose(regs, insn);
3322 -                       die("Kernel BUG", regs, 0);
3323 -                       return;
3324 -               }
3325 -       }
3326 -#endif
3327 -
3328 -       die("Oops: Illegal instruction in kernel code", regs, ecr);
3329 +invalid_area:
3330 +       _exception(SIGSEGV, regs, SEGV_MAPERR, regs->pc);
3331  }
3332
3333  asmlinkage void do_fpe(unsigned long ecr, struct pt_regs *regs)
3334  {
3335 -       siginfo_t info;
3336 -
3337 -       printk("Floating-point exception at pc = %08lx\n", regs->pc);
3338 -
3339 -       /* We have no FPU... */
3340 -       info.si_signo = SIGILL;
3341 -       info.si_errno = 0;
3342 -       info.si_addr = (void __user *)regs->pc;
3343 -       info.si_code = ILL_COPROC;
3344 -
3345 -       force_sig_info(SIGILL, &info, current);
3346 +       /* We have no FPU yet */
3347 +       _exception(SIGILL, regs, ILL_COPROC, regs->pc);
3348  }
3349
3350
3351 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/kernel/vmlinux.lds.c avr32-git/arch/avr32/kernel/vmlinux.lds.c
3352 --- linux-2.6.21.3/arch/avr32/kernel/vmlinux.lds.c      2007-05-24 23:22:47.000000000 +0200
3353 +++ avr32-git/arch/avr32/kernel/vmlinux.lds.c   2007-06-06 11:33:46.000000000 +0200
3354 @@ -26,10 +26,16 @@
3355                         _sinittext = .;
3356                         *(.text.reset)
3357                         *(.init.text)
3358 +                       /*
3359 +                        * .exit.text is discarded at runtime, not
3360 +                        * link time, to deal with references from
3361 +                        * __bug_table
3362 +                        */
3363 +                       *(.exit.text)
3364                         _einittext = .;
3365                 . = ALIGN(4);
3366                 __tagtable_begin = .;
3367 -                       *(.taglist)
3368 +                       *(.taglist.init)
3369                 __tagtable_end = .;
3370                         *(.init.data)
3371                 . = ALIGN(16);
3372 @@ -86,6 +92,8 @@
3373                 __stop___ex_table = .;
3374         }
3375
3376 +       BUG_TABLE
3377 +
3378         RODATA
3379
3380         . = ALIGN(8192);
3381 @@ -126,7 +134,6 @@
3382          * thrown away, as cleanup code is never called unless it's a module.
3383          */
3384         /DISCARD/               : {
3385 -               *(.exit.text)
3386                 *(.exit.data)
3387                 *(.exitcall.exit)
3388         }
3389 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/at32ap7000.c avr32-git/arch/avr32/mach-at32ap/at32ap7000.c
3390 --- linux-2.6.21.3/arch/avr32/mach-at32ap/at32ap7000.c  2007-05-24 23:22:47.000000000 +0200
3391 +++ avr32-git/arch/avr32/mach-at32ap/at32ap7000.c       2007-06-06 11:33:46.000000000 +0200
3392 @@ -6,6 +6,7 @@
3393   * published by the Free Software Foundation.
3394   */
3395  #include <linux/clk.h>
3396 +#include <linux/fb.h>
3397  #include <linux/init.h>
3398  #include <linux/platform_device.h>
3399  #include <linux/spi/spi.h>
3400 @@ -17,7 +18,10 @@
3401  #include <asm/arch/portmux.h>
3402  #include <asm/arch/sm.h>
3403
3404 +#include <video/atmel_lcdc.h>
3405 +
3406  #include "clock.h"
3407 +#include "hmatrix.h"
3408  #include "pio.h"
3409  #include "sm.h"
3410
3411 @@ -416,7 +420,15 @@
3412         .resource       = sm_resource,
3413         .num_resources  = ARRAY_SIZE(sm_resource),
3414  };
3415 -DEV_CLK(pclk, at32_sm, pbb, 0);
3416 +static struct clk at32_sm_pclk = {
3417 +       .name           = "pclk",
3418 +       .dev            = &at32_sm_device.dev,
3419 +       .parent         = &pbb_clk,
3420 +       .mode           = pbb_clk_mode,
3421 +       .get_rate       = pbb_clk_get_rate,
3422 +       .users          = 1,
3423 +       .index          = 0,
3424 +};
3425
3426  static struct resource intc0_resource[] = {
3427         PBMEM(0xfff00400),
3428 @@ -442,6 +454,7 @@
3429         .mode           = hsb_clk_mode,
3430         .get_rate       = hsb_clk_get_rate,
3431         .users          = 1,
3432 +       .index          = 3,
3433  };
3434
3435  static struct resource smc0_resource[] = {
3436 @@ -466,6 +479,68 @@
3437         .users          = 1,
3438  };
3439
3440 +static struct resource dmaca0_resource[] = {
3441 +       {
3442 +               .start  = 0xff200000,
3443 +               .end    = 0xff20ffff,
3444 +               .flags  = IORESOURCE_MEM,
3445 +       },
3446 +       IRQ(2),
3447 +};
3448 +DEFINE_DEV(dmaca, 0);
3449 +DEV_CLK(hclk, dmaca0, hsb, 10);
3450 +
3451 +/* --------------------------------------------------------------------
3452 + * HMATRIX
3453 + * -------------------------------------------------------------------- */
3454 +
3455 +static struct clk hmatrix_clk = {
3456 +       .name           = "hmatrix_clk",
3457 +       .parent         = &pbb_clk,
3458 +       .mode           = pbb_clk_mode,
3459 +       .get_rate       = pbb_clk_get_rate,
3460 +       .index          = 2,
3461 +       .users          = 1,
3462 +};
3463 +#define HMATRIX_BASE   ((void __iomem *)0xfff00800)
3464 +
3465 +#define hmatrix_readl(reg)                                     \
3466 +       __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
3467 +#define hmatrix_writel(reg,value)                              \
3468 +       __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
3469 +
3470 +/*
3471 + * Set bits in the HMATRIX Special Function Register (SFR) used by the
3472 + * External Bus Interface (EBI). This can be used to enable special
3473 + * features like CompactFlash support, NAND Flash support, etc. on
3474 + * certain chipselects.
3475 + */
3476 +static inline void set_ebi_sfr_bits(u32 mask)
3477 +{
3478 +       u32 sfr;
3479 +
3480 +       clk_enable(&hmatrix_clk);
3481 +       sfr = hmatrix_readl(SFR4);
3482 +       sfr |= mask;
3483 +       hmatrix_writel(SFR4, sfr);
3484 +       clk_disable(&hmatrix_clk);
3485 +}
3486 +
3487 +/* --------------------------------------------------------------------
3488 + *  System Timer/Counter (TC)
3489 + * -------------------------------------------------------------------- */
3490 +static struct resource at32_systc0_resource[] = {
3491 +       PBMEM(0xfff00c00),
3492 +       IRQ(22),
3493 +};
3494 +struct platform_device at32_systc0_device = {
3495 +       .name           = "systc",
3496 +       .id             = 0,
3497 +       .resource       = at32_systc0_resource,
3498 +       .num_resources  = ARRAY_SIZE(at32_systc0_resource),
3499 +};
3500 +DEV_CLK(pclk, at32_systc0, pbb, 3);
3501 +
3502  /* --------------------------------------------------------------------
3503   *  PIO
3504   * -------------------------------------------------------------------- */
3505 @@ -513,6 +588,9 @@
3506         platform_device_register(&at32_intc0_device);
3507         platform_device_register(&smc0_device);
3508         platform_device_register(&pdc_device);
3509 +       platform_device_register(&dmaca0_device);
3510 +
3511 +       platform_device_register(&at32_systc0_device);
3512
3513         platform_device_register(&pio0_device);
3514         platform_device_register(&pio1_device);
3515 @@ -816,22 +894,105 @@
3516  }
3517
3518  /* --------------------------------------------------------------------
3519 + *  TWI
3520 + * -------------------------------------------------------------------- */
3521 +
3522 +static struct resource atmel_twi0_resource[] = {
3523 +       PBMEM(0xffe00800),
3524 +       IRQ(5),
3525 +};
3526 +DEFINE_DEV(atmel_twi, 0);
3527 +DEV_CLK(pclk,atmel_twi0,pba,2);
3528 +
3529 +struct platform_device *__init
3530 +at32_add_device_twi(unsigned int id)
3531 +{
3532 +       struct platform_device *pdev;
3533 +
3534 +       switch (id) {
3535 +       case 0:
3536 +               pdev = &atmel_twi0_device;
3537 +               select_peripheral(PA(6),  PERIPH_A, 0); /* SDA  */
3538 +               select_peripheral(PA(7),  PERIPH_A, 0); /* SCL  */
3539 +               break;
3540 +
3541 +       default:
3542 +               return NULL;
3543 +       }
3544 +
3545 +       platform_device_register(pdev);
3546 +       return pdev;
3547 +}
3548 +
3549 +/* --------------------------------------------------------------------
3550 + * MMC
3551 + * -------------------------------------------------------------------- */
3552 +static struct mci_platform_data atmel_mci0_data = {
3553 +       .detect_pin     = GPIO_PIN_NONE,
3554 +       .wp_pin         = GPIO_PIN_NONE,
3555 +};
3556 +static struct resource atmel_mci0_resource[] = {
3557 +       PBMEM(0xfff02400),
3558 +       IRQ(28),
3559 +};
3560 +DEFINE_DEV_DATA(atmel_mci, 0);
3561 +DEV_CLK(mci_clk, atmel_mci0, pbb, 9);
3562 +
3563 +struct platform_device *__init
3564 +at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
3565 +{
3566 +       struct platform_device *pdev;
3567 +
3568 +       switch (id) {
3569 +       case 0:
3570 +               pdev = &atmel_mci0_device;
3571 +               select_peripheral(PA(10), PERIPH_A, 0); /* CLK   */
3572 +               select_peripheral(PA(11), PERIPH_A, 0); /* CMD   */
3573 +               select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */
3574 +               select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */
3575 +               select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
3576 +               select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
3577 +               break;
3578 +       default:
3579 +               return NULL;
3580 +       }
3581 +
3582 +       if (data) {
3583 +               if (data->detect_pin != GPIO_PIN_NONE)
3584 +                       at32_select_gpio(data->detect_pin, 0);
3585 +               if (data->wp_pin != GPIO_PIN_NONE)
3586 +                       at32_select_gpio(data->wp_pin, 0);
3587 +               memcpy(pdev->dev.platform_data, data,
3588 +                      sizeof(struct mci_platform_data));
3589 +       }
3590 +
3591 +       platform_device_register(pdev);
3592 +       return pdev;
3593 +}
3594 +
3595 +/* --------------------------------------------------------------------
3596   *  LCDC
3597   * -------------------------------------------------------------------- */
3598 -static struct lcdc_platform_data lcdc0_data;
3599 -static struct resource lcdc0_resource[] = {
3600 +static struct atmel_lcdfb_info atmel_lcdfb0_data;
3601 +static struct resource atmel_lcdfb0_resource[] = {
3602         {
3603                 .start          = 0xff000000,
3604                 .end            = 0xff000fff,
3605                 .flags          = IORESOURCE_MEM,
3606         },
3607         IRQ(1),
3608 +       {
3609 +               /* Placeholder for pre-allocated fb memory */
3610 +               .start          = 0x00000000,
3611 +               .end            = 0x00000000,
3612 +               .flags          = 0,
3613 +       },
3614  };
3615 -DEFINE_DEV_DATA(lcdc, 0);
3616 -DEV_CLK(hclk, lcdc0, hsb, 7);
3617 -static struct clk lcdc0_pixclk = {
3618 -       .name           = "pixclk",
3619 -       .dev            = &lcdc0_device.dev,
3620 +DEFINE_DEV_DATA(atmel_lcdfb, 0);
3621 +DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
3622 +static struct clk atmel_lcdfb0_pixclk = {
3623 +       .name           = "lcdc_clk",
3624 +       .dev            = &atmel_lcdfb0_device.dev,
3625         .mode           = genclk_mode,
3626         .get_rate       = genclk_get_rate,
3627         .set_rate       = genclk_set_rate,
3628 @@ -840,13 +1001,34 @@
3629  };
3630
3631  struct platform_device *__init
3632 -at32_add_device_lcdc(unsigned int id, struct lcdc_platform_data *data)
3633 +at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
3634 +                    unsigned long fbmem_start, unsigned long fbmem_len)
3635  {
3636         struct platform_device *pdev;
3637 +       struct atmel_lcdfb_info *info;
3638 +       struct fb_monspecs *monspecs;
3639 +       struct fb_videomode *modedb;
3640 +       unsigned int modedb_size;
3641 +
3642 +       /*
3643 +        * Do a deep copy of the fb data, monspecs and modedb. Make
3644 +        * sure all allocations are done before setting up the
3645 +        * portmux.
3646 +        */
3647 +       monspecs = kmemdup(data->default_monspecs,
3648 +                          sizeof(struct fb_monspecs), GFP_KERNEL);
3649 +       if (!monspecs)
3650 +               return NULL;
3651 +
3652 +       modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
3653 +       modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
3654 +       if (!modedb)
3655 +               goto err_dup_modedb;
3656 +       monspecs->modedb = modedb;
3657
3658         switch (id) {
3659         case 0:
3660 -               pdev = &lcdc0_device;
3661 +               pdev = &atmel_lcdfb0_device;
3662                 select_peripheral(PC(19), PERIPH_A, 0); /* CC     */
3663                 select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC  */
3664                 select_peripheral(PC(21), PERIPH_A, 0); /* PCLK   */
3665 @@ -879,16 +1061,133 @@
3666                 select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
3667                 select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
3668
3669 -               clk_set_parent(&lcdc0_pixclk, &pll0);
3670 -               clk_set_rate(&lcdc0_pixclk, clk_get_rate(&pll0));
3671 +               clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
3672 +               clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
3673 +               break;
3674 +
3675 +       default:
3676 +               goto err_invalid_id;
3677 +       }
3678 +
3679 +       if (fbmem_len) {
3680 +               pdev->resource[2].start = fbmem_start;
3681 +               pdev->resource[2].end = fbmem_start + fbmem_len - 1;
3682 +               pdev->resource[2].flags = IORESOURCE_MEM;
3683 +       }
3684 +
3685 +       info = pdev->dev.platform_data;
3686 +       memcpy(info, data, sizeof(struct atmel_lcdfb_info));
3687 +       info->default_monspecs = monspecs;
3688 +
3689 +       platform_device_register(pdev);
3690 +       return pdev;
3691 +
3692 +err_invalid_id:
3693 +       kfree(modedb);
3694 +err_dup_modedb:
3695 +       kfree(monspecs);
3696 +       return NULL;
3697 +}
3698 +
3699 +/* --------------------------------------------------------------------
3700 + *  USB Device Controller
3701 + * -------------------------------------------------------------------- */
3702 +static struct resource usba0_resource[] = {
3703 +       {
3704 +               .start          = 0xff300000,
3705 +               .end            = 0xff3fffff,
3706 +               .flags          = IORESOURCE_MEM,
3707 +       },
3708 +       PBMEM(0xfff03000),
3709 +       IRQ(31),
3710 +};
3711 +DEFINE_DEV(usba, 0);
3712 +DEV_CLK(pclk, usba0, pbb, 12);
3713 +DEV_CLK(hclk, usba0, hsb, 6);
3714 +
3715 +struct platform_device *__init at32_add_device_usba(unsigned int id)
3716 +{
3717 +       struct platform_device *pdev;
3718 +
3719 +       switch (id) {
3720 +       case 0:
3721 +               pdev = &usba0_device;
3722 +               /* USB pads are not multiplexed */
3723                 break;
3724 +       default:
3725 +               return NULL;
3726 +       }
3727 +
3728 +       platform_device_register(pdev);
3729 +       return pdev;
3730 +}
3731 +
3732 +/* --------------------------------------------------------------------
3733 + *  AC97C
3734 + * -------------------------------------------------------------------- */
3735 +static struct resource atmel_ac97c0_resource[] = {
3736 +       PBMEM(0xfff02800),
3737 +       IRQ(29),
3738 +};
3739 +DEFINE_DEV(atmel_ac97c, 0);
3740 +DEV_CLK(pclk, atmel_ac97c0, pbb, 10);
3741
3742 +struct platform_device *__init
3743 +at32_add_device_ac97c(unsigned int id)
3744 +{
3745 +       struct platform_device *pdev;
3746 +
3747 +       switch (id) {
3748 +       case 0:
3749 +               pdev = &atmel_ac97c0_device;
3750 +               select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */
3751 +               select_peripheral(PB(21), PERIPH_B, 0); /* SDO  */
3752 +               select_peripheral(PB(22), PERIPH_B, 0); /* SDI  */
3753 +               select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */
3754 +               break;
3755         default:
3756                 return NULL;
3757         }
3758
3759 -       memcpy(pdev->dev.platform_data, data,
3760 -              sizeof(struct lcdc_platform_data));
3761 +       platform_device_register(pdev);
3762 +       return pdev;
3763 +}
3764 +
3765 +/* --------------------------------------------------------------------
3766 + *  DAC
3767 + * -------------------------------------------------------------------- */
3768 +static struct resource abdac0_resource[] = {
3769 +       PBMEM(0xfff02000),
3770 +       IRQ(27),
3771 +};
3772 +DEFINE_DEV(abdac, 0);
3773 +DEV_CLK(pclk, abdac0, pbb, 8);
3774 +static struct clk abdac0_sample_clk = {
3775 +       .name           = "sample_clk",
3776 +       .dev            = &abdac0_device.dev,
3777 +       .mode           = genclk_mode,
3778 +       .get_rate       = genclk_get_rate,
3779 +       .set_rate       = genclk_set_rate,
3780 +       .set_parent     = genclk_set_parent,
3781 +       .index          = 6,
3782 +};
3783 +
3784 +struct platform_device *__init
3785 +at32_add_device_abdac(unsigned int id)
3786 +{
3787 +       struct platform_device *pdev;
3788 +
3789 +       switch (id) {
3790 +       case 0:
3791 +               pdev = &abdac0_device;
3792 +               select_peripheral(PB(20), PERIPH_A, 0); /* DATA1        */
3793 +               select_peripheral(PB(21), PERIPH_A, 0); /* DATA0        */
3794 +               select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1       */
3795 +               select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0       */
3796 +               break;
3797 +       default:
3798 +               return NULL;
3799 +       }
3800
3801         platform_device_register(pdev);
3802         return pdev;
3803 @@ -950,18 +1249,21 @@
3804         &pbb_clk,
3805         &at32_sm_pclk,
3806         &at32_intc0_pclk,
3807 +       &hmatrix_clk,
3808         &ebi_clk,
3809         &hramc_clk,
3810         &smc0_pclk,
3811         &smc0_mck,
3812         &pdc_hclk,
3813         &pdc_pclk,
3814 +       &dmaca0_hclk,
3815         &pico_clk,
3816         &pio0_mck,
3817         &pio1_mck,
3818         &pio2_mck,
3819         &pio3_mck,
3820         &pio4_mck,
3821 +       &at32_systc0_pclk,
3822         &atmel_usart0_usart,
3823         &atmel_usart1_usart,
3824         &atmel_usart2_usart,
3825 @@ -972,8 +1274,15 @@
3826         &macb1_pclk,
3827         &atmel_spi0_spi_clk,
3828         &atmel_spi1_spi_clk,
3829 -       &lcdc0_hclk,
3830 -       &lcdc0_pixclk,
3831 +       &atmel_twi0_pclk,
3832 +       &atmel_mci0_mci_clk,
3833 +       &atmel_lcdfb0_hck1,
3834 +       &atmel_lcdfb0_pixclk,
3835 +       &usba0_pclk,
3836 +       &usba0_hclk,
3837 +       &atmel_ac97c0_pclk,
3838 +       &abdac0_pclk,
3839 +       &abdac0_sample_clk,
3840         &gclk0,
3841         &gclk1,
3842         &gclk2,
3843 @@ -1012,7 +1321,8 @@
3844         genclk_init_parent(&gclk2);
3845         genclk_init_parent(&gclk3);
3846         genclk_init_parent(&gclk4);
3847 -       genclk_init_parent(&lcdc0_pixclk);
3848 +       genclk_init_parent(&atmel_lcdfb0_pixclk);
3849 +       genclk_init_parent(&abdac0_sample_clk);
3850
3851         /*
3852          * Turn on all clocks that have at least one user already, and
3853 @@ -1024,6 +1334,9 @@
3854         for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
3855                 struct clk *clk = at32_clock_list[i];
3856
3857 +               if (clk->users == 0)
3858 +                       continue;
3859 +
3860                 if (clk->mode == &cpu_clk_mode)
3861                         cpu_mask |= 1 << clk->index;
3862                 else if (clk->mode == &hsb_clk_mode)
3863 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/clock.c avr32-git/arch/avr32/mach-at32ap/clock.c
3864 --- linux-2.6.21.3/arch/avr32/mach-at32ap/clock.c       2007-05-24 23:22:47.000000000 +0200
3865 +++ avr32-git/arch/avr32/mach-at32ap/clock.c    2007-06-06 11:33:46.000000000 +0200
3866 @@ -18,7 +18,7 @@
3867
3868  #include "clock.h"
3869
3870 -static spinlock_t clk_lock = SPIN_LOCK_UNLOCKED;
3871 +static DEFINE_SPINLOCK(clk_lock);
3872
3873  struct clk *clk_get(struct device *dev, const char *id)
3874  {
3875 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/hmatrix.h avr32-git/arch/avr32/mach-at32ap/hmatrix.h
3876 --- linux-2.6.21.3/arch/avr32/mach-at32ap/hmatrix.h     1970-01-01 01:00:00.000000000 +0100
3877 +++ avr32-git/arch/avr32/mach-at32ap/hmatrix.h  2007-06-06 11:33:46.000000000 +0200
3878 @@ -0,0 +1,182 @@
3879 +/*
3880 + * Register definitions for High-Speed Bus Matrix
3881 + */
3882 +#ifndef __HMATRIX_H
3883 +#define __HMATRIX_H
3884 +
3885 +/* HMATRIX register offsets */
3886 +#define HMATRIX_MCFG0                          0x0000
3887 +#define HMATRIX_MCFG1                          0x0004
3888 +#define HMATRIX_MCFG2                          0x0008
3889 +#define HMATRIX_MCFG3                          0x000c
3890 +#define HMATRIX_MCFG4                          0x0010
3891 +#define HMATRIX_MCFG5                          0x0014
3892 +#define HMATRIX_MCFG6                          0x0018
3893 +#define HMATRIX_MCFG7                          0x001c
3894 +#define HMATRIX_MCFG8                          0x0020
3895 +#define HMATRIX_MCFG9                          0x0024
3896 +#define HMATRIX_MCFG10                         0x0028
3897 +#define HMATRIX_MCFG11                         0x002c
3898 +#define HMATRIX_MCFG12                         0x0030
3899 +#define HMATRIX_MCFG13                         0x0034
3900 +#define HMATRIX_MCFG14                         0x0038
3901 +#define HMATRIX_MCFG15                         0x003c
3902 +#define HMATRIX_SCFG0                          0x0040
3903 +#define HMATRIX_SCFG1                          0x0044
3904 +#define HMATRIX_SCFG2                          0x0048
3905 +#define HMATRIX_SCFG3                          0x004c
3906 +#define HMATRIX_SCFG4                          0x0050
3907 +#define HMATRIX_SCFG5                          0x0054
3908 +#define HMATRIX_SCFG6                          0x0058
3909 +#define HMATRIX_SCFG7                          0x005c
3910 +#define HMATRIX_SCFG8                          0x0060
3911 +#define HMATRIX_SCFG9                          0x0064
3912 +#define HMATRIX_SCFG10                         0x0068
3913 +#define HMATRIX_SCFG11                         0x006c
3914 +#define HMATRIX_SCFG12                         0x0070
3915 +#define HMATRIX_SCFG13                         0x0074
3916 +#define HMATRIX_SCFG14                         0x0078
3917 +#define HMATRIX_SCFG15                         0x007c
3918 +#define HMATRIX_PRAS0                          0x0080
3919 +#define HMATRIX_PRBS0                          0x0084
3920 +#define HMATRIX_PRAS1                          0x0088
3921 +#define HMATRIX_PRBS1                          0x008c
3922 +#define HMATRIX_PRAS2                          0x0090
3923 +#define HMATRIX_PRBS2                          0x0094
3924 +#define HMATRIX_PRAS3                          0x0098
3925 +#define HMATRIX_PRBS3                          0x009c
3926 +#define HMATRIX_PRAS4                          0x00a0
3927 +#define HMATRIX_PRBS4                          0x00a4
3928 +#define HMATRIX_PRAS5                          0x00a8
3929 +#define HMATRIX_PRBS5                          0x00ac
3930 +#define HMATRIX_PRAS6                          0x00b0
3931 +#define HMATRIX_PRBS6                          0x00b4
3932 +#define HMATRIX_PRAS7                          0x00b8
3933 +#define HMATRIX_PRBS7                          0x00bc
3934 +#define HMATRIX_PRAS8                          0x00c0
3935 +#define HMATRIX_PRBS8                          0x00c4
3936 +#define HMATRIX_PRAS9                          0x00c8
3937 +#define HMATRIX_PRBS9                          0x00cc
3938 +#define HMATRIX_PRAS10                         0x00d0
3939 +#define HMATRIX_PRBS10                         0x00d4
3940 +#define HMATRIX_PRAS11                         0x00d8
3941 +#define HMATRIX_PRBS11                         0x00dc
3942 +#define HMATRIX_PRAS12                         0x00e0
3943 +#define HMATRIX_PRBS12                         0x00e4
3944 +#define HMATRIX_PRAS13                         0x00e8
3945 +#define HMATRIX_PRBS13                         0x00ec
3946 +#define HMATRIX_PRAS14                         0x00f0
3947 +#define HMATRIX_PRBS14                         0x00f4
3948 +#define HMATRIX_PRAS15                         0x00f8
3949 +#define HMATRIX_PRBS15                         0x00fc
3950 +#define HMATRIX_MRCR                           0x0100
3951 +#define HMATRIX_SFR0                           0x0110
3952 +#define HMATRIX_SFR1                           0x0114
3953 +#define HMATRIX_SFR2                           0x0118
3954 +#define HMATRIX_SFR3                           0x011c
3955 +#define HMATRIX_SFR4                           0x0120
3956 +#define HMATRIX_SFR5                           0x0124
3957 +#define HMATRIX_SFR6                           0x0128
3958 +#define HMATRIX_SFR7                           0x012c
3959 +#define HMATRIX_SFR8                           0x0130
3960 +#define HMATRIX_SFR9                           0x0134
3961 +#define HMATRIX_SFR10                          0x0138
3962 +#define HMATRIX_SFR11                          0x013c
3963 +#define HMATRIX_SFR12                          0x0140
3964 +#define HMATRIX_SFR13                          0x0144
3965 +#define HMATRIX_SFR14                          0x0148
3966 +#define HMATRIX_SFR15                          0x014c
3967 +
3968 +/* Bitfields in MCFGx */
3969 +#define HMATRIX_ULBT_OFFSET                    0
3970 +#define HMATRIX_ULBT_SIZE                      3
3971 +
3972 +/* Bitfields in SCFGx */
3973 +#define HMATRIX_SLOT_CYCLE_OFFSET              0
3974 +#define HMATRIX_SLOT_CYCLE_SIZE                        8
3975 +#define HMATRIX_DEFMSTR_TYPE_OFFSET            16
3976 +#define HMATRIX_DEFMSTR_TYPE_SIZE              2
3977 +#define HMATRIX_FIXED_DEFMSTR_OFFSET           18
3978 +#define HMATRIX_FIXED_DEFMSTR_SIZE             4
3979 +#define HMATRIX_ARBT_OFFSET                    24
3980 +#define HMATRIX_ARBT_SIZE                      2
3981 +
3982 +/* Bitfields in PRASx */
3983 +#define HMATRIX_M0PR_OFFSET                    0
3984 +#define HMATRIX_M0PR_SIZE                      4
3985 +#define HMATRIX_M1PR_OFFSET                    4
3986 +#define HMATRIX_M1PR_SIZE                      4
3987 +#define HMATRIX_M2PR_OFFSET                    8
3988 +#define HMATRIX_M2PR_SIZE                      4
3989 +#define HMATRIX_M3PR_OFFSET                    12
3990 +#define HMATRIX_M3PR_SIZE                      4
3991 +#define HMATRIX_M4PR_OFFSET                    16
3992 +#define HMATRIX_M4PR_SIZE                      4
3993 +#define HMATRIX_M5PR_OFFSET                    20
3994 +#define HMATRIX_M5PR_SIZE                      4
3995 +#define HMATRIX_M6PR_OFFSET                    24
3996 +#define HMATRIX_M6PR_SIZE                      4
3997 +#define HMATRIX_M7PR_OFFSET                    28
3998 +#define HMATRIX_M7PR_SIZE                      4
3999 +
4000 +/* Bitfields in PRBSx */
4001 +#define HMATRIX_M8PR_OFFSET                    0
4002 +#define HMATRIX_M8PR_SIZE                      4
4003 +#define HMATRIX_M9PR_OFFSET                    4
4004 +#define HMATRIX_M9PR_SIZE                      4
4005 +#define HMATRIX_M10PR_OFFSET                   8
4006 +#define HMATRIX_M10PR_SIZE                     4
4007 +#define HMATRIX_M11PR_OFFSET                   12
4008 +#define HMATRIX_M11PR_SIZE                     4
4009 +#define HMATRIX_M12PR_OFFSET                   16
4010 +#define HMATRIX_M12PR_SIZE                     4
4011 +#define HMATRIX_M13PR_OFFSET                   20
4012 +#define HMATRIX_M13PR_SIZE                     4
4013 +#define HMATRIX_M14PR_OFFSET                   24
4014 +#define HMATRIX_M14PR_SIZE                     4
4015 +#define HMATRIX_M15PR_OFFSET                   28
4016 +#define HMATRIX_M15PR_SIZE                     4
4017 +
4018 +/* Bitfields in SFR4 */
4019 +#define HMATRIX_CS1A_OFFSET                    1
4020 +#define HMATRIX_CS1A_SIZE                      1
4021 +#define HMATRIX_CS3A_OFFSET                    3
4022 +#define HMATRIX_CS3A_SIZE                      1
4023 +#define HMATRIX_CS4A_OFFSET                    4
4024 +#define HMATRIX_CS4A_SIZE                      1
4025 +#define HMATRIX_CS5A_OFFSET                    5
4026 +#define HMATRIX_CS5A_SIZE                      1
4027 +#define HMATRIX_DBPUC_OFFSET                   8
4028 +#define HMATRIX_DBPUC_SIZE                     1
4029 +
4030 +/* Constants for ULBT */
4031 +#define HMATRIX_ULBT_INFINITE                  0
4032 +#define HMATRIX_ULBT_SINGLE                    1
4033 +#define HMATRIX_ULBT_FOUR_BEAT                 2
4034 +#define HMATRIX_ULBT_EIGHT_BEAT                        3
4035 +#define HMATRIX_ULBT_SIXTEEN_BEAT              4
4036 +
4037 +/* Constants for DEFMSTR_TYPE */
4038 +#define HMATRIX_DEFMSTR_TYPE_NO_DEFAULT                0
4039 +#define HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT      1
4040 +#define HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT     2
4041 +
4042 +/* Constants for ARBT */
4043 +#define HMATRIX_ARBT_ROUND_ROBIN               0
4044 +#define HMATRIX_ARBT_FIXED_PRIORITY            1
4045 +
4046 +/* Bit manipulation macros */
4047 +#define HMATRIX_BIT(name)                                      \
4048 +       (1 << HMATRIX_##name##_OFFSET)
4049 +#define HMATRIX_BF(name,value)                                 \
4050 +       (((value) & ((1 << HMATRIX_##name##_SIZE) - 1))         \
4051 +        << HMATRIX_##name##_OFFSET)
4052 +#define HMATRIX_BFEXT(name,value)                              \
4053 +       (((value) >> HMATRIX_##name##_OFFSET)                   \
4054 +        & ((1 << HMATRIX_##name##_SIZE) - 1))
4055 +#define HMATRIX_BFINS(name,value,old)                          \
4056 +       (((old) & ~(((1 << HMATRIX_##name##_SIZE) - 1)          \
4057 +                   << HMATRIX_##name##_OFFSET))                \
4058 +        | HMATRIX_BF(name,value))
4059 +
4060 +#endif /* __HMATRIX_H */
4061 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/hsmc.c avr32-git/arch/avr32/mach-at32ap/hsmc.c
4062 --- linux-2.6.21.3/arch/avr32/mach-at32ap/hsmc.c        2007-05-24 23:22:47.000000000 +0200
4063 +++ avr32-git/arch/avr32/mach-at32ap/hsmc.c     2007-06-06 11:33:46.000000000 +0200
4064 @@ -75,12 +75,35 @@
4065                 return -EINVAL;
4066         }
4067
4068 +       switch (config->nwait_mode) {
4069 +       case 0:
4070 +               mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_DISABLED);
4071 +               break;
4072 +       case 1:
4073 +               mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_RESERVED);
4074 +               break;
4075 +       case 2:
4076 +               mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_FROZEN);
4077 +               break;
4078 +       case 3:
4079 +               mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_READY);
4080 +               break;
4081 +       default:
4082 +               return -EINVAL;
4083 +       }
4084 +
4085 +       if (config->tdf_cycles) {
4086 +               mode |= HSMC_BF(TDF_CYCLES, config->tdf_cycles);
4087 +       }
4088 +
4089         if (config->nrd_controlled)
4090                 mode |= HSMC_BIT(READ_MODE);
4091         if (config->nwe_controlled)
4092                 mode |= HSMC_BIT(WRITE_MODE);
4093         if (config->byte_write)
4094                 mode |= HSMC_BIT(BAT);
4095 +       if (config->tdf_mode)
4096 +               mode |= HSMC_BIT(TDF_MODE);
4097
4098         pr_debug("smc cs%d: setup/%08x pulse/%08x cycle/%08x mode/%08x\n",
4099                  cs, setup, pulse, cycle, mode);
4100 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/Kconfig avr32-git/arch/avr32/mach-at32ap/Kconfig
4101 --- linux-2.6.21.3/arch/avr32/mach-at32ap/Kconfig       1970-01-01 01:00:00.000000000 +0100
4102 +++ avr32-git/arch/avr32/mach-at32ap/Kconfig    2007-06-06 11:33:46.000000000 +0200
4103 @@ -0,0 +1,31 @@
4104 +if PLATFORM_AT32AP
4105 +
4106 +menu "Atmel AVR32 AP options"
4107 +
4108 +choice
4109 +       prompt "AT32AP7000 static memory bus width"
4110 +       depends on CPU_AT32AP7000
4111 +       default AP7000_16_BIT_SMC
4112 +       help
4113 +         Define the width of the AP7000 external static memory interface.
4114 +         This is used to determine how to mangle the address and/or data
4115 +         when doing little-endian port access.
4116 +
4117 +         The current code can only support a single external memory bus
4118 +         width for all chip selects, excluding the flash (which is using
4119 +         raw access and is thus not affected by any of this.)
4120 +
4121 +config AP7000_32_BIT_SMC
4122 +       bool "32 bit"
4123 +
4124 +config AP7000_16_BIT_SMC
4125 +       bool "16 bit"
4126 +
4127 +config AP7000_8_BIT_SMC
4128 +       bool "8 bit"
4129 +
4130 +endchoice
4131 +
4132 +endmenu
4133 +
4134 +endif # PLATFORM_AT32AP
4135 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/Makefile avr32-git/arch/avr32/mach-at32ap/Makefile
4136 --- linux-2.6.21.3/arch/avr32/mach-at32ap/Makefile      2007-05-24 23:22:47.000000000 +0200
4137 +++ avr32-git/arch/avr32/mach-at32ap/Makefile   2007-06-06 11:33:46.000000000 +0200
4138 @@ -1,2 +1,3 @@
4139  obj-y                          += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
4140  obj-$(CONFIG_CPU_AT32AP7000)   += at32ap7000.o
4141 +obj-$(CONFIG_CPU_AT32AP7000)   += time-tc.o
4142 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mach-at32ap/time-tc.c avr32-git/arch/avr32/mach-at32ap/time-tc.c
4143 --- linux-2.6.21.3/arch/avr32/mach-at32ap/time-tc.c     1970-01-01 01:00:00.000000000 +0100
4144 +++ avr32-git/arch/avr32/mach-at32ap/time-tc.c  2007-06-06 11:33:46.000000000 +0200
4145 @@ -0,0 +1,218 @@
4146 +/*
4147 + * Copyright (C) 2004-2007 Atmel Corporation
4148 + *
4149 + * Based on MIPS implementation arch/mips/kernel/time.c
4150 + *   Copyright 2001 MontaVista Software Inc.
4151 + *
4152 + * This program is free software; you can redistribute it and/or modify
4153 + * it under the terms of the GNU General Public License version 2 as
4154 + * published by the Free Software Foundation.
4155 + */
4156 +
4157 +#include <linux/clk.h>
4158 +#include <linux/clocksource.h>
4159 +#include <linux/time.h>
4160 +#include <linux/module.h>
4161 +#include <linux/interrupt.h>
4162 +#include <linux/irq.h>
4163 +#include <linux/kernel_stat.h>
4164 +#include <linux/errno.h>
4165 +#include <linux/init.h>
4166 +#include <linux/profile.h>
4167 +#include <linux/sysdev.h>
4168 +#include <linux/err.h>
4169 +
4170 +#include <asm/div64.h>
4171 +#include <asm/sysreg.h>
4172 +#include <asm/io.h>
4173 +#include <asm/sections.h>
4174 +
4175 +#include <asm/arch/time.h>
4176 +
4177 +/* how many counter cycles in a jiffy? */
4178 +static u32 cycles_per_jiffy;
4179 +
4180 +/* the count value for the next timer interrupt */
4181 +static u32 expirelo;
4182 +
4183 +/* the I/O registers of the TC module */
4184 +static void __iomem *ioregs;
4185 +
4186 +cycle_t read_cycle_count(void)
4187 +{
4188 +       return (cycle_t)timer_read(ioregs, 0, CV);
4189 +}
4190 +
4191 +struct clocksource clocksource_avr32 = {
4192 +       .name           = "avr32",
4193 +       .rating         = 342,
4194 +       .read           = read_cycle_count,
4195 +       .mask           = CLOCKSOURCE_MASK(16),
4196 +       .shift          = 16,
4197 +       .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
4198 +};
4199 +
4200 +static void avr32_timer_ack(void)
4201 +{
4202 +       u16 count = expirelo;
4203 +
4204 +       /* Ack this timer interrupt and set the next one, use a u16
4205 +        * variable so it will wrap around correctly */
4206 +       count += cycles_per_jiffy;
4207 +       expirelo = count;
4208 +       timer_write(ioregs, 0, RC, expirelo);
4209 +
4210 +       /* Check to see if we have missed any timer interrupts */
4211 +       count = timer_read(ioregs, 0, CV);
4212 +       if ((count - expirelo) < 0x7fff) {
4213 +               expirelo = count + cycles_per_jiffy;
4214 +               timer_write(ioregs, 0, RC, expirelo);
4215 +       }
4216 +}
4217 +
4218 +u32 avr32_hpt_read(void)
4219 +{
4220 +       return timer_read(ioregs, 0, CV);
4221 +}
4222 +
4223 +static int avr32_timer_calc_div_and_set_jiffies(struct clk *pclk)
4224 +{
4225 +       unsigned int cycles_max = (clocksource_avr32.mask + 1) / 2;
4226 +       unsigned int divs[] = { 4, 8, 16, 32 };
4227 +       int divs_size = sizeof(divs) / sizeof(*divs);
4228 +       int i = 0;
4229 +       unsigned long count_hz;
4230 +       unsigned long shift;
4231 +       unsigned long mult;
4232 +       int clock_div = -1;
4233 +       u64 tmp;
4234 +
4235 +       shift = clocksource_avr32.shift;
4236 +
4237 +       do {
4238 +               count_hz = clk_get_rate(pclk) / divs[i];
4239 +               mult = clocksource_hz2mult(count_hz, shift);
4240 +               clocksource_avr32.mult = mult;
4241 +
4242 +               tmp = TICK_NSEC;
4243 +               tmp <<= shift;
4244 +               tmp += mult / 2;
4245 +               do_div(tmp, mult);
4246 +
4247 +               cycles_per_jiffy = tmp;
4248 +       } while (cycles_per_jiffy > cycles_max && ++i < divs_size);
4249 +
4250 +       clock_div = i + 1;
4251 +
4252 +       if (clock_div > divs_size) {
4253 +               pr_debug("timer: could not calculate clock divider\n");
4254 +               return -EFAULT;
4255 +       }
4256 +
4257 +       /* Set the clock divider */
4258 +       timer_write(ioregs, 0, CMR, TIMER_BF(CMR_TCCLKS, clock_div));
4259 +
4260 +       return 0;
4261 +}
4262 +
4263 +int avr32_hpt_init(unsigned int count)
4264 +{
4265 +       struct resource *regs;
4266 +       struct clk *pclk;
4267 +       int irq = -1;
4268 +       int ret = 0;
4269 +
4270 +       ret = -ENXIO;
4271 +
4272 +       irq = platform_get_irq(&at32_systc0_device, 0);
4273 +       if (irq < 0) {
4274 +               pr_debug("timer: could not get irq\n");
4275 +               goto out_error;
4276 +       }
4277 +
4278 +       pclk = clk_get(&at32_systc0_device.dev, "pclk");
4279 +       if (IS_ERR(pclk)) {
4280 +               pr_debug("timer: could not get clk: %ld\n", PTR_ERR(pclk));
4281 +               goto out_error;
4282 +       }
4283 +       clk_enable(pclk);
4284 +
4285 +       regs = platform_get_resource(&at32_systc0_device, IORESOURCE_MEM, 0);
4286 +       if (!regs) {
4287 +               pr_debug("timer: could not get resource\n");
4288 +               goto out_error_clk;
4289 +       }
4290 +
4291 +       ioregs = ioremap(regs->start, regs->end - regs->start + 1);
4292 +       if (!ioregs) {
4293 +               pr_debug("timer: could not get ioregs\n");
4294 +               goto out_error_clk;
4295 +       }
4296 +
4297 +       ret = avr32_timer_calc_div_and_set_jiffies(pclk);
4298 +       if (ret)
4299 +               goto out_error_io;
4300 +
4301 +       ret = setup_irq(irq, &timer_irqaction);
4302 +       if (ret) {
4303 +               pr_debug("timer: could not request irq %d: %d\n",
4304 +                               irq, ret);
4305 +               goto out_error_io;
4306 +       }
4307 +
4308 +       expirelo = (timer_read(ioregs, 0, CV) / cycles_per_jiffy + 1)
4309 +               * cycles_per_jiffy;
4310 +
4311 +       /* Enable clock and interrupts on RC compare */
4312 +       timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_CLKEN));
4313 +       timer_write(ioregs, 0, IER, TIMER_BIT(IER_CPCS));
4314 +       /* Set cycles to first interrupt */
4315 +       timer_write(ioregs, 0,  RC, expirelo);
4316 +
4317 +       printk(KERN_INFO "timer: AT32AP system timer/counter at 0x%p irq %d\n",
4318 +                       ioregs, irq);
4319 +
4320 +       return 0;
4321 +
4322 +out_error_io:
4323 +       iounmap(ioregs);
4324 +out_error_clk:
4325 +       clk_put(pclk);
4326 +out_error:
4327 +       return ret;
4328 +}
4329 +
4330 +int avr32_hpt_start(void)
4331 +{
4332 +       timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_SWTRG));
4333 +       return 0;
4334 +}
4335 +
4336 +irqreturn_t timer_interrupt(int irq, void *dev_id)
4337 +{
4338 +       unsigned int sr = timer_read(ioregs, 0, SR);
4339 +
4340 +       if (sr & TIMER_BIT(SR_CPCS)) {
4341 +               /* ack timer interrupt and try to set next interrupt */
4342 +               avr32_timer_ack();
4343 +
4344 +               /*
4345 +                * Call the generic timer interrupt handler
4346 +                */
4347 +               write_seqlock(&xtime_lock);
4348 +               do_timer(1);
4349 +               write_sequnlock(&xtime_lock);
4350 +
4351 +               /*
4352 +                * In UP mode, we call local_timer_interrupt() to do profiling
4353 +                * and process accounting.
4354 +                *
4355 +                * SMP is not supported yet.
4356 +                */
4357 +               local_timer_interrupt(irq, dev_id);
4358 +
4359 +               return IRQ_HANDLED;
4360 +       }
4361 +
4362 +       return IRQ_NONE;
4363 +}
4364 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/Makefile avr32-git/arch/avr32/Makefile
4365 --- linux-2.6.21.3/arch/avr32/Makefile  2007-05-24 23:22:47.000000000 +0200
4366 +++ avr32-git/arch/avr32/Makefile       2007-06-06 11:33:46.000000000 +0200
4367 @@ -16,7 +16,7 @@
4368  CFLAGS_MODULE  += -mno-relax
4369  LDFLAGS_vmlinux        += --relax
4370
4371 -cpuflags-$(CONFIG_CPU_AP7000)  += -mcpu=ap7000
4372 +cpuflags-$(CONFIG_CPU_AT32AP7000)      += -mcpu=ap7000
4373
4374  CFLAGS         += $(cpuflags-y)
4375  AFLAGS         += $(cpuflags-y)
4376 @@ -27,9 +27,11 @@
4377  head-y                                 += arch/avr32/kernel/head.o
4378  core-$(CONFIG_PLATFORM_AT32AP)         += arch/avr32/mach-at32ap/
4379  core-$(CONFIG_BOARD_ATSTK1000)         += arch/avr32/boards/atstk1000/
4380 +core-$(CONFIG_BOARD_ATNGW100)          += arch/avr32/boards/atngw100/
4381  core-$(CONFIG_LOADER_U_BOOT)           += arch/avr32/boot/u-boot/
4382  core-y                                 += arch/avr32/kernel/
4383  core-y                                 += arch/avr32/mm/
4384 +drivers-y                              += arch/avr32/drivers/
4385  libs-y                                 += arch/avr32/lib/
4386
4387  archincdir-$(CONFIG_PLATFORM_AT32AP)   := arch-at32ap
4388 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mm/dma-coherent.c avr32-git/arch/avr32/mm/dma-coherent.c
4389 --- linux-2.6.21.3/arch/avr32/mm/dma-coherent.c 2007-05-24 23:22:47.000000000 +0200
4390 +++ avr32-git/arch/avr32/mm/dma-coherent.c      2007-06-06 11:33:46.000000000 +0200
4391 @@ -112,16 +112,21 @@
4392  }
4393  EXPORT_SYMBOL(dma_free_coherent);
4394
4395 -#if 0
4396  void *dma_alloc_writecombine(struct device *dev, size_t size,
4397                              dma_addr_t *handle, gfp_t gfp)
4398  {
4399         struct page *page;
4400 +       dma_addr_t phys;
4401
4402         page = __dma_alloc(dev, size, handle, gfp);
4403 +       if (!page)
4404 +               return NULL;
4405 +
4406 +       phys = page_to_phys(page);
4407 +       *handle = phys;
4408
4409         /* Now, map the page into P3 with write-combining turned on */
4410 -       return __ioremap(page_to_phys(page), size, _PAGE_BUFFER);
4411 +       return __ioremap(phys, size, _PAGE_BUFFER);
4412  }
4413  EXPORT_SYMBOL(dma_alloc_writecombine);
4414
4415 @@ -132,8 +137,7 @@
4416
4417         iounmap(cpu_addr);
4418
4419 -       page = bus_to_page(handle);
4420 +       page = phys_to_page(handle);
4421         __dma_free(dev, size, page, handle);
4422  }
4423  EXPORT_SYMBOL(dma_free_writecombine);
4424 -#endif
4425 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mm/fault.c avr32-git/arch/avr32/mm/fault.c
4426 --- linux-2.6.21.3/arch/avr32/mm/fault.c        2007-05-24 23:22:47.000000000 +0200
4427 +++ avr32-git/arch/avr32/mm/fault.c     2007-06-06 11:33:46.000000000 +0200
4428 @@ -12,73 +12,46 @@
4429  #include <linux/mm.h>
4430  #include <linux/module.h>
4431  #include <linux/pagemap.h>
4432 +#include <linux/kprobes.h>
4433
4434  #include <asm/kdebug.h>
4435  #include <asm/mmu_context.h>
4436  #include <asm/sysreg.h>
4437 -#include <asm/uaccess.h>
4438  #include <asm/tlb.h>
4439 -
4440 -#ifdef DEBUG
4441 -static void dump_code(unsigned long pc)
4442 -{
4443 -       char *p = (char *)pc;
4444 -       char val;
4445 -       int i;
4446 -
4447 -
4448 -       printk(KERN_DEBUG "Code:");
4449 -       for (i = 0; i < 16; i++) {
4450 -               if (__get_user(val, p + i))
4451 -                       break;
4452 -               printk(" %02x", val);
4453 -       }
4454 -       printk("\n");
4455 -}
4456 -#endif
4457 +#include <asm/uaccess.h>
4458
4459  #ifdef CONFIG_KPROBES
4460 -ATOMIC_NOTIFIER_HEAD(notify_page_fault_chain);
4461 -
4462 -/* Hook to register for page fault notifications */
4463 -int register_page_fault_notifier(struct notifier_block *nb)
4464 +static inline int notify_page_fault(struct pt_regs *regs, int trap)
4465  {
4466 -       return atomic_notifier_chain_register(&notify_page_fault_chain, nb);
4467 -}
4468 +       int ret = 0;
4469
4470 -int unregister_page_fault_notifier(struct notifier_block *nb)
4471 -{
4472 -       return atomic_notifier_chain_unregister(&notify_page_fault_chain, nb);
4473 -}
4474 +       if (!user_mode(regs)) {
4475 +               if (kprobe_running() && kprobe_fault_handler(regs, trap))
4476 +                       ret = 1;
4477 +       }
4478
4479 -static inline int notify_page_fault(enum die_val val, struct pt_regs *regs,
4480 -                                   int trap, int sig)
4481 -{
4482 -       struct die_args args = {
4483 -               .regs = regs,
4484 -               .trapnr = trap,
4485 -       };
4486 -       return atomic_notifier_call_chain(&notify_page_fault_chain, val, &args);
4487 +       return ret;
4488  }
4489  #else
4490 -static inline int notify_page_fault(enum die_val val, struct pt_regs *regs,
4491 -                                   int trap, int sig)
4492 +static inline int notify_page_fault(struct pt_regs *regs, int trap)
4493  {
4494 -       return NOTIFY_DONE;
4495 +       return 0;
4496  }
4497  #endif
4498
4499 +int exception_trace = 1;
4500 +
4501  /*
4502   * This routine handles page faults. It determines the address and the
4503   * problem, and then passes it off to one of the appropriate routines.
4504   *
4505   * ecr is the Exception Cause Register. Possible values are:
4506 - *   5:  Page not found (instruction access)
4507   *   6:  Protection fault (instruction access)
4508 - *   12: Page not found (read access)
4509 - *   13: Page not found (write access)
4510 - *   14: Protection fault (read access)
4511 - *   15: Protection fault (write access)
4512 + *   15: Protection fault (read access)
4513 + *   16: Protection fault (write access)
4514 + *   20: Page not found (instruction access)
4515 + *   24: Page not found (read access)
4516 + *   28: Page not found (write access)
4517   */
4518  asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
4519  {
4520 @@ -88,10 +61,11 @@
4521         const struct exception_table_entry *fixup;
4522         unsigned long address;
4523         unsigned long page;
4524 -       int writeaccess = 0;
4525 +       int writeaccess;
4526 +       long signr;
4527 +       int code;
4528
4529 -       if (notify_page_fault(DIE_PAGE_FAULT, regs,
4530 -                             ecr, SIGSEGV) == NOTIFY_STOP)
4531 +       if (notify_page_fault(regs, ecr))
4532                 return;
4533
4534         address = sysreg_read(TLBEAR);
4535 @@ -99,6 +73,9 @@
4536         tsk = current;
4537         mm = tsk->mm;
4538
4539 +       signr = SIGSEGV;
4540 +       code = SEGV_MAPERR;
4541 +
4542         /*
4543          * If we're in an interrupt or have no user context, we must
4544          * not take the fault...
4545 @@ -125,7 +102,9 @@
4546          * can handle it...
4547          */
4548  good_area:
4549 -       //pr_debug("good area: vm_flags = 0x%lx\n", vma->vm_flags);
4550 +       code = SEGV_ACCERR;
4551 +       writeaccess = 0;
4552 +
4553         switch (ecr) {
4554         case ECR_PROTECTION_X:
4555         case ECR_TLB_MISS_X:
4556 @@ -176,46 +155,24 @@
4557          * map. Fix it, but check if it's kernel or user first...
4558          */
4559  bad_area:
4560 -       pr_debug("Bad area [%s:%u]: addr %08lx, ecr %lu\n",
4561 -                tsk->comm, tsk->pid, address, ecr);
4562 -
4563         up_read(&mm->mmap_sem);
4564
4565         if (user_mode(regs)) {
4566 -               /* Hmm...we have to pass address and ecr somehow... */
4567 -               /* tsk->thread.address = address;
4568 -                  tsk->thread.error_code = ecr; */
4569 -#ifdef DEBUG
4570 -               show_regs(regs);
4571 -               dump_code(regs->pc);
4572 -
4573 -               page = sysreg_read(PTBR);
4574 -               printk("ptbr = %08lx", page);
4575 -               if (page) {
4576 -                       page = ((unsigned long *)page)[address >> 22];
4577 -                       printk(" pgd = %08lx", page);
4578 -                       if (page & _PAGE_PRESENT) {
4579 -                               page &= PAGE_MASK;
4580 -                               address &= 0x003ff000;
4581 -                               page = ((unsigned long *)__va(page))[address >> PAGE_SHIFT];
4582 -                               printk(" pte = %08lx\n", page);
4583 -                       }
4584 -               }
4585 -#endif
4586 -               pr_debug("Sending SIGSEGV to PID %d...\n",
4587 -                       tsk->pid);
4588 -               force_sig(SIGSEGV, tsk);
4589 +               if (exception_trace && printk_ratelimit())
4590 +                       printk("%s%s[%d]: segfault at %08lx pc %08lx "
4591 +                              "sp %08lx ecr %lu\n",
4592 +                              is_init(tsk) ? KERN_EMERG : KERN_INFO,
4593 +                              tsk->comm, tsk->pid, address, regs->pc,
4594 +                              regs->sp, ecr);
4595 +               _exception(SIGSEGV, regs, code, address);
4596                 return;
4597         }
4598
4599  no_context:
4600 -       pr_debug("No context\n");
4601 -
4602         /* Are we prepared to handle this kernel fault? */
4603         fixup = search_exception_tables(regs->pc);
4604         if (fixup) {
4605                 regs->pc = fixup->fixup;
4606 -               pr_debug("Found fixup at %08lx\n", fixup->fixup);
4607                 return;
4608         }
4609
4610 @@ -230,7 +187,6 @@
4611                 printk(KERN_ALERT
4612                        "Unable to handle kernel paging request");
4613         printk(" at virtual address %08lx\n", address);
4614 -       printk(KERN_ALERT "pc = %08lx\n", regs->pc);
4615
4616         page = sysreg_read(PTBR);
4617         printk(KERN_ALERT "ptbr = %08lx", page);
4618 @@ -241,20 +197,20 @@
4619                         page &= PAGE_MASK;
4620                         address &= 0x003ff000;
4621                         page = ((unsigned long *)__va(page))[address >> PAGE_SHIFT];
4622 -                       printk(" pte = %08lx\n", page);
4623 +                       printk(" pte = %08lx", page);
4624                 }
4625         }
4626 -       die("\nOops", regs, ecr);
4627 -       do_exit(SIGKILL);
4628 +       printk("\n");
4629 +       die("Kernel access of bad area", regs, signr);
4630 +       return;
4631
4632         /*
4633          * We ran out of memory, or some other thing happened to us
4634          * that made us unable to handle the page fault gracefully.
4635          */
4636  out_of_memory:
4637 -       printk("Out of memory\n");
4638         up_read(&mm->mmap_sem);
4639 -       if (current->pid == 1) {
4640 +       if (is_init(current)) {
4641                 yield();
4642                 down_read(&mm->mmap_sem);
4643                 goto survive;
4644 @@ -267,21 +223,20 @@
4645  do_sigbus:
4646         up_read(&mm->mmap_sem);
4647
4648 -       /*
4649 -        * Send a sigbus, regardless of whether we were in kernel or
4650 -        * user mode.
4651 -        */
4652 -       /* address, error_code, trap_no, ... */
4653 -#ifdef DEBUG
4654 -       show_regs(regs);
4655 -       dump_code(regs->pc);
4656 -#endif
4657 -       pr_debug("Sending SIGBUS to PID %d...\n", tsk->pid);
4658 -       force_sig(SIGBUS, tsk);
4659 -
4660         /* Kernel mode? Handle exceptions or die */
4661 +       signr = SIGBUS;
4662 +       code = BUS_ADRERR;
4663         if (!user_mode(regs))
4664                 goto no_context;
4665 +
4666 +       if (exception_trace)
4667 +               printk("%s%s[%d]: bus error at %08lx pc %08lx "
4668 +                      "sp %08lx ecr %lu\n",
4669 +                      is_init(tsk) ? KERN_EMERG : KERN_INFO,
4670 +                      tsk->comm, tsk->pid, address, regs->pc,
4671 +                      regs->sp, ecr);
4672 +
4673 +       _exception(SIGBUS, regs, BUS_ADRERR, address);
4674  }
4675
4676  asmlinkage void do_bus_error(unsigned long addr, int write_access,
4677 @@ -292,8 +247,7 @@
4678                addr, write_access ? "write" : "read");
4679         printk(KERN_INFO "DTLB dump:\n");
4680         dump_dtlb();
4681 -       die("Bus Error", regs, write_access);
4682 -       do_exit(SIGKILL);
4683 +       die("Bus Error", regs, SIGKILL);
4684  }
4685
4686  /*
4687 diff -Nur -x .gitignore -x .git linux-2.6.21.3/arch/avr32/mm/init.c avr32-git/arch/avr32/mm/init.c
4688 --- linux-2.6.21.3/arch/avr32/mm/init.c 2007-05-24 23:22:47.000000000 +0200
4689 +++ avr32-git/arch/avr32/mm/init.c      2007-06-06 11:33:46.000000000 +0200
4690 @@ -10,11 +10,9 @@
4691  #include <linux/mm.h>
4692  #include <linux/swap.h>
4693  #include <linux/init.h>
4694 -#include <linux/initrd.h>
4695  #include <linux/mmzone.h>
4696  #include <linux/bootmem.h>
4697  #include <linux/pagemap.h>
4698 -#include <linux/pfn.h>
4699  #include <linux/nodemask.h>
4700
4701  #include <asm/page.h>
4702 @@ -78,242 +76,6 @@
4703         printk ("%d pages swap cached\n", cached);
4704  }
4705
4706 -static void __init print_memory_map(const char *what,
4707 -                                   struct tag_mem_range *mem)
4708 -{
4709 -       printk ("%s:\n", what);
4710 -       for (; mem; mem = mem->next) {
4711 -               printk ("  %08lx - %08lx\n",
4712 -                       (unsigned long)mem->addr,
4713 -                       (unsigned long)(mem->addr + mem->size));
4714 -       }
4715 -}
4716 -
4717 -#define MAX_LOWMEM     HIGHMEM_START
4718 -#define MAX_LOWMEM_PFN PFN_DOWN(MAX_LOWMEM)
4719 -
4720 -/*
4721 - * Sort a list of memory regions in-place by ascending address.
4722 - *
4723 - * We're using bubble sort because we only have singly linked lists
4724 - * with few elements.
4725 - */
4726 -static void __init sort_mem_list(struct tag_mem_range **pmem)
4727 -{
4728 -       int done;
4729 -       struct tag_mem_range **a, **b;
4730 -
4731 -       if (!*pmem)
4732 -               return;
4733 -
4734 -       do {
4735 -               done = 1;
4736 -               a = pmem, b = &(*pmem)->next;
4737 -               while (*b) {
4738 -                       if ((*a)->addr > (*b)->addr) {
4739 -                               struct tag_mem_range *tmp;
4740 -                               tmp = (*b)->next;
4741 -                               (*b)->next = *a;
4742 -                               *a = *b;
4743 -                               *b = tmp;
4744 -                               done = 0;
4745 -                       }
4746 -                       a = &(*a)->next;
4747 -                       b = &(*a)->next;
4748 -               }
4749 -       } while (!done);
4750 -}
4751 -
4752 -/*
4753 - * Find a free memory region large enough for storing the
4754 - * bootmem bitmap.
4755 - */
4756 -static unsigned long __init
4757 -find_bootmap_pfn(const struct tag_mem_range *mem)
4758 -{
4759 -       unsigned long bootmap_pages, bootmap_len;
4760 -       unsigned long node_pages = PFN_UP(mem->size);
4761 -       unsigned long bootmap_addr = mem->addr;
4762 -       struct tag_mem_range *reserved = mem_reserved;
4763 -       struct tag_mem_range *ramdisk = mem_ramdisk;
4764 -       unsigned long kern_start = virt_to_phys(_stext);
4765 -       unsigned long kern_end = virt_to_phys(_end);
4766 -
4767 -       bootmap_pages = bootmem_bootmap_pages(node_pages);
4768 -       bootmap_len = bootmap_pages << PAGE_SHIFT;
4769 -
4770 -       /*
4771 -        * Find a large enough region without reserved pages for
4772 -        * storing the bootmem bitmap. We can take advantage of the
4773 -        * fact that all lists have been sorted.
4774 -        *
4775 -        * We have to check explicitly reserved regions as well as the
4776 -        * kernel image and any RAMDISK images...
4777 -        *
4778 -        * Oh, and we have to make sure we don't overwrite the taglist
4779 -        * since we're going to use it until the bootmem allocator is
4780 -        * fully up and running.
4781 -        */
4782 -       while (1) {
4783 -               if ((bootmap_addr < kern_end) &&
4784 -                   ((bootmap_addr + bootmap_len) > kern_start))
4785 -                       bootmap_addr = kern_end;
4786 -
4787 -               while (reserved &&
4788 -                      (bootmap_addr >= (reserved->addr + reserved->size)))
4789 -                       reserved = reserved->next;
4790 -
4791 -               if (reserved &&
4792 -                   ((bootmap_addr + bootmap_len) >= reserved->addr)) {
4793 -                       bootmap_addr = reserved->addr + reserved->size;
4794 -                       continue;
4795 -               }
4796 -
4797 -               while (ramdisk &&
4798 -                      (bootmap_addr >= (ramdisk->addr + ramdisk->size)))
4799 -                       ramdisk = ramdisk->next;
4800 -
4801 -               if (!ramdisk ||
4802 -                   ((bootmap_addr + bootmap_len) < ramdisk->addr))
4803 -                       break;
4804 -
4805 -               bootmap_addr = ramdisk->addr + ramdisk->size;
4806 -       }
4807 -
4808 -       if ((PFN_UP(bootmap_addr) + bootmap_len) >= (mem->addr + mem->size))
4809 -               return ~0UL;
4810 -
4811 -       return PFN_UP(bootmap_addr);
4812 -}
4813 -
4814 -void __init setup_bootmem(void)
4815 -{
4816 -       unsigned bootmap_size;
4817 -       unsigned long first_pfn, bootmap_pfn, pages;
4818 -       unsigned long max_pfn, max_low_pfn;
4819 -       unsigned long kern_start = virt_to_phys(_stext);
4820 -       unsigned long kern_end = virt_to_phys(_end);
4821 -       unsigned node = 0;
4822 -       struct tag_mem_range *bank, *res;
4823 -
4824 -       sort_mem_list(&mem_phys);
4825 -       sort_mem_list(&mem_reserved);
4826 -
4827 -       print_memory_map("Physical memory", mem_phys);
4828 -       print_memory_map("Reserved memory", mem_reserved);
4829 -
4830 -       nodes_clear(node_online_map);
4831 -
4832 -       if (mem_ramdisk) {
4833 -#ifdef CONFIG_BLK_DEV_INITRD
4834 -               initrd_start = (unsigned long)__va(mem_ramdisk->addr);
4835 -               initrd_end = initrd_start + mem_ramdisk->size;
4836 -
4837 -               print_memory_map("RAMDISK images", mem_ramdisk);
4838 -               if (mem_ramdisk->next)
4839 -                       printk(KERN_WARNING
4840 -                              "Warning: Only the first RAMDISK image "
4841 -                              "will be used\n");
4842 -               sort_mem_list(&mem_ramdisk);
4843 -#else
4844 -               printk(KERN_WARNING "RAM disk image present, but "
4845 -                      "no initrd support in kernel!\n");
4846 -#endif
4847 -       }
4848 -
4849 -       if (mem_phys->next)
4850 -               printk(KERN_WARNING "Only using first memory bank\n");
4851 -
4852 -       for (bank = mem_phys; bank; bank = NULL) {
4853 -               first_pfn = PFN_UP(bank->addr);
4854 -               max_low_pfn = max_pfn = PFN_DOWN(bank->addr + bank->size);
4855 -               bootmap_pfn = find_bootmap_pfn(bank);
4856 -               if (bootmap_pfn > max_pfn)
4857 -                       panic("No space for bootmem bitmap!\n");
4858 -
4859 -               if (max_low_pfn > MAX_LOWMEM_PFN) {
4860 -                       max_low_pfn = MAX_LOWMEM_PFN;
4861 -#ifndef CONFIG_HIGHMEM
4862 -                       /*
4863 -                        * Lowmem is memory that can be addressed
4864 -                        * directly through P1/P2
4865 -                        */
4866 -                       printk(KERN_WARNING
4867 -                              "Node %u: Only %ld MiB of memory will be used.\n",
4868 -                              node, MAX_LOWMEM >> 20);
4869 -                       printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
4870 -#else
4871 -#error HIGHMEM is not supported by AVR32 yet
4872 -#endif
4873 -               }
4874 -
4875 -               /* Initialize the boot-time allocator with low memory only. */
4876 -               bootmap_size = init_bootmem_node(NODE_DATA(node), bootmap_pfn,
4877 -                                                first_pfn, max_low_pfn);
4878 -
4879 -               printk("Node %u: bdata = %p, bdata->node_bootmem_map = %p\n",
4880 -                      node, NODE_DATA(node)->bdata,
4881 -                      NODE_DATA(node)->bdata->node_bootmem_map);
4882 -
4883 -               /*
4884 -                * Register fully available RAM pages with the bootmem
4885 -                * allocator.
4886 -                */
4887 -               pages = max_low_pfn - first_pfn;
4888 -               free_bootmem_node (NODE_DATA(node), PFN_PHYS(first_pfn),
4889 -                                  PFN_PHYS(pages));
4890 -
4891 -               /*
4892 -                * Reserve space for the kernel image (if present in
4893 -                * this node)...
4894 -                */
4895 -               if ((kern_start >= PFN_PHYS(first_pfn)) &&
4896 -                   (kern_start < PFN_PHYS(max_pfn))) {
4897 -                       printk("Node %u: Kernel image %08lx - %08lx\n",
4898 -                              node, kern_start, kern_end);
4899 -                       reserve_bootmem_node(NODE_DATA(node), kern_start,
4900 -                                            kern_end - kern_start);
4901 -               }
4902 -
4903 -               /* ...the bootmem bitmap... */
4904 -               reserve_bootmem_node(NODE_DATA(node),
4905 -                                    PFN_PHYS(bootmap_pfn),
4906 -                                    bootmap_size);
4907 -
4908 -               /* ...any RAMDISK images... */
4909 -               for (res = mem_ramdisk; res; res = res->next) {
4910 -                       if (res->addr > PFN_PHYS(max_pfn))
4911 -                               break;
4912 -
4913 -                       if (res->addr >= PFN_PHYS(first_pfn)) {
4914 -                               printk("Node %u: RAMDISK %08lx - %08lx\n",
4915 -                                      node,
4916 -                                      (unsigned long)res->addr,
4917 -                                      (unsigned long)(res->addr + res->size));
4918 -                               reserve_bootmem_node(NODE_DATA(node),
4919 -                                                    res->addr, res->size);
4920 -                       }
4921 -               }
4922 -
4923 -               /* ...and any other reserved regions. */
4924 -               for (res = mem_reserved; res; res = res->next) {
4925 -                       if (res->addr > PFN_PHYS(max_pfn))
4926 -                               break;
4927 -
4928 -                       if (res->addr >= PFN_PHYS(first_pfn)) {
4929 -                               printk("Node %u: Reserved %08lx - %08lx\n",
4930 -                                      node,
4931 -                                      (unsigned long)res->addr,
4932 -                                      (unsigned long)(res->addr + res->size));
4933 -                               reserve_bootmem_node(NODE_DATA(node),
4934 -                                                    res->addr, res->size);
4935 -                       }
4936 -               }
4937 -
4938 -               node_set_online(node);
4939 -       }
4940 -}
4941 -
4942  /*
4943   * paging_init() sets up the page tables
4944   *
4945 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/i2c/busses/atmeltwi.h avr32-git/drivers/i2c/busses/atmeltwi.h
4946 --- linux-2.6.21.3/drivers/i2c/busses/atmeltwi.h        1970-01-01 01:00:00.000000000 +0100
4947 +++ avr32-git/drivers/i2c/busses/atmeltwi.h     2007-06-06 11:33:51.000000000 +0200
4948 @@ -0,0 +1,117 @@
4949 +/*
4950 + * Register definitions for the Atmel Two-Wire Interface
4951 + */
4952 +
4953 +#ifndef __ASM_AVR32_TWI_H__
4954 +#define __ASM_AVR32_TWI_H__
4955 +
4956 +/* TWI register offsets */
4957 +#define TWI_CR                                 0x0000
4958 +#define TWI_MMR                                        0x0004
4959 +#define TWI_SMR                                        0x0008
4960 +#define TWI_IADR                               0x000c
4961 +#define TWI_CWGR                               0x0010
4962 +#define TWI_SR                                 0x0020
4963 +#define TWI_IER                                        0x0024
4964 +#define TWI_IDR                                        0x0028
4965 +#define TWI_IMR                                        0x002c
4966 +#define TWI_RHR                                        0x0030
4967 +#define TWI_THR                                        0x0034
4968 +
4969 +/* Bitfields in CR */
4970 +#define TWI_START_OFFSET                       0
4971 +#define TWI_START_SIZE                         1
4972 +#define TWI_STOP_OFFSET                                1
4973 +#define TWI_STOP_SIZE                          1
4974 +#define TWI_MSEN_OFFSET                                2
4975 +#define TWI_MSEN_SIZE                          1
4976 +#define TWI_MSDIS_OFFSET                       3
4977 +#define TWI_MSDIS_SIZE                         1
4978 +#define TWI_SVEN_OFFSET                                4
4979 +#define TWI_SVEN_SIZE                          1
4980 +#define TWI_SVDIS_OFFSET                       5
4981 +#define TWI_SVDIS_SIZE                         1
4982 +#define TWI_SWRST_OFFSET                       7
4983 +#define TWI_SWRST_SIZE                         1
4984 +
4985 +/* Bitfields in MMR */
4986 +#define TWI_IADRSZ_OFFSET                      8
4987 +#define TWI_IADRSZ_SIZE                                2
4988 +#define TWI_MREAD_OFFSET                       12
4989 +#define TWI_MREAD_SIZE                         1
4990 +#define TWI_DADR_OFFSET                                16
4991 +#define TWI_DADR_SIZE                          7
4992 +
4993 +/* Bitfields in SMR */
4994 +#define TWI_SADR_OFFSET                                16
4995 +#define TWI_SADR_SIZE                          7
4996 +
4997 +/* Bitfields in IADR */
4998 +#define TWI_IADR_OFFSET                                0
4999 +#define TWI_IADR_SIZE                          24
5000 +
5001 +/* Bitfields in CWGR */
5002 +#define TWI_CLDIV_OFFSET                       0
5003 +#define TWI_CLDIV_SIZE                         8
5004 +#define TWI_CHDIV_OFFSET                       8
5005 +#define TWI_CHDIV_SIZE                         8
5006 +#define TWI_CKDIV_OFFSET                       16
5007 +#define TWI_CKDIV_SIZE                         3
5008 +
5009 +/* Bitfields in SR */
5010 +#define TWI_TXCOMP_OFFSET                      0
5011 +#define TWI_TXCOMP_SIZE                                1
5012 +#define TWI_RXRDY_OFFSET                       1
5013 +#define TWI_RXRDY_SIZE                         1
5014 +#define TWI_TXRDY_OFFSET                       2
5015 +#define TWI_TXRDY_SIZE                         1
5016 +#define TWI_SVDIR_OFFSET                       3
5017 +#define TWI_SVDIR_SIZE                         1
5018 +#define TWI_SVACC_OFFSET                       4
5019 +#define TWI_SVACC_SIZE                         1
5020 +#define TWI_GCACC_OFFSET                       5
5021 +#define TWI_GCACC_SIZE                         1
5022 +#define TWI_OVRE_OFFSET                                6
5023 +#define TWI_OVRE_SIZE                          1
5024 +#define TWI_UNRE_OFFSET                                7
5025 +#define TWI_UNRE_SIZE                          1
5026 +#define TWI_NACK_OFFSET                                8
5027 +#define TWI_NACK_SIZE                          1
5028 +#define TWI_ARBLST_OFFSET                      9
5029 +#define TWI_ARBLST_SIZE                                1
5030 +
5031 +/* Bitfields in RHR */
5032 +#define TWI_RXDATA_OFFSET                      0
5033 +#define TWI_RXDATA_SIZE                                8
5034 +
5035 +/* Bitfields in THR */
5036 +#define TWI_TXDATA_OFFSET                      0
5037 +#define TWI_TXDATA_SIZE                                8
5038 +
5039 +/* Constants for IADRSZ */
5040 +#define TWI_IADRSZ_NO_ADDR                     0
5041 +#define TWI_IADRSZ_ONE_BYTE                    1
5042 +#define TWI_IADRSZ_TWO_BYTES                   2
5043 +#define TWI_IADRSZ_THREE_BYTES                 3
5044 +
5045 +/* Bit manipulation macros */
5046 +#define TWI_BIT(name)                                  \
5047 +       (1 << TWI_##name##_OFFSET)
5048 +#define TWI_BF(name,value)                             \
5049 +       (((value) & ((1 << TWI_##name##_SIZE) - 1))     \
5050 +        << TWI_##name##_OFFSET)
5051 +#define TWI_BFEXT(name,value)                          \
5052 +       (((value) >> TWI_##name##_OFFSET)               \
5053 +        & ((1 << TWI_##name##_SIZE) - 1))
5054 +#define TWI_BFINS(name,value,old)                      \
5055 +       (((old) & ~(((1 << TWI_##name##_SIZE) - 1)      \
5056 +                   << TWI_##name##_OFFSET))            \
5057 +        | TWI_BF(name,value))
5058 +
5059 +/* Register access macros */
5060 +#define twi_readl(port,reg)                            \
5061 +       __raw_readl((port)->regs + TWI_##reg)
5062 +#define twi_writel(port,reg,value)                     \
5063 +       __raw_writel((value), (port)->regs + TWI_##reg)
5064 +
5065 +#endif /* __ASM_AVR32_TWI_H__ */
5066 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/i2c/busses/i2c-atmeltwi.c avr32-git/drivers/i2c/busses/i2c-atmeltwi.c
5067 --- linux-2.6.21.3/drivers/i2c/busses/i2c-atmeltwi.c    1970-01-01 01:00:00.000000000 +0100
5068 +++ avr32-git/drivers/i2c/busses/i2c-atmeltwi.c 2007-06-06 11:33:51.000000000 +0200
5069 @@ -0,0 +1,348 @@
5070 +/*
5071 + * i2c Support for Atmel's Two-Wire Interface (TWI)
5072 + *
5073 + * Based on the work of Copyright (C) 2004 Rick Bronson
5074 + * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
5075 + * Ported to AVR32 and heavily modified by Espen Krangnes <ekrangnes at atmel.com>
5076 + *
5077 + * Copyright (C) 2006 Atmel Corporation
5078 + *
5079 + * Borrowed heavily from the original work by:
5080 + * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
5081 + *
5082 + * This program is free software; you can redistribute it and/or modify
5083 + * it under the terms of the GNU General Public License as published by
5084 + * the Free Software Foundation; either version 2 of the License, or
5085 + * (at your option) any later version.
5086 + */
5087 +
5088 +
5089 +#include <linux/err.h>
5090 +#include <linux/module.h>
5091 +#include <linux/kernel.h>
5092 +#include <linux/slab.h>
5093 +#include <linux/types.h>
5094 +#include <linux/delay.h>
5095 +#include <linux/i2c.h>
5096 +#include <linux/init.h>
5097 +#include <linux/clk.h>
5098 +#include <linux/interrupt.h>
5099 +#include <linux/irq.h>
5100 +#include <linux/platform_device.h>
5101 +#include <linux/completion.h>
5102 +#include <asm/io.h>
5103 +#include <linux/time.h>
5104 +#include "atmeltwi.h"
5105 +
5106 +static unsigned int baudrate = CONFIG_I2C_ATMELTWI_BAUDRATE;
5107 +module_param(baudrate, uint, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
5108 +MODULE_PARM_DESC(baudrate, "The TWI baudrate");
5109 +
5110 +
5111 +struct atmel_twi {
5112 +       void __iomem *regs;
5113 +       struct i2c_adapter adapter;
5114 +       struct clk *pclk;
5115 +       spinlock_t lock;
5116 +       struct completion comp;
5117 +       u32 intmask;
5118 +       u8 *buf;
5119 +       u8 len;
5120 +       u8 acks_left;
5121 +       unsigned int irq;
5122 +
5123 +};
5124 +#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
5125 +
5126 +/*
5127 + * Initialize the TWI hardware registers.
5128 + */
5129 +static int __devinit twi_hwinit(struct atmel_twi *twi)
5130 +{
5131 +       unsigned long cdiv, ckdiv=0;
5132 +
5133 +       twi_writel(twi, IDR, ~0UL);
5134 +       twi_writel(twi, CR, TWI_BIT(SWRST));    /*Reset peripheral*/
5135 +       twi_readl(twi, SR);
5136 +
5137 +       cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
5138 +
5139 +       while (cdiv > 255) {
5140 +               ckdiv++;
5141 +               cdiv = cdiv >> 1;
5142 +       }
5143 +
5144 +       if (ckdiv > 7)
5145 +               return -EINVAL;
5146 +       else
5147 +               twi_writel(twi, CWGR, (TWI_BF(CKDIV, ckdiv)
5148 +                              | TWI_BF(CHDIV, cdiv)
5149 +                              | TWI_BF(CLDIV, cdiv)));
5150 +       return 0;
5151 +}
5152 +
5153 +/*
5154 + * Waits for the i2c status register to set the specified bitmask
5155 + * Returns 0 if timed out (~100ms).
5156 + */
5157 +static short twi_wait_for_completion(struct atmel_twi *twi,
5158 +               u32 mask)
5159 +{
5160 +       int timeout = msecs_to_jiffies(100);
5161 +
5162 +       twi->intmask = mask;
5163 +       init_completion(&twi->comp);
5164 +
5165 +       twi_writel(twi, IER, mask);
5166 +
5167 +       if(!wait_for_completion_timeout(&twi->comp, timeout))
5168 +               return -ETIMEDOUT;
5169 +
5170 +       return 0;
5171 +}
5172 +
5173 +/*
5174 + * Generic i2c master transfer entrypoint.
5175 + */
5176 +static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
5177 +{
5178 +       struct atmel_twi *twi = to_atmel_twi(adap);
5179 +       struct i2c_msg *pmsg;
5180 +       int i;
5181 +
5182 +       /* get first message */
5183 +       pmsg = msgs;
5184 +
5185 +       dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
5186 +
5187 +       for (i = 0; i < num; i++, pmsg++) {
5188 +
5189 +               twi->len = pmsg->len;
5190 +               twi->buf = pmsg->buf;
5191 +               twi->acks_left = pmsg->len;
5192 +               twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
5193 +                       (pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
5194 +               twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
5195 +
5196 +               dev_dbg(&adap->dev,"#%d: internal addr %d %s byte%s %s 0x%02x\n",
5197 +                       i,pmsg->len, pmsg->flags & I2C_M_RD ? "reading" : "writing",
5198 +                       pmsg->len > 1 ? "s" : "",
5199 +                       pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
5200 +
5201 +               /* enable */
5202 +               twi_writel(twi, CR, TWI_BIT(MSEN));
5203 +
5204 +               if (pmsg->flags & I2C_M_RD) {
5205 +                       twi_writel(twi, CR, TWI_BIT(START));
5206 +                       if ( twi_wait_for_completion(twi,TWI_BIT(RXRDY))==-ETIMEDOUT ) {
5207 +                               dev_dbg(&adap->dev, "RXRDY timeout. Stopped with %d bytes left\n",
5208 +                                       twi->acks_left);
5209 +                               return -ETIMEDOUT;
5210 +                       }
5211 +
5212 +                       /* Send Stop, and Wait until transfer is finished */
5213 +                       if ( twi_wait_for_completion(twi,TWI_BIT(TXCOMP))==-ETIMEDOUT ) {
5214 +                               dev_dbg(&adap->dev, "TXCOMP timeout\n");
5215 +                               return -ETIMEDOUT;
5216 +                       }
5217 +
5218 +               } else {
5219 +                       twi_writel(twi, THR, twi->buf[0]);
5220 +                       if ( twi_wait_for_completion(twi,TWI_BIT(TXRDY))==-ETIMEDOUT ) {
5221 +                               dev_dbg(&adap->dev, "TXRDY timeout. Stopped with %d bytes left\n",
5222 +                               twi->acks_left);
5223 +                               return -ETIMEDOUT;
5224 +                       }
5225 +               }
5226 +
5227 +               /* Disable TWI interface */
5228 +               twi_writel(twi, CR, TWI_BIT(MSDIS));
5229 +
5230 +       } /* end cur msg */
5231 +
5232 +       return i;
5233 +}
5234 +
5235 +
5236 +static irqreturn_t twi_interrupt(int irq, void *dev_id, struct pt_regs *regs)
5237 +{
5238 +       struct atmel_twi *twi = dev_id;
5239 +       int status = twi_readl(twi, SR);
5240 +
5241 +       if (twi->intmask & status){
5242 +               if (twi->intmask & TWI_BIT(NACK)) {
5243 +                       goto nack;
5244 +               } else if (twi->intmask & TWI_BIT(RXRDY)){
5245 +                       twi->buf[twi->len - twi->acks_left] = twi_readl(twi,RHR);
5246 +                       if(--twi->acks_left==1)
5247 +                               twi_writel(twi, CR, TWI_BIT(STOP));
5248 +                       if (twi->acks_left==0)
5249 +                               goto complete;
5250 +               } else if (twi->intmask & TWI_BIT(TXRDY)) {
5251 +                       twi->acks_left--;
5252 +                       if (twi->acks_left==0) {
5253 +                               twi->intmask = TWI_BIT(TXCOMP);
5254 +                               twi_writel(twi, IER, TWI_BIT(TXCOMP));
5255 +                       } else
5256 +                               twi_writel(twi, THR, twi->buf[twi->len - twi->acks_left]);
5257 +               } else if (twi->intmask & TWI_BIT(TXCOMP)) {
5258 +                       goto complete;
5259 +               }
5260 +       }
5261 +
5262 +       return IRQ_HANDLED;
5263 +
5264 +nack:
5265 +       printk(KERN_INFO "NACK received!\n");
5266 +
5267 +complete:
5268 +       twi_writel(twi, IDR, ~0UL);
5269 +       complete(&twi->comp);
5270 +
5271 +       return IRQ_HANDLED;
5272 +
5273 +}
5274 +
5275 +
5276 +/*
5277 + * Return list of supported functionality.
5278 + */
5279 +static u32 twi_func(struct i2c_adapter *adapter)
5280 +{
5281 +       return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
5282 +}
5283 +
5284 +/* For now, we only handle combined mode (smbus) */
5285 +static struct i2c_algorithm twi_algorithm = {
5286 +       .master_xfer    = twi_xfer,
5287 +       .functionality  = twi_func,
5288 +};
5289 +
5290 +/*
5291 + * Main initialization routine.
5292 + */
5293 +static int __devinit twi_probe(struct platform_device *pdev)
5294 +{
5295 +       struct atmel_twi *twi;
5296 +       struct resource *regs;
5297 +       struct clk *pclk;
5298 +       struct i2c_adapter *adapter;
5299 +       int rc, irq;
5300 +
5301 +       regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
5302 +       if (!regs)
5303 +               return -ENXIO;
5304 +
5305 +       pclk = clk_get(&pdev->dev, "pclk");
5306 +       if (IS_ERR(pclk))
5307 +               return PTR_ERR(pclk);
5308 +       clk_enable(pclk);
5309 +
5310 +       rc = -ENOMEM;
5311 +       twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
5312 +       if (!twi) {
5313 +               dev_err(&pdev->dev, "can't allocate interface!\n");
5314 +               goto err_alloc_twi;
5315 +       }
5316 +
5317 +       twi->pclk = pclk;
5318 +       twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
5319 +       if (!twi->regs)
5320 +               goto err_ioremap;
5321 +
5322 +       irq = platform_get_irq(pdev,0);
5323 +       rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
5324 +       if (rc) {
5325 +               dev_err(&pdev->dev, "can't bind irq!\n");
5326 +               goto err_irq;
5327 +       }
5328 +       twi->irq = irq;
5329 +
5330 +       rc = twi_hwinit(twi);
5331 +       if (rc) {
5332 +               dev_err(&pdev->dev, "Unable to set baudrate\n");
5333 +               goto err_hw_init;
5334 +       }
5335 +
5336 +       adapter = &twi->adapter;
5337 +       sprintf(adapter->name, "TWI");
5338 +       adapter->algo = &twi_algorithm;
5339 +       adapter->class = I2C_CLASS_HWMON;
5340 +       adapter->dev.parent = &pdev->dev;
5341 +
5342 +       platform_set_drvdata(pdev, twi);
5343 +
5344 +       rc = i2c_add_adapter(adapter);
5345 +       if (rc) {
5346 +               dev_err(&pdev->dev, "Adapter %s registration failed\n",
5347 +                       adapter->name);
5348 +               goto err_register;
5349 +       }
5350 +
5351 +       dev_info(&pdev->dev, "Atmel TWI i2c bus device (baudrate %dk) at 0x%08lx.\n",
5352 +                baudrate/1000, (unsigned long)regs->start);
5353 +
5354 +       return 0;
5355 +
5356 +
5357 +err_register:
5358 +       platform_set_drvdata(pdev, NULL);
5359 +
5360 +err_hw_init:
5361 +       free_irq(irq, twi);
5362 +
5363 +err_irq:
5364 +       iounmap(twi->regs);
5365 +
5366 +err_ioremap:
5367 +       kfree(twi);
5368 +
5369 +err_alloc_twi:
5370 +       clk_disable(pclk);
5371 +       clk_put(pclk);
5372 +
5373 +       return rc;
5374 +}
5375 +
5376 +static int __devexit twi_remove(struct platform_device *pdev)
5377 +{
5378 +       struct atmel_twi *twi = platform_get_drvdata(pdev);
5379 +       int res;
5380 +
5381 +       platform_set_drvdata(pdev, NULL);
5382 +       res = i2c_del_adapter(&twi->adapter);
5383 +       twi_writel(twi, CR, TWI_BIT(MSDIS));
5384 +       iounmap(twi->regs);
5385 +       clk_disable(twi->pclk);
5386 +       clk_put(twi->pclk);
5387 +       free_irq(twi->irq, twi);
5388 +       kfree(twi);
5389 +
5390 +       return res;
5391 +}
5392 +
5393 +static struct platform_driver twi_driver = {
5394 +       .probe          = twi_probe,
5395 +       .remove         = __devexit_p(twi_remove),
5396 +       .driver         = {
5397 +               .name   = "atmel_twi",
5398 +               .owner  = THIS_MODULE,
5399 +       },
5400 +};
5401 +
5402 +static int __init atmel_twi_init(void)
5403 +{
5404 +       return platform_driver_register(&twi_driver);
5405 +}
5406 +
5407 +static void __exit atmel_twi_exit(void)
5408 +{
5409 +       platform_driver_unregister(&twi_driver);
5410 +}
5411 +
5412 +module_init(atmel_twi_init);
5413 +module_exit(atmel_twi_exit);
5414 +
5415 +MODULE_AUTHOR("Espen Krangnes");
5416 +MODULE_DESCRIPTION("I2C driver for Atmel TWI");
5417 +MODULE_LICENSE("GPL");
5418 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/i2c/busses/i2c-gpio.c avr32-git/drivers/i2c/busses/i2c-gpio.c
5419 --- linux-2.6.21.3/drivers/i2c/busses/i2c-gpio.c        1970-01-01 01:00:00.000000000 +0100
5420 +++ avr32-git/drivers/i2c/busses/i2c-gpio.c     2007-06-06 11:33:51.000000000 +0200
5421 @@ -0,0 +1,215 @@
5422 +/*
5423 + * Bitbanging I2C bus driver using the GPIO API
5424 + *
5425 + * Copyright (C) 2007 Atmel Corporation
5426 + *
5427 + * This program is free software; you can redistribute it and/or modify
5428 + * it under the terms of the GNU General Public License version 2 as
5429 + * published by the Free Software Foundation.
5430 + */
5431 +#include <linux/i2c.h>
5432 +#include <linux/i2c-algo-bit.h>
5433 +#include <linux/i2c-gpio.h>
5434 +#include <linux/init.h>
5435 +#include <linux/module.h>
5436 +#include <linux/platform_device.h>
5437 +
5438 +#include <asm/gpio.h>
5439 +
5440 +/* Toggle SDA by changing the direction of the pin */
5441 +static void i2c_gpio_setsda_dir(void *data, int state)
5442 +{
5443 +       struct i2c_gpio_platform_data *pdata = data;
5444 +
5445 +       if (state)
5446 +               gpio_direction_input(pdata->sda_pin);
5447 +       else
5448 +               gpio_direction_output(pdata->sda_pin, 0);
5449 +}
5450 +
5451 +/*
5452 + * Toggle SDA by changing the output value of the pin. This is only
5453 + * valid for pins configured as open drain (i.e. setting the value
5454 + * high effectively turns off the output driver.)
5455 + */
5456 +static void i2c_gpio_setsda_val(void *data, int state)
5457 +{
5458 +       struct i2c_gpio_platform_data *pdata = data;
5459 +
5460 +       gpio_set_value(pdata->sda_pin, state);
5461 +}
5462 +
5463 +/* Toggle SCL by changing the direction of the pin. */
5464 +static void i2c_gpio_setscl_dir(void *data, int state)
5465 +{
5466 +       struct i2c_gpio_platform_data *pdata = data;
5467 +
5468 +       if (state)
5469 +               gpio_direction_input(pdata->scl_pin);
5470 +       else
5471 +               gpio_direction_output(pdata->scl_pin, 0);
5472 +}
5473 +
5474 +/*
5475 + * Toggle SCL by changing the output value of the pin. This is used
5476 + * for pins that are configured as open drain and for output-only
5477 + * pins. The latter case will break the i2c protocol, but it will
5478 + * often work in practice.
5479 + */
5480 +static void i2c_gpio_setscl_val(void *data, int state)
5481 +{
5482 +       struct i2c_gpio_platform_data *pdata = data;
5483 +
5484 +       gpio_set_value(pdata->scl_pin, state);
5485 +}
5486 +
5487 +int i2c_gpio_getsda(void *data)
5488 +{
5489 +       struct i2c_gpio_platform_data *pdata = data;
5490 +
5491 +       return gpio_get_value(pdata->sda_pin);
5492 +}
5493 +
5494 +int i2c_gpio_getscl(void *data)
5495 +{
5496 +       struct i2c_gpio_platform_data *pdata = data;
5497 +
5498 +       return gpio_get_value(pdata->scl_pin);
5499 +}
5500 +
5501 +static int __init i2c_gpio_probe(struct platform_device *pdev)
5502 +{
5503 +       struct i2c_gpio_platform_data *pdata;
5504 +       struct i2c_algo_bit_data *bit_data;
5505 +       struct i2c_adapter *adap;
5506 +       int ret;
5507 +
5508 +       pdata = pdev->dev.platform_data;
5509 +       if (!pdata)
5510 +               return -ENXIO;
5511 +
5512 +       ret = -ENOMEM;
5513 +       adap = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
5514 +       if (!adap)
5515 +               goto err_alloc_adap;
5516 +       bit_data = kzalloc(sizeof(struct i2c_algo_bit_data), GFP_KERNEL);
5517 +       if (!bit_data)
5518 +               goto err_alloc_bit_data;
5519 +
5520 +       ret = gpio_request(pdata->sda_pin, "sda");
5521 +       if (ret)
5522 +               goto err_request_sda;
5523 +       ret = gpio_request(pdata->scl_pin, "scl");
5524 +       if (ret)
5525 +               goto err_request_scl;
5526 +
5527 +       if (pdata->sda_is_open_drain) {
5528 +               gpio_direction_output(pdata->sda_pin, 1);
5529 +               bit_data->setsda = i2c_gpio_setsda_val;
5530 +       } else {
5531 +               gpio_direction_input(pdata->sda_pin);
5532 +               bit_data->setsda = i2c_gpio_setsda_dir;
5533 +       }
5534 +
5535 +       if (pdata->scl_is_open_drain || pdata->scl_is_output_only) {
5536 +               gpio_direction_output(pdata->scl_pin, 1);
5537 +               bit_data->setscl = i2c_gpio_setscl_val;
5538 +       } else {
5539 +               gpio_direction_input(pdata->scl_pin);
5540 +               bit_data->setscl = i2c_gpio_setscl_dir;
5541 +       }
5542 +
5543 +       if (!pdata->scl_is_output_only)
5544 +               bit_data->getscl = i2c_gpio_getscl;
5545 +       bit_data->getsda = i2c_gpio_getsda;
5546 +
5547 +       if (pdata->udelay)
5548 +               bit_data->udelay = pdata->udelay;
5549 +       else if (pdata->scl_is_output_only)
5550 +               bit_data->udelay = 50;                  /* 10 kHz */
5551 +       else
5552 +               bit_data->udelay = 5;                   /* 100 kHz */
5553 +
5554 +       if (pdata->timeout)
5555 +               bit_data->timeout = pdata->timeout;
5556 +       else
5557 +               bit_data->timeout = HZ / 10;            /* 100 ms */
5558 +
5559 +       bit_data->data = pdata;
5560 +
5561 +       adap->owner = THIS_MODULE;
5562 +       snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id);
5563 +       adap->algo_data = bit_data;
5564 +       adap->dev.parent = &pdev->dev;
5565 +
5566 +       ret = i2c_bit_add_bus(adap);
5567 +       if (ret)
5568 +               goto err_add_bus;
5569 +
5570 +       platform_set_drvdata(pdev, adap);
5571 +
5572 +       dev_info(&pdev->dev, "using pins %u (SDA) and %u (SCL%s)\n",
5573 +                pdata->sda_pin, pdata->scl_pin,
5574 +                pdata->scl_is_output_only
5575 +                ? ", no clock stretching" : "");
5576 +
5577 +       return 0;
5578 +
5579 +err_add_bus:
5580 +       gpio_free(pdata->scl_pin);
5581 +err_request_scl:
5582 +       gpio_free(pdata->sda_pin);
5583 +err_request_sda:
5584 +       kfree(bit_data);
5585 +err_alloc_bit_data:
5586 +       kfree(adap);
5587 +err_alloc_adap:
5588 +       return ret;
5589 +}
5590 +
5591 +static int __exit i2c_gpio_remove(struct platform_device *pdev)
5592 +{
5593 +       struct i2c_gpio_platform_data *pdata;
5594 +       struct i2c_adapter *adap;
5595 +
5596 +       adap = platform_get_drvdata(pdev);
5597 +       pdata = pdev->dev.platform_data;
5598 +
5599 +       i2c_del_adapter(adap);
5600 +       gpio_free(pdata->scl_pin);
5601 +       gpio_free(pdata->sda_pin);
5602 +       kfree(adap->algo_data);
5603 +       kfree(adap);
5604 +
5605 +       return 0;
5606 +}
5607 +
5608 +static struct platform_driver i2c_gpio_driver = {
5609 +       .driver         = {
5610 +               .name   = "i2c-gpio",
5611 +               .owner  = THIS_MODULE,
5612 +       },
5613 +       .remove         = __exit_p(i2c_gpio_remove),
5614 +};
5615 +
5616 +static int __init i2c_gpio_init(void)
5617 +{
5618 +       int ret;
5619 +
5620 +       ret = platform_driver_probe(&i2c_gpio_driver, i2c_gpio_probe);
5621 +       if (ret)
5622 +               printk(KERN_ERR "i2c-gpio: probe failed: %d\n", ret);
5623 +
5624 +       return ret;
5625 +}
5626 +module_init(i2c_gpio_init);
5627 +
5628 +static void __exit i2c_gpio_exit(void)
5629 +{
5630 +       platform_driver_unregister(&i2c_gpio_driver);
5631 +}
5632 +module_exit(i2c_gpio_exit);
5633 +
5634 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
5635 +MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver");
5636 +MODULE_LICENSE("GPL");
5637 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/i2c/busses/Kconfig avr32-git/drivers/i2c/busses/Kconfig
5638 --- linux-2.6.21.3/drivers/i2c/busses/Kconfig   2007-05-24 23:22:47.000000000 +0200
5639 +++ avr32-git/drivers/i2c/busses/Kconfig        2007-06-06 11:33:51.000000000 +0200
5640 @@ -5,6 +5,26 @@
5641  menu "I2C Hardware Bus support"
5642         depends on I2C
5643
5644 +config I2C_ATMELTWI
5645 +       tristate "Atmel TWI/I2C"
5646 +       depends on I2C
5647 +       help
5648 +         Atmel on-chip TWI controller. Say Y if you have an AT32 or
5649 +         AT91-based device and want to use its built-in TWI
5650 +         functionality. Atmel's TWI is compatible with Philips' I2C
5651 +         protocol. If in doubt, say NO
5652 +
5653 +config I2C_ATMELTWI_BAUDRATE
5654 +       prompt "Atmel TWI baudrate"
5655 +       depends on I2C_ATMELTWI
5656 +       int
5657 +       default 100000
5658 +       help
5659 +         Set the TWI/I2C baudrate. This will alter the default value. A
5660 +         different baudrate can be set by using a module parameter as well. If
5661 +         no parameter is provided when loading, this is the value that will be
5662 +         used.
5663 +
5664  config I2C_ALI1535
5665         tristate "ALI 1535"
5666         depends on I2C && PCI
5667 @@ -102,6 +122,14 @@
5668           This support is also available as a module.  If so, the module
5669           will be called i2c-elektor.
5670
5671 +config I2C_GPIO
5672 +       tristate "GPIO-based bitbanging I2C"
5673 +       depends on GENERIC_GPIO
5674 +       select I2C_ALGOBIT
5675 +       help
5676 +         This is a very simple bitbanging I2C driver utilizing the
5677 +         arch-neutral GPIO API to control the SCL and SDA lines.
5678 +
5679  config I2C_HYDRA
5680         tristate "CHRP Apple Hydra Mac I/O I2C interface"
5681         depends on I2C && PCI && PPC_CHRP && EXPERIMENTAL
5682 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/i2c/busses/Makefile avr32-git/drivers/i2c/busses/Makefile
5683 --- linux-2.6.21.3/drivers/i2c/busses/Makefile  2007-05-24 23:22:47.000000000 +0200
5684 +++ avr32-git/drivers/i2c/busses/Makefile       2007-06-06 11:33:51.000000000 +0200
5685 @@ -11,6 +11,7 @@
5686  obj-$(CONFIG_I2C_AT91)         += i2c-at91.o
5687  obj-$(CONFIG_I2C_AU1550)       += i2c-au1550.o
5688  obj-$(CONFIG_I2C_ELEKTOR)      += i2c-elektor.o
5689 +obj-$(CONFIG_I2C_GPIO)         += i2c-gpio.o
5690  obj-$(CONFIG_I2C_HYDRA)                += i2c-hydra.o
5691  obj-$(CONFIG_I2C_I801)         += i2c-i801.o
5692  obj-$(CONFIG_I2C_I810)         += i2c-i810.o
5693 @@ -48,6 +49,7 @@
5694  obj-$(CONFIG_I2C_VOODOO3)      += i2c-voodoo3.o
5695  obj-$(CONFIG_SCx200_ACB)       += scx200_acb.o
5696  obj-$(CONFIG_SCx200_I2C)       += scx200_i2c.o
5697 +obj-$(CONFIG_I2C_ATMELTWI)     += i2c-atmeltwi.o
5698
5699  ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
5700  EXTRA_CFLAGS += -DDEBUG
5701 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/mmc/atmel-mci.c avr32-git/drivers/mmc/atmel-mci.c
5702 --- linux-2.6.21.3/drivers/mmc/atmel-mci.c      1970-01-01 01:00:00.000000000 +0100
5703 +++ avr32-git/drivers/mmc/atmel-mci.c   2007-06-06 11:33:56.000000000 +0200
5704 @@ -0,0 +1,1218 @@
5705 +/*
5706 + * Atmel MultiMedia Card Interface driver
5707 + *
5708 + * Copyright (C) 2004-2006 Atmel Corporation
5709 + *
5710 + * This program is free software; you can redistribute it and/or modify
5711 + * it under the terms of the GNU General Public License version 2 as
5712 + * published by the Free Software Foundation.
5713 + */
5714 +#include <linux/blkdev.h>
5715 +#include <linux/clk.h>
5716 +#include <linux/device.h>
5717 +#include <linux/dma-mapping.h>
5718 +#include <linux/init.h>
5719 +#include <linux/interrupt.h>
5720 +#include <linux/ioport.h>
5721 +#include <linux/module.h>
5722 +#include <linux/platform_device.h>
5723 +
5724 +#include <linux/mmc/host.h>
5725 +#include <linux/mmc/protocol.h>
5726 +
5727 +#include <asm/dma-controller.h>
5728 +#include <asm/io.h>
5729 +#include <asm/arch/board.h>
5730 +#include <asm/arch/gpio.h>
5731 +
5732 +#include "atmel-mci.h"
5733 +
5734 +#define DRIVER_NAME "atmel_mci"
5735 +
5736 +#define MCI_CMD_ERROR_FLAGS    (MCI_BIT(RINDE) | MCI_BIT(RDIRE) |      \
5737 +                                MCI_BIT(RCRCE) | MCI_BIT(RENDE) |      \
5738 +                                MCI_BIT(RTOE))
5739 +#define MCI_DATA_ERROR_FLAGS   (MCI_BIT(DCRCE) | MCI_BIT(DTOE) |       \
5740 +                                MCI_BIT(OVRE) | MCI_BIT(UNRE))
5741 +
5742 +enum {
5743 +       EVENT_CMD_COMPLETE = 0,
5744 +       EVENT_CMD_ERROR,
5745 +       EVENT_DATA_COMPLETE,
5746 +       EVENT_DATA_ERROR,
5747 +       EVENT_STOP_SENT,
5748 +       EVENT_STOP_COMPLETE,
5749 +       EVENT_STOP_ERROR,
5750 +       EVENT_DMA_ERROR,
5751 +       EVENT_CARD_DETECT,
5752 +};
5753 +
5754 +struct atmel_mci_dma {
5755 +       struct dma_request_sg   req;
5756 +       unsigned short          rx_periph_id;
5757 +       unsigned short          tx_periph_id;
5758 +};
5759 +
5760 +struct atmel_mci {
5761 +       struct mmc_host         *mmc;
5762 +       void __iomem            *regs;
5763 +       struct atmel_mci_dma    dma;
5764 +
5765 +       struct mmc_request      *mrq;
5766 +       struct mmc_command      *cmd;
5767 +       struct mmc_data         *data;
5768 +
5769 +       u32                     stop_cmdr;
5770 +       u32                     stop_iflags;
5771 +
5772 +       struct tasklet_struct   tasklet;
5773 +       unsigned long           pending_events;
5774 +       unsigned long           completed_events;
5775 +       u32                     error_status;
5776 +
5777 +       int                     present;
5778 +       int                     detect_pin;
5779 +       int                     wp_pin;
5780 +
5781 +       unsigned long           bus_hz;
5782 +       unsigned long           mapbase;
5783 +       struct clk              *mck;
5784 +       struct platform_device  *pdev;
5785 +
5786 +#ifdef CONFIG_DEBUG_FS
5787 +       struct dentry           *debugfs_root;
5788 +       struct dentry           *debugfs_regs;
5789 +       struct dentry           *debugfs_req;
5790 +       struct dentry           *debugfs_pending_events;
5791 +       struct dentry           *debugfs_completed_events;
5792 +#endif
5793 +};
5794 +
5795 +/* Those printks take an awful lot of time... */
5796 +#ifndef DEBUG
5797 +static unsigned int fmax = 15000000U;
5798 +#else
5799 +static unsigned int fmax = 1000000U;
5800 +#endif
5801 +module_param(fmax, uint, 0444);
5802 +MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
5803 +
5804 +/* Test bit macros for completed events */
5805 +#define mci_cmd_is_complete(host)                      \
5806 +       test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
5807 +#define mci_cmd_error_is_complete(host)                        \
5808 +       test_bit(EVENT_CMD_ERROR, &host->completed_events)
5809 +#define mci_data_is_complete(host)                     \
5810 +       test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
5811 +#define mci_data_error_is_complete(host)               \
5812 +       test_bit(EVENT_DATA_ERROR, &host->completed_events)
5813 +#define mci_stop_sent_is_complete(host)                        \
5814 +       test_bit(EVENT_STOP_SENT, &host->completed_events)
5815 +#define mci_stop_is_complete(host)                     \
5816 +       test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
5817 +#define mci_stop_error_is_complete(host)               \
5818 +       test_bit(EVENT_STOP_ERROR, &host->completed_events)
5819 +#define mci_dma_error_is_complete(host)                        \
5820 +       test_bit(EVENT_DMA_ERROR, &host->completed_events)
5821 +#define mci_card_detect_is_complete(host)                      \
5822 +       test_bit(EVENT_CARD_DETECT, &host->completed_events)
5823 +
5824 +/* Test and clear bit macros for pending events */
5825 +#define mci_clear_cmd_is_pending(host)                 \
5826 +       test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
5827 +#define mci_clear_cmd_error_is_pending(host)           \
5828 +       test_and_clear_bit(EVENT_CMD_ERROR, &host->pending_events)
5829 +#define mci_clear_data_is_pending(host)                        \
5830 +       test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
5831 +#define mci_clear_data_error_is_pending(host)          \
5832 +       test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
5833 +#define mci_clear_stop_sent_is_pending(host)           \
5834 +       test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
5835 +#define mci_clear_stop_is_pending(host)                        \
5836 +       test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
5837 +#define mci_clear_stop_error_is_pending(host)          \
5838 +       test_and_clear_bit(EVENT_STOP_ERROR, &host->pending_events)
5839 +#define mci_clear_dma_error_is_pending(host)           \
5840 +       test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
5841 +#define mci_clear_card_detect_is_pending(host)         \
5842 +       test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
5843 +
5844 +/* Test and set bit macros for completed events */
5845 +#define mci_set_cmd_is_completed(host)                 \
5846 +       test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
5847 +#define mci_set_cmd_error_is_completed(host)           \
5848 +       test_and_set_bit(EVENT_CMD_ERROR, &host->completed_events)
5849 +#define mci_set_data_is_completed(host)                        \
5850 +       test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
5851 +#define mci_set_data_error_is_completed(host)          \
5852 +       test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
5853 +#define mci_set_stop_sent_is_completed(host)           \
5854 +       test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
5855 +#define mci_set_stop_is_completed(host)                        \
5856 +       test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
5857 +#define mci_set_stop_error_is_completed(host)          \
5858 +       test_and_set_bit(EVENT_STOP_ERROR, &host->completed_events)
5859 +#define mci_set_dma_error_is_completed(host)           \
5860 +       test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
5861 +#define mci_set_card_detect_is_completed(host)         \
5862 +       test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
5863 +
5864 +/* Set bit macros for completed events */
5865 +#define mci_set_cmd_complete(host)                     \
5866 +       set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
5867 +#define mci_set_cmd_error_complete(host)               \
5868 +       set_bit(EVENT_CMD_ERROR, &host->completed_events)
5869 +#define mci_set_data_complete(host)                    \
5870 +       set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
5871 +#define mci_set_data_error_complete(host)              \
5872 +       set_bit(EVENT_DATA_ERROR, &host->completed_events)
5873 +#define mci_set_stop_sent_complete(host)               \
5874 +       set_bit(EVENT_STOP_SENT, &host->completed_events)
5875 +#define mci_set_stop_complete(host)                    \
5876 +       set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
5877 +#define mci_set_stop_error_complete(host)              \
5878 +       set_bit(EVENT_STOP_ERROR, &host->completed_events)
5879 +#define mci_set_dma_error_complete(host)               \
5880 +       set_bit(EVENT_DMA_ERROR, &host->completed_events)
5881 +#define mci_set_card_detect_complete(host)             \
5882 +       set_bit(EVENT_CARD_DETECT, &host->completed_events)
5883 +
5884 +/* Set bit macros for pending events */
5885 +#define mci_set_cmd_pending(host)                      \
5886 +       set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
5887 +#define mci_set_cmd_error_pending(host)                        \
5888 +       set_bit(EVENT_CMD_ERROR, &host->pending_events)
5889 +#define mci_set_data_pending(host)                     \
5890 +       set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
5891 +#define mci_set_data_error_pending(host)               \
5892 +       set_bit(EVENT_DATA_ERROR, &host->pending_events)
5893 +#define mci_set_stop_sent_pending(host)                        \
5894 +       set_bit(EVENT_STOP_SENT, &host->pending_events)
5895 +#define mci_set_stop_pending(host)                     \
5896 +       set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
5897 +#define mci_set_stop_error_pending(host)               \
5898 +       set_bit(EVENT_STOP_ERROR, &host->pending_events)
5899 +#define mci_set_dma_error_pending(host)                        \
5900 +       set_bit(EVENT_DMA_ERROR, &host->pending_events)
5901 +#define mci_set_card_detect_pending(host)              \
5902 +       set_bit(EVENT_CARD_DETECT, &host->pending_events)
5903 +
5904 +/* Clear bit macros for pending events */
5905 +#define mci_clear_cmd_pending(host)                    \
5906 +       clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
5907 +#define mci_clear_cmd_error_pending(host)              \
5908 +       clear_bit(EVENT_CMD_ERROR, &host->pending_events)
5909 +#define mci_clear_data_pending(host)                   \
5910 +       clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
5911 +#define mci_clear_data_error_pending(host)             \
5912 +       clear_bit(EVENT_DATA_ERROR, &host->pending_events)
5913 +#define mci_clear_stop_sent_pending(host)              \
5914 +       clear_bit(EVENT_STOP_SENT, &host->pending_events)
5915 +#define mci_clear_stop_pending(host)                   \
5916 +       clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
5917 +#define mci_clear_stop_error_pending(host)             \
5918 +       clear_bit(EVENT_STOP_ERROR, &host->pending_events)
5919 +#define mci_clear_dma_error_pending(host)              \
5920 +       clear_bit(EVENT_DMA_ERROR, &host->pending_events)
5921 +#define mci_clear_card_detect_pending(host)            \
5922 +       clear_bit(EVENT_CARD_DETECT, &host->pending_events)
5923 +
5924 +
5925 +#ifdef CONFIG_DEBUG_FS
5926 +#include <linux/debugfs.h>
5927 +
5928 +#define DBG_REQ_BUF_SIZE       (4096 - sizeof(unsigned int))
5929 +
5930 +struct req_dbg_data {
5931 +       unsigned int nbytes;
5932 +       char str[DBG_REQ_BUF_SIZE];
5933 +};
5934 +
5935 +static int req_dbg_open(struct inode *inode, struct file *file)
5936 +{
5937 +       struct atmel_mci *host;
5938 +       struct mmc_request *mrq;
5939 +       struct mmc_command *cmd, *stop;
5940 +       struct mmc_data *data;
5941 +       struct req_dbg_data *priv;
5942 +       char *str;
5943 +       unsigned long n = 0;
5944 +
5945 +       priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
5946 +       if (!priv)
5947 +               return -ENOMEM;
5948 +       str = priv->str;
5949 +
5950 +       mutex_lock(&inode->i_mutex);
5951 +       host = inode->i_private;
5952 +
5953 +       spin_lock_irq(&host->mmc->lock);
5954 +       mrq = host->mrq;
5955 +       if (mrq) {
5956 +               cmd = mrq->cmd;
5957 +               data = mrq->data;
5958 +               stop = mrq->stop;
5959 +               n = snprintf(str, DBG_REQ_BUF_SIZE,
5960 +                            "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
5961 +                            cmd->opcode, cmd->arg, cmd->flags,
5962 +                            cmd->resp[0], cmd->resp[1], cmd->resp[2],
5963 +                            cmd->resp[3], cmd->error);
5964 +               if (n < DBG_REQ_BUF_SIZE && data)
5965 +                       n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
5966 +                                     "DATA %u * %u (%u) %x (err %u)\n",
5967 +                                     data->blocks, data->blksz,
5968 +                                     data->bytes_xfered, data->flags,
5969 +                                     data->error);
5970 +               if (n < DBG_REQ_BUF_SIZE && stop)
5971 +                       n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
5972 +                                     "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
5973 +                                     stop->opcode, stop->arg, stop->flags,
5974 +                                     stop->resp[0], stop->resp[1],
5975 +                                     stop->resp[2], stop->resp[3],
5976 +                                     stop->error);
5977 +       }
5978 +       spin_unlock_irq(&host->mmc->lock);
5979 +       mutex_unlock(&inode->i_mutex);
5980 +
5981 +       priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
5982 +       file->private_data = priv;
5983 +
5984 +       return 0;
5985 +}
5986 +
5987 +static ssize_t req_dbg_read(struct file *file, char __user *buf,
5988 +                           size_t nbytes, loff_t *ppos)
5989 +{
5990 +       struct req_dbg_data *priv = file->private_data;
5991 +
5992 +       return simple_read_from_buffer(buf, nbytes, ppos,
5993 +                                      priv->str, priv->nbytes);
5994 +}
5995 +
5996 +static int req_dbg_release(struct inode *inode, struct file *file)
5997 +{
5998 +       kfree(file->private_data);
5999 +       return 0;
6000 +}
6001 +
6002 +static const struct file_operations req_dbg_fops = {
6003 +       .owner          = THIS_MODULE,
6004 +       .open           = req_dbg_open,
6005 +       .llseek         = no_llseek,
6006 +       .read           = req_dbg_read,
6007 +       .release        = req_dbg_release,
6008 +};
6009 +
6010 +static int regs_dbg_open(struct inode *inode, struct file *file)
6011 +{
6012 +       struct atmel_mci *host;
6013 +       unsigned int i;
6014 +       u32 *data;
6015 +       int ret = -ENOMEM;
6016 +
6017 +       mutex_lock(&inode->i_mutex);
6018 +       host = inode->i_private;
6019 +       data = kmalloc(inode->i_size, GFP_KERNEL);
6020 +       if (!data)
6021 +               goto out;
6022 +
6023 +       spin_lock_irq(&host->mmc->lock);
6024 +       for (i = 0; i < inode->i_size / 4; i++)
6025 +               data[i] = __raw_readl(host->regs + i * 4);
6026 +       spin_unlock_irq(&host->mmc->lock);
6027 +
6028 +       file->private_data = data;
6029 +       ret = 0;
6030 +
6031 +out:
6032 +       mutex_unlock(&inode->i_mutex);
6033 +
6034 +       return ret;
6035 +}
6036 +
6037 +static ssize_t regs_dbg_read(struct file *file, char __user *buf,
6038 +                            size_t nbytes, loff_t *ppos)
6039 +{
6040 +       struct inode *inode = file->f_dentry->d_inode;
6041 +       int ret;
6042 +
6043 +       mutex_lock(&inode->i_mutex);
6044 +       ret = simple_read_from_buffer(buf, nbytes, ppos,
6045 +                                     file->private_data,
6046 +                                     file->f_dentry->d_inode->i_size);
6047 +       mutex_unlock(&inode->i_mutex);
6048 +
6049 +       return ret;
6050 +}
6051 +
6052 +static int regs_dbg_release(struct inode *inode, struct file *file)
6053 +{
6054 +       kfree(file->private_data);
6055 +       return 0;
6056 +}
6057 +
6058 +static const struct file_operations regs_dbg_fops = {
6059 +       .owner          = THIS_MODULE,
6060 +       .open           = regs_dbg_open,
6061 +       .llseek         = generic_file_llseek,
6062 +       .read           = regs_dbg_read,
6063 +       .release        = regs_dbg_release,
6064 +};
6065 +
6066 +static void atmci_init_debugfs(struct atmel_mci *host)
6067 +{
6068 +       struct mmc_host *mmc;
6069 +       struct dentry *root, *regs;
6070 +       struct resource *res;
6071 +
6072 +       mmc = host->mmc;
6073 +       root = debugfs_create_dir(mmc_hostname(mmc), NULL);
6074 +       if (IS_ERR(root) || !root)
6075 +               goto err_root;
6076 +       host->debugfs_root = root;
6077 +
6078 +       regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
6079 +       if (!regs)
6080 +               goto err_regs;
6081 +
6082 +       res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
6083 +       regs->d_inode->i_size = res->end - res->start + 1;
6084 +       host->debugfs_regs = regs;
6085 +
6086 +       host->debugfs_req = debugfs_create_file("req", 0400, root,
6087 +                                               host, &req_dbg_fops);
6088 +       if (!host->debugfs_req)
6089 +               goto err_req;
6090 +
6091 +       host->debugfs_pending_events
6092 +               = debugfs_create_u32("pending_events", 0400, root,
6093 +                                    (u32 *)&host->pending_events);
6094 +       if (!host->debugfs_pending_events)
6095 +               goto err_pending_events;
6096 +
6097 +       host->debugfs_completed_events
6098 +               = debugfs_create_u32("completed_events", 0400, root,
6099 +                                    (u32 *)&host->completed_events);
6100 +       if (!host->debugfs_completed_events)
6101 +               goto err_completed_events;
6102 +
6103 +       return;
6104 +
6105 +err_completed_events:
6106 +       debugfs_remove(host->debugfs_pending_events);
6107 +err_pending_events:
6108 +       debugfs_remove(host->debugfs_req);
6109 +err_req:
6110 +       debugfs_remove(host->debugfs_regs);
6111 +err_regs:
6112 +       debugfs_remove(host->debugfs_root);
6113 +err_root:
6114 +       host->debugfs_root = NULL;
6115 +       dev_err(&host->pdev->dev,
6116 +               "failed to initialize debugfs for %s\n",
6117 +               mmc_hostname(mmc));
6118 +}
6119 +
6120 +static void atmci_cleanup_debugfs(struct atmel_mci *host)
6121 +{
6122 +       if (host->debugfs_root) {
6123 +               debugfs_remove(host->debugfs_completed_events);
6124 +               debugfs_remove(host->debugfs_pending_events);
6125 +               debugfs_remove(host->debugfs_req);
6126 +               debugfs_remove(host->debugfs_regs);
6127 +               debugfs_remove(host->debugfs_root);
6128 +               host->debugfs_root = NULL;
6129 +       }
6130 +}
6131 +#else
6132 +static inline void atmci_init_debugfs(struct atmel_mci *host)
6133 +{
6134 +
6135 +}
6136 +
6137 +static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
6138 +{
6139 +
6140 +}
6141 +#endif /* CONFIG_DEBUG_FS */
6142 +
6143 +static inline unsigned int ns_to_clocks(struct atmel_mci *host,
6144 +                                       unsigned int ns)
6145 +{
6146 +       return (ns * (host->bus_hz / 1000000) + 999) / 1000;
6147 +}
6148 +
6149 +static void atmci_set_timeout(struct atmel_mci *host,
6150 +                             struct mmc_data *data)
6151 +{
6152 +       static unsigned dtomul_to_shift[] = {
6153 +               0, 4, 7, 8, 10, 12, 16, 20
6154 +       };
6155 +       unsigned timeout;
6156 +       unsigned dtocyc, dtomul;
6157 +
6158 +       timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
6159 +
6160 +       for (dtomul = 0; dtomul < 8; dtomul++) {
6161 +               unsigned shift = dtomul_to_shift[dtomul];
6162 +               dtocyc = (timeout + (1 << shift) - 1) >> shift;
6163 +               if (dtocyc < 15)
6164 +                       break;
6165 +       }
6166 +
6167 +       if (dtomul >= 8) {
6168 +               dtomul = 7;
6169 +               dtocyc = 15;
6170 +       }
6171 +
6172 +       pr_debug("%s: setting timeout to %u cycles\n",
6173 +                mmc_hostname(host->mmc),
6174 +                dtocyc << dtomul_to_shift[dtomul]);
6175 +       mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
6176 +                               | MCI_BF(DTOCYC, dtocyc)));
6177 +}
6178 +
6179 +/*
6180 + * Return mask with interrupt flags to be handled for this command.
6181 + */
6182 +static u32 atmci_prepare_command(struct mmc_host *mmc,
6183 +                                struct mmc_command *cmd,
6184 +                                u32 *cmd_flags)
6185 +{
6186 +       u32 cmdr;
6187 +       u32 iflags;
6188 +
6189 +       cmd->error = MMC_ERR_NONE;
6190 +
6191 +       cmdr = 0;
6192 +       BUG_ON(MCI_BFEXT(CMDNB, cmdr) != 0);
6193 +       cmdr = MCI_BFINS(CMDNB, cmd->opcode, cmdr);
6194 +
6195 +       if (cmd->flags & MMC_RSP_PRESENT) {
6196 +               if (cmd->flags & MMC_RSP_136)
6197 +                       cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
6198 +               else
6199 +                       cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
6200 +       }
6201 +
6202 +       /*
6203 +        * This should really be MAXLAT_5 for CMD2 and ACMD41, but
6204 +        * it's too difficult to determine whether this is an ACMD or
6205 +        * not. Better make it 64.
6206 +        */
6207 +       cmdr |= MCI_BIT(MAXLAT);
6208 +
6209 +       if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
6210 +               cmdr |= MCI_BIT(OPDCMD);
6211 +
6212 +       iflags = MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS;
6213 +       if (!(cmd->flags & MMC_RSP_CRC))
6214 +               iflags &= ~MCI_BIT(RCRCE);
6215 +
6216 +       pr_debug("%s: cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
6217 +                mmc_hostname(mmc), cmd->opcode, cmd->arg, cmd->flags,
6218 +                (unsigned long)cmdr);
6219 +
6220 +       *cmd_flags = cmdr;
6221 +       return iflags;
6222 +}
6223 +
6224 +static void atmci_start_command(struct atmel_mci *host,
6225 +                               struct mmc_command *cmd,
6226 +                               u32 cmd_flags)
6227 +{
6228 +       WARN_ON(host->cmd);
6229 +       host->cmd = cmd;
6230 +
6231 +       mci_writel(host, ARGR, cmd->arg);
6232 +       mci_writel(host, CMDR, cmd_flags);
6233 +
6234 +       if (cmd->data)
6235 +               dma_start_request(host->dma.req.req.dmac,
6236 +                                 host->dma.req.req.channel);
6237 +}
6238 +
6239 +/*
6240 + * Returns a mask of flags to be set in the command register when the
6241 + * command to start the transfer is to be sent.
6242 + */
6243 +static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
6244 +{
6245 +       struct atmel_mci *host = mmc_priv(mmc);
6246 +       u32 cmd_flags;
6247 +
6248 +       WARN_ON(host->data);
6249 +       host->data = data;
6250 +
6251 +       atmci_set_timeout(host, data);
6252 +       mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
6253 +                               | MCI_BF(BLKLEN, data->blksz)));
6254 +       host->dma.req.block_size = data->blksz;
6255 +       host->dma.req.nr_blocks = data->blocks;
6256 +
6257 +       cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
6258 +       if (data->flags & MMC_DATA_STREAM)
6259 +               cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
6260 +       else if (data->blocks > 1)
6261 +               cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
6262 +       else
6263 +               cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
6264 +
6265 +       if (data->flags & MMC_DATA_READ) {
6266 +               cmd_flags |= MCI_BIT(TRDIR);
6267 +               host->dma.req.nr_sg
6268 +                       = dma_map_sg(&host->pdev->dev, data->sg,
6269 +                                    data->sg_len, DMA_FROM_DEVICE);
6270 +               host->dma.req.periph_id = host->dma.rx_periph_id;
6271 +               host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
6272 +               host->dma.req.data_reg = host->mapbase + MCI_RDR;
6273 +       } else {
6274 +               host->dma.req.nr_sg
6275 +                       = dma_map_sg(&host->pdev->dev, data->sg,
6276 +                                    data->sg_len, DMA_TO_DEVICE);
6277 +               host->dma.req.periph_id = host->dma.tx_periph_id;
6278 +               host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
6279 +               host->dma.req.data_reg = host->mapbase + MCI_TDR;
6280 +       }
6281 +       host->dma.req.sg = data->sg;
6282 +
6283 +       dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
6284 +
6285 +       return cmd_flags;
6286 +}
6287 +
6288 +static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
6289 +{
6290 +       struct atmel_mci *host = mmc_priv(mmc);
6291 +       struct mmc_data *data = mrq->data;
6292 +       u32 iflags;
6293 +       u32 cmdflags = 0;
6294 +
6295 +       iflags = mci_readl(host, IMR);
6296 +       if (iflags)
6297 +               printk("WARNING: IMR=0x%08x\n", mci_readl(host, IMR));
6298 +
6299 +       WARN_ON(host->mrq != NULL);
6300 +       host->mrq = mrq;
6301 +       host->pending_events = 0;
6302 +       host->completed_events = 0;
6303 +
6304 +       iflags = atmci_prepare_command(mmc, mrq->cmd, &cmdflags);
6305 +
6306 +       if (mrq->stop) {
6307 +               BUG_ON(!data);
6308 +
6309 +               host->stop_iflags = atmci_prepare_command(mmc, mrq->stop,
6310 +                                                         &host->stop_cmdr);
6311 +               host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
6312 +               if (!(data->flags & MMC_DATA_WRITE))
6313 +                       host->stop_cmdr |= MCI_BIT(TRDIR);
6314 +               if (data->flags & MMC_DATA_STREAM)
6315 +                       host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
6316 +               else
6317 +                       host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
6318 +       }
6319 +       if (data) {
6320 +               cmdflags |= atmci_prepare_data(mmc, data);
6321 +               iflags |= MCI_DATA_ERROR_FLAGS;
6322 +       }
6323 +
6324 +       atmci_start_command(host, mrq->cmd, cmdflags);
6325 +       mci_writel(host, IER, iflags);
6326 +}
6327 +
6328 +static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
6329 +{
6330 +       struct atmel_mci *host = mmc_priv(mmc);
6331 +
6332 +       if (ios->clock) {
6333 +               u32 clkdiv;
6334 +
6335 +               clkdiv = host->bus_hz / (2 * ios->clock) - 1;
6336 +               if (clkdiv > 255)
6337 +                       clkdiv = 255;
6338 +               mci_writel(host, MR, (clkdiv
6339 +                                     | MCI_BIT(WRPROOF)
6340 +                                     | MCI_BIT(RDPROOF)));
6341 +       }
6342 +
6343 +       switch (ios->bus_width) {
6344 +       case MMC_BUS_WIDTH_1:
6345 +               mci_writel(host, SDCR, 0);
6346 +               break;
6347 +       case MMC_BUS_WIDTH_4:
6348 +               mci_writel(host, SDCR, MCI_BIT(SDCBUS));
6349 +               break;
6350 +       }
6351 +
6352 +       switch (ios->power_mode) {
6353 +       case MMC_POWER_OFF:
6354 +               mci_writel(host, CR, MCI_BIT(MCIDIS));
6355 +               break;
6356 +       case MMC_POWER_UP:
6357 +               mci_writel(host, CR, MCI_BIT(SWRST));
6358 +               break;
6359 +       case MMC_POWER_ON:
6360 +               mci_writel(host, CR, MCI_BIT(MCIEN));
6361 +               break;
6362 +       }
6363 +}
6364 +
6365 +static int atmci_get_ro(struct mmc_host *mmc)
6366 +{
6367 +       int read_only = 0;
6368 +       struct atmel_mci *host = mmc_priv(mmc);
6369 +
6370 +       if (host->wp_pin >= 0) {
6371 +               read_only = gpio_get_value(host->wp_pin);
6372 +               pr_debug("%s: card is %s\n", mmc_hostname(mmc),
6373 +                        read_only ? "read-only" : "read-write");
6374 +       } else {
6375 +               pr_debug("%s: no pin for checking read-only switch."
6376 +                        " Assuming write-enable.\n", mmc_hostname(mmc));
6377 +       }
6378 +
6379 +       return read_only;
6380 +}
6381 +
6382 +static struct mmc_host_ops atmci_ops = {
6383 +       .request        = atmci_request,
6384 +       .set_ios        = atmci_set_ios,
6385 +       .get_ro         = atmci_get_ro,
6386 +};
6387 +
6388 +static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
6389 +{
6390 +       struct atmel_mci *host = mmc_priv(mmc);
6391 +
6392 +       WARN_ON(host->cmd || host->data);
6393 +       host->mrq = NULL;
6394 +
6395 +       mmc_request_done(mmc, mrq);
6396 +}
6397 +
6398 +static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
6399 +                         u32 flags)
6400 +{
6401 +       struct atmel_mci *host = mmc_priv(mmc);
6402 +
6403 +       atmci_start_command(host, data->stop, host->stop_cmdr | flags);
6404 +       mci_writel(host, IER, host->stop_iflags);
6405 +}
6406 +
6407 +static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
6408 +{
6409 +       host->data = NULL;
6410 +       dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
6411 +                    ((data->flags & MMC_DATA_WRITE)
6412 +                     ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
6413 +
6414 +       /*
6415 +        * Data might complete before command for very short transfers
6416 +        * (like READ_SCR)
6417 +        */
6418 +       if (mci_cmd_is_complete(host)
6419 +           && (!data->stop || mci_stop_is_complete(host)))
6420 +               atmci_request_end(host->mmc, data->mrq);
6421 +}
6422 +
6423 +static void atmci_command_error(struct mmc_host *mmc,
6424 +                               struct mmc_command *cmd,
6425 +                               u32 status)
6426 +{
6427 +       pr_debug("%s: command error: status=0x%08x\n",
6428 +                mmc_hostname(mmc), status);
6429 +
6430 +       if (status & MCI_BIT(RTOE))
6431 +               cmd->error = MMC_ERR_TIMEOUT;
6432 +       else if (status & MCI_BIT(RCRCE))
6433 +               cmd->error = MMC_ERR_BADCRC;
6434 +       else
6435 +               cmd->error = MMC_ERR_FAILED;
6436 +}
6437 +
6438 +static void atmci_tasklet_func(unsigned long priv)
6439 +{
6440 +       struct mmc_host *mmc = (struct mmc_host *)priv;
6441 +       struct atmel_mci *host = mmc_priv(mmc);
6442 +       struct mmc_request *mrq = host->mrq;
6443 +       struct mmc_data *data = host->data;
6444 +
6445 +       pr_debug("atmci_tasklet: pending/completed/mask %lx/%lx/%x\n",
6446 +                host->pending_events, host->completed_events,
6447 +                mci_readl(host, IMR));
6448 +
6449 +       if (mci_clear_cmd_error_is_pending(host)) {
6450 +               struct mmc_command *cmd;
6451 +
6452 +               mci_set_cmd_error_complete(host);
6453 +               mci_clear_cmd_pending(host);
6454 +               cmd = host->mrq->cmd;
6455 +
6456 +               if (cmd->data) {
6457 +                       dma_stop_request(host->dma.req.req.dmac,
6458 +                                        host->dma.req.req.channel);
6459 +                       host->data = NULL;
6460 +               }
6461 +
6462 +               atmci_command_error(mmc, cmd, host->error_status);
6463 +               atmci_request_end(mmc, cmd->mrq);
6464 +       }
6465 +       if (mci_clear_stop_error_is_pending(host)) {
6466 +               mci_set_stop_error_complete(host);
6467 +               mci_clear_stop_pending(host);
6468 +               atmci_command_error(mmc, host->mrq->stop,
6469 +                                   host->error_status);
6470 +               if (!host->data)
6471 +                       atmci_request_end(mmc, host->mrq);
6472 +       }
6473 +       if (mci_clear_cmd_is_pending(host)) {
6474 +               mci_set_cmd_complete(host);
6475 +               if (!mrq->data || mci_data_is_complete(host)
6476 +                   || mci_data_error_is_complete(host))
6477 +                       atmci_request_end(mmc, mrq);
6478 +       }
6479 +       if (mci_clear_stop_is_pending(host)) {
6480 +               mci_set_stop_complete(host);
6481 +               if (mci_data_is_complete(host)
6482 +                   || mci_data_error_is_complete(host))
6483 +                       atmci_request_end(mmc, mrq);
6484 +       }
6485 +       if (mci_clear_dma_error_is_pending(host)) {
6486 +               mci_set_dma_error_complete(host);
6487 +               mci_clear_data_pending(host);
6488 +
6489 +               /* DMA controller got bus error => invalid address */
6490 +               data->error = MMC_ERR_INVALID;
6491 +
6492 +               printk(KERN_DEBUG "%s: dma error after %u bytes xfered\n",
6493 +                      mmc_hostname(mmc), host->data->bytes_xfered);
6494 +
6495 +               if (data->stop
6496 +                   && !mci_set_stop_sent_is_completed(host))
6497 +                       /* TODO: Check if card is still present */
6498 +                       send_stop_cmd(host->mmc, data, 0);
6499 +
6500 +               atmci_data_complete(host, data);
6501 +       }
6502 +       if (mci_clear_data_error_is_pending(host)) {
6503 +               u32 status = host->error_status;
6504 +
6505 +               mci_set_data_error_complete(host);
6506 +               mci_clear_data_pending(host);
6507 +
6508 +               dma_stop_request(host->dma.req.req.dmac,
6509 +                                host->dma.req.req.channel);
6510 +
6511 +               printk(KERN_DEBUG "%s: data error: status=0x%08x\n",
6512 +                      mmc_hostname(host->mmc), status);
6513 +
6514 +               if (status & MCI_BIT(DCRCE)) {
6515 +                       printk(KERN_DEBUG "%s: Data CRC error\n",
6516 +                              mmc_hostname(host->mmc));
6517 +                       data->error = MMC_ERR_BADCRC;
6518 +               } else if (status & MCI_BIT(DTOE)) {
6519 +                       printk(KERN_DEBUG "%s: Data Timeout error\n",
6520 +                              mmc_hostname(host->mmc));
6521 +                       data->error = MMC_ERR_TIMEOUT;
6522 +               } else {
6523 +                       printk(KERN_DEBUG "%s: Data FIFO error\n",
6524 +                              mmc_hostname(host->mmc));
6525 +                       data->error = MMC_ERR_FIFO;
6526 +               }
6527 +               printk(KERN_DEBUG "%s: Bytes xfered: %u\n",
6528 +                      mmc_hostname(host->mmc), data->bytes_xfered);
6529 +
6530 +               if (data->stop
6531 +                   && !mci_set_stop_sent_is_completed(host))
6532 +                       /* TODO: Check if card is still present */
6533 +                       send_stop_cmd(host->mmc, data, 0);
6534 +
6535 +               atmci_data_complete(host, data);
6536 +       }
6537 +       if (mci_clear_data_is_pending(host)) {
6538 +               mci_set_data_complete(host);
6539 +               data->bytes_xfered = data->blocks * data->blksz;
6540 +               atmci_data_complete(host, data);
6541 +       }
6542 +       if (mci_clear_card_detect_is_pending(host)) {
6543 +               /* Reset controller if card is gone */
6544 +               if (!host->present) {
6545 +                       mci_writel(host, CR, MCI_BIT(SWRST));
6546 +                       mci_writel(host, IDR, ~0UL);
6547 +                       mci_writel(host, CR, MCI_BIT(MCIEN));
6548 +               }
6549 +
6550 +               /* Clean up queue if present */
6551 +               if (mrq) {
6552 +                       if (!mci_cmd_is_complete(host)
6553 +                           && !mci_cmd_error_is_complete(host)) {
6554 +                               mrq->cmd->error = MMC_ERR_TIMEOUT;
6555 +                       }
6556 +                       if (mrq->data && !mci_data_is_complete(host)
6557 +                           && !mci_data_error_is_complete(host)) {
6558 +                               dma_stop_request(host->dma.req.req.dmac,
6559 +                                               host->dma.req.req.channel);
6560 +                               host->data->error = MMC_ERR_TIMEOUT;
6561 +                               atmci_data_complete(host, data);
6562 +                       }
6563 +                       if (mrq->stop && !mci_stop_is_complete(host)
6564 +                           && !mci_stop_error_is_complete(host)) {
6565 +                               mrq->stop->error = MMC_ERR_TIMEOUT;
6566 +                       }
6567 +
6568 +                       host->cmd = NULL;
6569 +                       atmci_request_end(mmc, mrq);
6570 +               }
6571 +               mmc_detect_change(host->mmc, msecs_to_jiffies(100));
6572 +       }
6573 +}
6574 +
6575 +static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
6576 +{
6577 +       struct atmel_mci *host = mmc_priv(mmc);
6578 +       struct mmc_command *cmd = host->cmd;
6579 +
6580 +       /*
6581 +        * Read the response now so that we're free to send a new
6582 +        * command immediately.
6583 +        */
6584 +       cmd->resp[0] = mci_readl(host, RSPR);
6585 +       cmd->resp[1] = mci_readl(host, RSPR);
6586 +       cmd->resp[2] = mci_readl(host, RSPR);
6587 +       cmd->resp[3] = mci_readl(host, RSPR);
6588 +
6589 +       mci_writel(host, IDR, MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS);
6590 +       host->cmd = NULL;
6591 +
6592 +       if (mci_stop_sent_is_complete(host))
6593 +               mci_set_stop_pending(host);
6594 +       else
6595 +               mci_set_cmd_pending(host);
6596 +
6597 +       tasklet_schedule(&host->tasklet);
6598 +}
6599 +
6600 +static void atmci_xfer_complete(struct dma_request *_req)
6601 +{
6602 +       struct dma_request_sg *req = to_dma_request_sg(_req);
6603 +       struct atmel_mci_dma *dma;
6604 +       struct atmel_mci *host;
6605 +       struct mmc_data *data;
6606 +
6607 +       dma = container_of(req, struct atmel_mci_dma, req);
6608 +       host = container_of(dma, struct atmel_mci, dma);
6609 +       data = host->data;
6610 +
6611 +       if (data->stop && !mci_set_stop_sent_is_completed(host))
6612 +               send_stop_cmd(host->mmc, data, 0);
6613 +
6614 +       if (data->flags & MMC_DATA_READ) {
6615 +               mci_writel(host, IDR, MCI_DATA_ERROR_FLAGS);
6616 +               mci_set_data_pending(host);
6617 +               tasklet_schedule(&host->tasklet);
6618 +       } else {
6619 +               /*
6620 +                * For the WRITE case, wait for NOTBUSY. This function
6621 +                * is called when everything has been written to the
6622 +                * controller, not when the card is done programming.
6623 +                */
6624 +               mci_writel(host, IER, MCI_BIT(NOTBUSY));
6625 +       }
6626 +}
6627 +
6628 +static void atmci_dma_error(struct dma_request *_req)
6629 +{
6630 +       struct dma_request_sg *req = to_dma_request_sg(_req);
6631 +       struct atmel_mci_dma *dma;
6632 +       struct atmel_mci *host;
6633 +
6634 +       dma = container_of(req, struct atmel_mci_dma, req);
6635 +       host = container_of(dma, struct atmel_mci, dma);
6636 +
6637 +       mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
6638 +                              | MCI_DATA_ERROR_FLAGS));
6639 +
6640 +       mci_set_dma_error_pending(host);
6641 +       tasklet_schedule(&host->tasklet);
6642 +}
6643 +
6644 +static irqreturn_t atmci_interrupt(int irq, void *dev_id)
6645 +{
6646 +       struct mmc_host *mmc = dev_id;
6647 +       struct atmel_mci *host = mmc_priv(mmc);
6648 +       u32 status, mask, pending;
6649 +
6650 +       spin_lock(&mmc->lock);
6651 +
6652 +       status = mci_readl(host, SR);
6653 +       mask = mci_readl(host, IMR);
6654 +       pending = status & mask;
6655 +
6656 +       do {
6657 +               if (pending & MCI_CMD_ERROR_FLAGS) {
6658 +                       mci_writel(host, IDR, (MCI_BIT(CMDRDY)
6659 +                                              | MCI_BIT(NOTBUSY)
6660 +                                              | MCI_CMD_ERROR_FLAGS
6661 +                                              | MCI_DATA_ERROR_FLAGS));
6662 +                       host->error_status = status;
6663 +                       host->cmd = NULL;
6664 +                       if (mci_stop_sent_is_complete(host))
6665 +                               mci_set_stop_error_pending(host);
6666 +                       else
6667 +                               mci_set_cmd_error_pending(host);
6668 +                       tasklet_schedule(&host->tasklet);
6669 +                       break;
6670 +               }
6671 +               if (pending & MCI_DATA_ERROR_FLAGS) {
6672 +                       mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
6673 +                                              | MCI_DATA_ERROR_FLAGS));
6674 +                       host->error_status = status;
6675 +                       mci_set_data_error_pending(host);
6676 +                       tasklet_schedule(&host->tasklet);
6677 +                       break;
6678 +               }
6679 +               if (pending & MCI_BIT(CMDRDY))
6680 +                       atmci_cmd_interrupt(mmc, status);
6681 +               if (pending & MCI_BIT(NOTBUSY)) {
6682 +                       mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
6683 +                                              | MCI_DATA_ERROR_FLAGS));
6684 +                       mci_set_data_pending(host);
6685 +                       tasklet_schedule(&host->tasklet);
6686 +               }
6687 +
6688 +               status = mci_readl(host, SR);
6689 +               mask = mci_readl(host, IMR);
6690 +               pending = status & mask;
6691 +       } while (pending);
6692 +
6693 +       spin_unlock(&mmc->lock);
6694 +
6695 +       return IRQ_HANDLED;
6696 +}
6697 +
6698 +static irqreturn_t atmci_detect_change(int irq, void *dev_id)
6699 +{
6700 +       struct mmc_host *mmc = dev_id;
6701 +       struct atmel_mci *host = mmc_priv(mmc);
6702 +
6703 +       int present = !gpio_get_value(irq_to_gpio(irq));
6704 +
6705 +       if (present != host->present) {
6706 +               pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
6707 +                        present ? "inserted" : "removed");
6708 +               host->present = present;
6709 +               mci_set_card_detect_pending(host);
6710 +               tasklet_schedule(&host->tasklet);
6711 +       }
6712 +       return IRQ_HANDLED;
6713 +}
6714 +
6715 +static int __devinit atmci_probe(struct platform_device *pdev)
6716 +{
6717 +       struct mci_platform_data *board;
6718 +       struct atmel_mci *host;
6719 +       struct mmc_host *mmc;
6720 +       struct resource *regs;
6721 +       int irq;
6722 +       int ret;
6723 +
6724 +       regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
6725 +       if (!regs)
6726 +               return -ENXIO;
6727 +       irq = platform_get_irq(pdev, 0);
6728 +       if (irq < 0)
6729 +               return irq;
6730 +
6731 +       board = pdev->dev.platform_data;
6732 +
6733 +       mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
6734 +       if (!mmc)
6735 +               return -ENOMEM;
6736 +
6737 +       host = mmc_priv(mmc);
6738 +       host->pdev = pdev;
6739 +       host->mmc = mmc;
6740 +       if (board) {
6741 +               host->detect_pin = board->detect_pin;
6742 +               host->wp_pin = board->wp_pin;
6743 +       } else {
6744 +               host->detect_pin = -1;
6745 +               host->detect_pin = -1;
6746 +       }
6747 +
6748 +       host->mck = clk_get(&pdev->dev, "mci_clk");
6749 +       if (IS_ERR(host->mck)) {
6750 +               ret = PTR_ERR(host->mck);
6751 +               goto out_free_host;
6752 +       }
6753 +       clk_enable(host->mck);
6754 +
6755 +       ret = -ENOMEM;
6756 +       host->regs = ioremap(regs->start, regs->end - regs->start + 1);
6757 +       if (!host->regs)
6758 +               goto out_disable_clk;
6759 +
6760 +       host->bus_hz = clk_get_rate(host->mck);
6761 +       host->mapbase = regs->start;
6762 +
6763 +       mmc->ops = &atmci_ops;
6764 +       mmc->f_min = (host->bus_hz + 511) / 512;
6765 +       mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
6766 +       mmc->ocr_avail  = 0x00100000;
6767 +       mmc->caps |= MMC_CAP_4_BIT_DATA;
6768 +
6769 +       tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
6770 +
6771 +       ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
6772 +       if (ret)
6773 +               goto out_unmap;
6774 +
6775 +       /* Assume card is present if we don't have a detect pin */
6776 +       host->present = 1;
6777 +       if (host->detect_pin >= 0) {
6778 +               if (gpio_request(host->detect_pin, "mmc_detect")) {
6779 +                       printk(KERN_WARNING "%s: no detect pin available\n",
6780 +                              mmc_hostname(host->mmc));
6781 +                       host->detect_pin = -1;
6782 +               } else {
6783 +                       host->present = !gpio_get_value(host->detect_pin);
6784 +               }
6785 +       }
6786 +       if (host->wp_pin >= 0) {
6787 +               if (gpio_request(host->wp_pin, "mmc_wp")) {
6788 +                       printk(KERN_WARNING "%s: no WP pin available\n",
6789 +                              mmc_hostname(host->mmc));
6790 +                       host->wp_pin = -1;
6791 +               }
6792 +       }
6793 +
6794 +       /* TODO: Get this information from platform data */
6795 +       ret = -ENOMEM;
6796 +       host->dma.req.req.dmac = find_dma_controller(0);
6797 +       if (!host->dma.req.req.dmac) {
6798 +               printk(KERN_ERR
6799 +                      "mmci: No DMA controller available, aborting\n");
6800 +               goto out_free_irq;
6801 +       }
6802 +       ret = dma_alloc_channel(host->dma.req.req.dmac);
6803 +       if (ret < 0) {
6804 +               printk(KERN_ERR
6805 +                      "mmci: Unable to allocate DMA channel, aborting\n");
6806 +               goto out_free_irq;
6807 +       }
6808 +       host->dma.req.req.channel = ret;
6809 +       host->dma.req.width = DMA_WIDTH_32BIT;
6810 +       host->dma.req.req.xfer_complete = atmci_xfer_complete;
6811 +       host->dma.req.req.block_complete = NULL; // atmci_block_complete;
6812 +       host->dma.req.req.error = atmci_dma_error;
6813 +       host->dma.rx_periph_id = 0;
6814 +       host->dma.tx_periph_id = 1;
6815 +
6816 +       mci_writel(host, CR, MCI_BIT(SWRST));
6817 +       mci_writel(host, IDR, ~0UL);
6818 +       mci_writel(host, CR, MCI_BIT(MCIEN));
6819 +
6820 +       platform_set_drvdata(pdev, host);
6821 +
6822 +       mmc_add_host(mmc);
6823 +
6824 +       if (host->detect_pin >= 0) {
6825 +               ret = request_irq(gpio_to_irq(host->detect_pin),
6826 +                                 atmci_detect_change,
6827 +                                 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
6828 +                                 DRIVER_NAME, mmc);
6829 +               if (ret) {
6830 +                       printk(KERN_ERR
6831 +                              "%s: could not request IRQ %d for detect pin\n",
6832 +                              mmc_hostname(mmc),
6833 +                              gpio_to_irq(host->detect_pin));
6834 +                       gpio_free(host->detect_pin);
6835 +                       host->detect_pin = -1;
6836 +               }
6837 +       }
6838 +
6839 +       printk(KERN_INFO "%s: Atmel MCI controller at 0x%08lx irq %d\n",
6840 +              mmc_hostname(mmc), host->mapbase, irq);
6841 +
6842 +       atmci_init_debugfs(host);
6843 +
6844 +       return 0;
6845 +
6846 +out_free_irq:
6847 +       if (host->detect_pin >= 0)
6848 +               gpio_free(host->detect_pin);
6849 +       if (host->wp_pin >= 0)
6850 +               gpio_free(host->wp_pin);
6851 +       free_irq(irq, mmc);
6852 +out_unmap:
6853 +       iounmap(host->regs);
6854 +out_disable_clk:
6855 +       clk_disable(host->mck);
6856 +       clk_put(host->mck);
6857 +out_free_host:
6858 +       mmc_free_host(mmc);
6859 +       return ret;
6860 +}
6861 +
6862 +static int __devexit atmci_remove(struct platform_device *pdev)
6863 +{
6864 +       struct atmel_mci *host = platform_get_drvdata(pdev);
6865 +
6866 +       platform_set_drvdata(pdev, NULL);
6867 +
6868 +       if (host) {
6869 +               atmci_cleanup_debugfs(host);
6870 +
6871 +               if (host->detect_pin >= 0) {
6872 +                       free_irq(gpio_to_irq(host->detect_pin), host->mmc);
6873 +                       cancel_delayed_work(&host->mmc->detect);
6874 +                       gpio_free(host->detect_pin);
6875 +               }
6876 +
6877 +               mmc_remove_host(host->mmc);
6878 +
6879 +               mci_writel(host, IDR, ~0UL);
6880 +               mci_writel(host, CR, MCI_BIT(MCIDIS));
6881 +               mci_readl(host, SR);
6882 +
6883 +               dma_release_channel(host->dma.req.req.dmac,
6884 +                                   host->dma.req.req.channel);
6885 +
6886 +               if (host->wp_pin >= 0)
6887 +                       gpio_free(host->wp_pin);
6888 +
6889 +               free_irq(platform_get_irq(pdev, 0), host->mmc);
6890 +               iounmap(host->regs);
6891 +
6892 +               clk_disable(host->mck);
6893 +               clk_put(host->mck);
6894 +
6895 +               mmc_free_host(host->mmc);
6896 +       }
6897 +       return 0;
6898 +}
6899 +
6900 +static struct platform_driver atmci_driver = {
6901 +       .probe          = atmci_probe,
6902 +       .remove         = __devexit_p(atmci_remove),
6903 +       .driver         = {
6904 +               .name           = DRIVER_NAME,
6905 +       },
6906 +};
6907 +
6908 +static int __init atmci_init(void)
6909 +{
6910 +       return platform_driver_register(&atmci_driver);
6911 +}
6912 +
6913 +static void __exit atmci_exit(void)
6914 +{
6915 +       platform_driver_unregister(&atmci_driver);
6916 +}
6917 +
6918 +module_init(atmci_init);
6919 +module_exit(atmci_exit);
6920 +
6921 +MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
6922 +MODULE_LICENSE("GPL");
6923 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/mmc/atmel-mci.h avr32-git/drivers/mmc/atmel-mci.h
6924 --- linux-2.6.21.3/drivers/mmc/atmel-mci.h      1970-01-01 01:00:00.000000000 +0100
6925 +++ avr32-git/drivers/mmc/atmel-mci.h   2007-06-06 11:33:56.000000000 +0200
6926 @@ -0,0 +1,192 @@
6927 +/*
6928 + * Atmel MultiMedia Card Interface driver
6929 + *
6930 + * Copyright (C) 2004-2006 Atmel Corporation
6931 + *
6932 + * This program is free software; you can redistribute it and/or modify
6933 + * it under the terms of the GNU General Public License version 2 as
6934 + * published by the Free Software Foundation.
6935 + */
6936 +#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
6937 +#define __DRIVERS_MMC_ATMEL_MCI_H__
6938 +
6939 +/* MCI register offsets */
6940 +#define MCI_CR                                 0x0000
6941 +#define MCI_MR                                 0x0004
6942 +#define MCI_DTOR                               0x0008
6943 +#define MCI_SDCR                               0x000c
6944 +#define MCI_ARGR                               0x0010
6945 +#define MCI_CMDR                               0x0014
6946 +#define MCI_BLKR                               0x0018
6947 +#define MCI_RSPR                               0x0020
6948 +#define MCI_RSPR1                              0x0024
6949 +#define MCI_RSPR2                              0x0028
6950 +#define MCI_RSPR3                              0x002c
6951 +#define MCI_RDR                                        0x0030
6952 +#define MCI_TDR                                        0x0034
6953 +#define MCI_SR                                 0x0040
6954 +#define MCI_IER                                        0x0044
6955 +#define MCI_IDR                                        0x0048
6956 +#define MCI_IMR                                        0x004c
6957 +
6958 +/* Bitfields in CR */
6959 +#define MCI_MCIEN_OFFSET                       0
6960 +#define MCI_MCIEN_SIZE                         1
6961 +#define MCI_MCIDIS_OFFSET                      1
6962 +#define MCI_MCIDIS_SIZE                                1
6963 +#define MCI_PWSEN_OFFSET                       2
6964 +#define MCI_PWSEN_SIZE                         1
6965 +#define MCI_PWSDIS_OFFSET                      3
6966 +#define MCI_PWSDIS_SIZE                                1
6967 +#define MCI_SWRST_OFFSET                       7
6968 +#define MCI_SWRST_SIZE                         1
6969 +
6970 +/* Bitfields in MR */
6971 +#define MCI_CLKDIV_OFFSET                      0
6972 +#define MCI_CLKDIV_SIZE                                8
6973 +#define MCI_PWSDIV_OFFSET                      8
6974 +#define MCI_PWSDIV_SIZE                                3
6975 +#define MCI_RDPROOF_OFFSET                     11
6976 +#define MCI_RDPROOF_SIZE                       1
6977 +#define MCI_WRPROOF_OFFSET                     12
6978 +#define MCI_WRPROOF_SIZE                       1
6979 +#define MCI_DMAPADV_OFFSET                     14
6980 +#define MCI_DMAPADV_SIZE                       1
6981 +#define MCI_BLKLEN_OFFSET                      16
6982 +#define MCI_BLKLEN_SIZE                                16
6983 +
6984 +/* Bitfields in DTOR */
6985 +#define MCI_DTOCYC_OFFSET                      0
6986 +#define MCI_DTOCYC_SIZE                                4
6987 +#define MCI_DTOMUL_OFFSET                      4
6988 +#define MCI_DTOMUL_SIZE                                3
6989 +
6990 +/* Bitfields in SDCR */
6991 +#define MCI_SDCSEL_OFFSET                      0
6992 +#define MCI_SDCSEL_SIZE                                4
6993 +#define MCI_SDCBUS_OFFSET                      7
6994 +#define MCI_SDCBUS_SIZE                                1
6995 +
6996 +/* Bitfields in ARGR */
6997 +#define MCI_ARG_OFFSET                         0
6998 +#define MCI_ARG_SIZE                           32
6999 +
7000 +/* Bitfields in CMDR */
7001 +#define MCI_CMDNB_OFFSET                       0
7002 +#define MCI_CMDNB_SIZE                         6
7003 +#define MCI_RSPTYP_OFFSET                      6
7004 +#define MCI_RSPTYP_SIZE                                2
7005 +#define MCI_SPCMD_OFFSET                       8
7006 +#define MCI_SPCMD_SIZE                         3
7007 +#define MCI_OPDCMD_OFFSET                      11
7008 +#define MCI_OPDCMD_SIZE                                1
7009 +#define MCI_MAXLAT_OFFSET                      12
7010 +#define MCI_MAXLAT_SIZE                                1
7011 +#define MCI_TRCMD_OFFSET                       16
7012 +#define MCI_TRCMD_SIZE                         2
7013 +#define MCI_TRDIR_OFFSET                       18
7014 +#define MCI_TRDIR_SIZE                         1
7015 +#define MCI_TRTYP_OFFSET                       19
7016 +#define MCI_TRTYP_SIZE                         2
7017 +
7018 +/* Bitfields in BLKR */
7019 +#define MCI_BCNT_OFFSET                                0
7020 +#define MCI_BCNT_SIZE                          16
7021 +
7022 +/* Bitfields in RSPRn */
7023 +#define MCI_RSP_OFFSET                         0
7024 +#define MCI_RSP_SIZE                           32
7025 +
7026 +/* Bitfields in SR/IER/IDR/IMR */
7027 +#define MCI_CMDRDY_OFFSET                      0
7028 +#define MCI_CMDRDY_SIZE                                1
7029 +#define MCI_RXRDY_OFFSET                       1
7030 +#define MCI_RXRDY_SIZE                         1
7031 +#define MCI_TXRDY_OFFSET                       2
7032 +#define MCI_TXRDY_SIZE                         1
7033 +#define MCI_BLKE_OFFSET                                3
7034 +#define MCI_BLKE_SIZE                          1
7035 +#define MCI_DTIP_OFFSET                                4
7036 +#define MCI_DTIP_SIZE                          1
7037 +#define MCI_NOTBUSY_OFFSET                     5
7038 +#define MCI_NOTBUSY_SIZE                       1
7039 +#define MCI_ENDRX_OFFSET                       6
7040 +#define MCI_ENDRX_SIZE                         1
7041 +#define MCI_ENDTX_OFFSET                       7
7042 +#define MCI_ENDTX_SIZE                         1
7043 +#define MCI_RXBUFF_OFFSET                      14
7044 +#define MCI_RXBUFF_SIZE                                1
7045 +#define MCI_TXBUFE_OFFSET                      15
7046 +#define MCI_TXBUFE_SIZE                                1
7047 +#define MCI_RINDE_OFFSET                       16
7048 +#define MCI_RINDE_SIZE                         1
7049 +#define MCI_RDIRE_OFFSET                       17
7050 +#define MCI_RDIRE_SIZE                         1
7051 +#define MCI_RCRCE_OFFSET                       18
7052 +#define MCI_RCRCE_SIZE                         1
7053 +#define MCI_RENDE_OFFSET                       19
7054 +#define MCI_RENDE_SIZE                         1
7055 +#define MCI_RTOE_OFFSET                                20
7056 +#define MCI_RTOE_SIZE                          1
7057 +#define MCI_DCRCE_OFFSET                       21
7058 +#define MCI_DCRCE_SIZE                         1
7059 +#define MCI_DTOE_OFFSET                                22
7060 +#define MCI_DTOE_SIZE                          1
7061 +#define MCI_OVRE_OFFSET                                30
7062 +#define MCI_OVRE_SIZE                          1
7063 +#define MCI_UNRE_OFFSET                                31
7064 +#define MCI_UNRE_SIZE                          1
7065 +
7066 +/* Constants for DTOMUL */
7067 +#define MCI_DTOMUL_1_CYCLE                     0
7068 +#define MCI_DTOMUL_16_CYCLES                   1
7069 +#define MCI_DTOMUL_128_CYCLES                  2
7070 +#define MCI_DTOMUL_256_CYCLES                  3
7071 +#define MCI_DTOMUL_1024_CYCLES                 4
7072 +#define MCI_DTOMUL_4096_CYCLES                 5
7073 +#define MCI_DTOMUL_65536_CYCLES                        6
7074 +#define MCI_DTOMUL_1048576_CYCLES              7
7075 +
7076 +/* Constants for RSPTYP */
7077 +#define MCI_RSPTYP_NO_RESP                     0
7078 +#define MCI_RSPTYP_48_BIT                      1
7079 +#define MCI_RSPTYP_136_BIT                     2
7080 +
7081 +/* Constants for SPCMD */
7082 +#define MCI_SPCMD_NO_SPEC_CMD                  0
7083 +#define MCI_SPCMD_INIT_CMD                     1
7084 +#define MCI_SPCMD_SYNC_CMD                     2
7085 +#define MCI_SPCMD_INT_CMD                      4
7086 +#define MCI_SPCMD_INT_RESP                     5
7087 +
7088 +/* Constants for TRCMD */
7089 +#define MCI_TRCMD_NO_TRANS                     0
7090 +#define MCI_TRCMD_START_TRANS                  1
7091 +#define MCI_TRCMD_STOP_TRANS                   2
7092 +
7093 +/* Constants for TRTYP */
7094 +#define MCI_TRTYP_BLOCK                                0
7095 +#define MCI_TRTYP_MULTI_BLOCK                  1
7096 +#define MCI_TRTYP_STREAM                       2
7097 +
7098 +/* Bit manipulation macros */
7099 +#define MCI_BIT(name)                                  \
7100 +       (1 << MCI_##name##_OFFSET)
7101 +#define MCI_BF(name,value)                             \
7102 +       (((value) & ((1 << MCI_##name##_SIZE) - 1))     \
7103 +        << MCI_##name##_OFFSET)
7104 +#define MCI_BFEXT(name,value)                          \
7105 +       (((value) >> MCI_##name##_OFFSET)               \
7106 +        & ((1 << MCI_##name##_SIZE) - 1))
7107 +#define MCI_BFINS(name,value,old)                      \
7108 +       (((old) & ~(((1 << MCI_##name##_SIZE) - 1)      \
7109 +                   << MCI_##name##_OFFSET))            \
7110 +        | MCI_BF(name,value))
7111 +
7112 +/* Register access macros */
7113 +#define mci_readl(port,reg)                            \
7114 +       __raw_readl((port)->regs + MCI_##reg)
7115 +#define mci_writel(port,reg,value)                     \
7116 +       __raw_writel((value), (port)->regs + MCI_##reg)
7117 +
7118 +#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
7119 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/mmc/Kconfig avr32-git/drivers/mmc/Kconfig
7120 --- linux-2.6.21.3/drivers/mmc/Kconfig  2007-05-24 23:22:47.000000000 +0200
7121 +++ avr32-git/drivers/mmc/Kconfig       2007-06-06 11:33:56.000000000 +0200
7122 @@ -71,6 +71,16 @@
7123
7124           If unsure, say N.
7125
7126 +config MMC_ATMELMCI
7127 +       tristate "Atmel Multimedia Card Interface support"
7128 +       depends on AVR32 && MMC
7129 +       help
7130 +         This selects the Atmel Multimedia Card Interface. If you have
7131 +         a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
7132 +         slot, say Y or M here.
7133 +
7134 +         If unsure, say N.
7135 +
7136  config MMC_WBSD
7137         tristate "Winbond W83L51xD SD/MMC Card Interface support"
7138         depends on MMC && ISA_DMA_API
7139 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/mmc/Makefile avr32-git/drivers/mmc/Makefile
7140 --- linux-2.6.21.3/drivers/mmc/Makefile 2007-05-24 23:22:47.000000000 +0200
7141 +++ avr32-git/drivers/mmc/Makefile      2007-06-06 11:33:56.000000000 +0200
7142 @@ -23,6 +23,7 @@
7143  obj-$(CONFIG_MMC_AU1X)         += au1xmmc.o
7144  obj-$(CONFIG_MMC_OMAP)         += omap.o
7145  obj-$(CONFIG_MMC_AT91)         += at91_mci.o
7146 +obj-$(CONFIG_MMC_ATMELMCI)     += atmel-mci.o
7147  obj-$(CONFIG_MMC_TIFM_SD)      += tifm_sd.o
7148
7149  mmc_core-y := mmc.o mmc_sysfs.o
7150 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/mtd/chips/cfi_cmdset_0001.c avr32-git/drivers/mtd/chips/cfi_cmdset_0001.c
7151 --- linux-2.6.21.3/drivers/mtd/chips/cfi_cmdset_0001.c  2007-05-24 23:22:47.000000000 +0200
7152 +++ avr32-git/drivers/mtd/chips/cfi_cmdset_0001.c       2007-06-06 11:33:56.000000000 +0200
7153 @@ -47,6 +47,7 @@
7154  #define I82802AC       0x00ac
7155  #define MANUFACTURER_ST         0x0020
7156  #define M50LPW080       0x002F
7157 +#define AT49BV640D     0x02de
7158
7159  static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
7160  static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
7161 @@ -153,6 +154,47 @@
7162  }
7163  #endif
7164
7165 +/* Atmel chips don't use the same PRI format as Intel chips */
7166 +static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
7167 +{
7168 +       struct map_info *map = mtd->priv;
7169 +       struct cfi_private *cfi = map->fldrv_priv;
7170 +       struct cfi_pri_intelext *extp = cfi->cmdset_priv;
7171 +       struct cfi_pri_atmel atmel_pri;
7172 +       uint32_t features = 0;
7173 +
7174 +       /* Reverse byteswapping */
7175 +       extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
7176 +       extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
7177 +       extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
7178 +
7179 +       memcpy(&atmel_pri, extp, sizeof(atmel_pri));
7180 +       memset((char *)extp + 5, 0, sizeof(*extp) - 5);
7181 +
7182 +       printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
7183 +
7184 +       if (atmel_pri.Features & 0x01) /* chip erase supported */
7185 +               features |= (1<<0);
7186 +       if (atmel_pri.Features & 0x02) /* erase suspend supported */
7187 +               features |= (1<<1);
7188 +       if (atmel_pri.Features & 0x04) /* program suspend supported */
7189 +               features |= (1<<2);
7190 +       if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
7191 +               features |= (1<<9);
7192 +       if (atmel_pri.Features & 0x20) /* page mode read supported */
7193 +               features |= (1<<7);
7194 +       if (atmel_pri.Features & 0x40) /* queued erase supported */
7195 +               features |= (1<<4);
7196 +       if (atmel_pri.Features & 0x80) /* Protection bits supported */
7197 +               features |= (1<<6);
7198 +
7199 +       extp->FeatureSupport = features;
7200 +
7201 +       /* burst write mode not supported */
7202 +       cfi->cfiq->BufWriteTimeoutTyp = 0;
7203 +       cfi->cfiq->BufWriteTimeoutMax = 0;
7204 +}
7205 +
7206  #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
7207  /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
7208  static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
7209 @@ -221,6 +263,7 @@
7210  }
7211
7212  static struct cfi_fixup cfi_fixup_table[] = {
7213 +       { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
7214  #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
7215         { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
7216  #endif
7217 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/mtd/chips/cfi_cmdset_0002.c avr32-git/drivers/mtd/chips/cfi_cmdset_0002.c
7218 --- linux-2.6.21.3/drivers/mtd/chips/cfi_cmdset_0002.c  2007-05-24 23:22:47.000000000 +0200
7219 +++ avr32-git/drivers/mtd/chips/cfi_cmdset_0002.c       2007-06-06 11:33:56.000000000 +0200
7220 @@ -185,6 +185,10 @@
7221                 extp->TopBottom = 2;
7222         else
7223                 extp->TopBottom = 3;
7224 +
7225 +       /* burst write mode not supported */
7226 +       cfi->cfiq->BufWriteTimeoutTyp = 0;
7227 +       cfi->cfiq->BufWriteTimeoutMax = 0;
7228  }
7229
7230  static void fixup_use_secsi(struct mtd_info *mtd, void *param)
7231 @@ -217,6 +221,7 @@
7232  }
7233
7234  static struct cfi_fixup cfi_fixup_table[] = {
7235 +       { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
7236  #ifdef AMD_BOOTLOC_BUG
7237         { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
7238  #endif
7239 @@ -229,7 +234,6 @@
7240  #if !FORCE_WORD_WRITE
7241         { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
7242  #endif
7243 -       { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
7244         { 0, 0, NULL, NULL }
7245  };
7246  static struct cfi_fixup jedec_fixup_table[] = {
7247 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/serial/atmel_serial.c avr32-git/drivers/serial/atmel_serial.c
7248 --- linux-2.6.21.3/drivers/serial/atmel_serial.c        2007-05-24 23:22:47.000000000 +0200
7249 +++ avr32-git/drivers/serial/atmel_serial.c     2007-06-06 11:33:59.000000000 +0200
7250 @@ -114,6 +114,7 @@
7251         struct uart_port        uart;           /* uart */
7252         struct clk              *clk;           /* uart clock */
7253         unsigned short          suspended;      /* is port suspended? */
7254 +       int                     break_active;   /* break being received */
7255  };
7256
7257  static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
7258 @@ -252,6 +253,7 @@
7259   */
7260  static void atmel_rx_chars(struct uart_port *port)
7261  {
7262 +       struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
7263         struct tty_struct *tty = port->info->tty;
7264         unsigned int status, ch, flg;
7265
7266 @@ -267,13 +269,29 @@
7267                  * note that the error handling code is
7268                  * out of the main execution path
7269                  */
7270 -               if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
7271 +               if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
7272 +                                      | ATMEL_US_OVRE | ATMEL_US_RXBRK)
7273 +                            || atmel_port->break_active)) {
7274                         UART_PUT_CR(port, ATMEL_US_RSTSTA);     /* clear error */
7275 -                       if (status & ATMEL_US_RXBRK) {
7276 +                       if (status & ATMEL_US_RXBRK
7277 +                           && !atmel_port->break_active) {
7278                                 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);    /* ignore side-effect */
7279                                 port->icount.brk++;
7280 +                               atmel_port->break_active = 1;
7281 +                               UART_PUT_IER(port, ATMEL_US_RXBRK);
7282                                 if (uart_handle_break(port))
7283                                         goto ignore_char;
7284 +                       } else {
7285 +                               /*
7286 +                                * This is either the end-of-break
7287 +                                * condition or we've received at
7288 +                                * least one character without RXBRK
7289 +                                * being set. In both cases, the next
7290 +                                * RXBRK will indicate start-of-break.
7291 +                                */
7292 +                               UART_PUT_IDR(port, ATMEL_US_RXBRK);
7293 +                               status &= ~ATMEL_US_RXBRK;
7294 +                               atmel_port->break_active = 0;
7295                         }
7296                         if (status & ATMEL_US_PARE)
7297                                 port->icount.parity++;
7298 @@ -352,6 +370,16 @@
7299                 /* Interrupt receive */
7300                 if (pending & ATMEL_US_RXRDY)
7301                         atmel_rx_chars(port);
7302 +               else if (pending & ATMEL_US_RXBRK) {
7303 +                       /*
7304 +                        * End of break detected. If it came along
7305 +                        * with a character, atmel_rx_chars will
7306 +                        * handle it.
7307 +                        */
7308 +                       UART_PUT_CR(port, ATMEL_US_RSTSTA);
7309 +                       UART_PUT_IDR(port, ATMEL_US_RXBRK);
7310 +                       atmel_port->break_active = 0;
7311 +               }
7312
7313                 // TODO: All reads to CSR will clear these interrupts!
7314                 if (pending & ATMEL_US_RIIC) port->icount.rng++;
7315 @@ -484,11 +512,16 @@
7316         unsigned long flags;
7317         unsigned int mode, imr, quot, baud;
7318
7319 +       /* Get current mode register */
7320 +       mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
7321 +
7322         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
7323         quot = uart_get_divisor(port, baud);
7324
7325 -       /* Get current mode register */
7326 -       mode = UART_GET_MR(port) & ~(ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
7327 +       if (quot > 65535) {             /* BRGR is 16-bit, so switch to slower clock */
7328 +               quot /= 8;
7329 +               mode |= ATMEL_US_USCLKS_MCK_DIV8;
7330 +       }
7331
7332         /* byte size */
7333         switch (termios->c_cflag & CSIZE) {
7334 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/serial/atmel_serial.h avr32-git/drivers/serial/atmel_serial.h
7335 --- linux-2.6.21.3/drivers/serial/atmel_serial.h        2007-05-24 23:22:47.000000000 +0200
7336 +++ avr32-git/drivers/serial/atmel_serial.h     2007-06-06 11:33:59.000000000 +0200
7337 @@ -46,6 +46,9 @@
7338  #define                        ATMEL_US_USMODE_ISO7816_T1      6
7339  #define                        ATMEL_US_USMODE_IRDA            8
7340  #define                ATMEL_US_USCLKS         (3   <<  4)             /* Clock Selection */
7341 +#define                        ATMEL_US_USCLKS_MCK             (0 <<  4)
7342 +#define                        ATMEL_US_USCLKS_MCK_DIV8        (1 <<  4)
7343 +#define                        ATMEL_US_USCLKS_SCK             (3 <<  4)
7344  #define                ATMEL_US_CHRL           (3   <<  6)             /* Character Length */
7345  #define                        ATMEL_US_CHRL_5                 (0 <<  6)
7346  #define                        ATMEL_US_CHRL_6                 (1 <<  6)
7347 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/spi/atmel_spi.c avr32-git/drivers/spi/atmel_spi.c
7348 --- linux-2.6.21.3/drivers/spi/atmel_spi.c      2007-05-24 23:22:47.000000000 +0200
7349 +++ avr32-git/drivers/spi/atmel_spi.c   2007-06-06 11:33:59.000000000 +0200
7350 @@ -22,10 +22,7 @@
7351  #include <asm/io.h>
7352  #include <asm/arch/board.h>
7353  #include <asm/arch/gpio.h>
7354 -
7355 -#ifdef CONFIG_ARCH_AT91
7356  #include <asm/arch/cpu.h>
7357 -#endif
7358
7359  #include "atmel_spi.h"
7360
7361 @@ -116,16 +113,16 @@
7362
7363         len = as->remaining_bytes;
7364
7365 -       tx_dma = xfer->tx_dma;
7366 -       rx_dma = xfer->rx_dma;
7367 +       tx_dma = xfer->tx_dma + xfer->len - len;
7368 +       rx_dma = xfer->rx_dma + xfer->len - len;
7369
7370         /* use scratch buffer only when rx or tx data is unspecified */
7371 -       if (rx_dma == INVALID_DMA_ADDRESS) {
7372 +       if (!xfer->rx_buf) {
7373                 rx_dma = as->buffer_dma;
7374                 if (len > BUFFER_SIZE)
7375                         len = BUFFER_SIZE;
7376         }
7377 -       if (tx_dma == INVALID_DMA_ADDRESS) {
7378 +       if (!xfer->tx_buf) {
7379                 tx_dma = as->buffer_dma;
7380                 if (len > BUFFER_SIZE)
7381                         len = BUFFER_SIZE;
7382 @@ -415,8 +412,8 @@
7383                 csr |= SPI_BIT(NCPHA);
7384
7385         /* TODO: DLYBS and DLYBCT */
7386 -       csr |= SPI_BF(DLYBS, 10);
7387 -       csr |= SPI_BF(DLYBCT, 10);
7388 +       csr |= SPI_BF(DLYBS, 0);
7389 +       csr |= SPI_BF(DLYBCT, 0);
7390
7391         /* chipselect must have been muxed as GPIO (e.g. in board setup) */
7392         npcs_pin = (unsigned int)spi->controller_data;
7393 @@ -552,10 +549,8 @@
7394                 goto out_free_buffer;
7395         as->irq = irq;
7396         as->clk = clk;
7397 -#ifdef CONFIG_ARCH_AT91
7398         if (!cpu_is_at91rm9200())
7399                 as->new_1 = 1;
7400 -#endif
7401
7402         ret = request_irq(irq, atmel_spi_interrupt, 0,
7403                         pdev->dev.bus_id, master);
7404 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/atmel_lcdfb.c avr32-git/drivers/video/atmel_lcdfb.c
7405 --- linux-2.6.21.3/drivers/video/atmel_lcdfb.c  1970-01-01 01:00:00.000000000 +0100
7406 +++ avr32-git/drivers/video/atmel_lcdfb.c       2007-06-06 11:34:00.000000000 +0200
7407 @@ -0,0 +1,752 @@
7408 +/*
7409 + *  Driver for AT91/AT32 LCD Controller
7410 + *
7411 + *  Copyright (C) 2007 Atmel Corporation
7412 + *
7413 + * This file is subject to the terms and conditions of the GNU General Public
7414 + * License.  See the file COPYING in the main directory of this archive for
7415 + * more details.
7416 + */
7417 +
7418 +#include <linux/kernel.h>
7419 +#include <linux/platform_device.h>
7420 +#include <linux/dma-mapping.h>
7421 +#include <linux/interrupt.h>
7422 +#include <linux/clk.h>
7423 +#include <linux/fb.h>
7424 +#include <linux/init.h>
7425 +#include <linux/delay.h>
7426 +
7427 +#include <asm/arch/board.h>
7428 +#include <asm/arch/cpu.h>
7429 +#include <asm/arch/gpio.h>
7430 +
7431 +#include <video/atmel_lcdc.h>
7432 +
7433 +#define lcdc_readl(sinfo, reg)         __raw_readl((sinfo)->mmio+(reg))
7434 +#define lcdc_writel(sinfo, reg, val)   __raw_writel((val), (sinfo)->mmio+(reg))
7435 +
7436 +/* configurable parameters */
7437 +#define ATMEL_LCDC_CVAL_DEFAULT                0xc8
7438 +#define ATMEL_LCDC_DMA_BURST_LEN       8
7439 +
7440 +#if defined(CONFIG_ARCH_AT91SAM9263)
7441 +#define ATMEL_LCDC_FIFO_SIZE           2048
7442 +#else
7443 +#define ATMEL_LCDC_FIFO_SIZE           512
7444 +#endif
7445 +
7446 +#if defined(CONFIG_ARCH_AT91)
7447 +#define        ATMEL_LCDFB_FBINFO_DEFAULT      FBINFO_DEFAULT
7448 +
7449 +static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
7450 +                                       struct fb_var_screeninfo *var)
7451 +{
7452 +
7453 +}
7454 +#elif defined(CONFIG_AVR32)
7455 +#define        ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
7456 +                                       | FBINFO_PARTIAL_PAN_OK \
7457 +                                       | FBINFO_HWACCEL_XPAN \
7458 +                                       | FBINFO_HWACCEL_YPAN)
7459 +
7460 +static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
7461 +                                    struct fb_var_screeninfo *var)
7462 +{
7463 +       u32 dma2dcfg;
7464 +       u32 pixeloff;
7465 +
7466 +       pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
7467 +
7468 +       dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
7469 +       dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
7470 +       lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
7471 +
7472 +       /* Update configuration */
7473 +       lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
7474 +                   lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
7475 +                   | ATMEL_LCDC_DMAUPDT);
7476 +}
7477 +#endif
7478 +
7479 +
7480 +static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
7481 +       .type           = FB_TYPE_PACKED_PIXELS,
7482 +       .visual         = FB_VISUAL_TRUECOLOR,
7483 +       .xpanstep       = 0,
7484 +       .ypanstep       = 0,
7485 +       .ywrapstep      = 0,
7486 +       .accel          = FB_ACCEL_NONE,
7487 +};
7488 +
7489 +
7490 +static void atmel_lcdfb_update_dma(struct fb_info *info,
7491 +                              struct fb_var_screeninfo *var)
7492 +{
7493 +       struct atmel_lcdfb_info *sinfo = info->par;
7494 +       struct fb_fix_screeninfo *fix = &info->fix;
7495 +       unsigned long dma_addr;
7496 +
7497 +       dma_addr = (fix->smem_start + var->yoffset * fix->line_length
7498 +                   + var->xoffset * var->bits_per_pixel / 8);
7499 +
7500 +       dma_addr &= ~3UL;
7501 +
7502 +       /* Set framebuffer DMA base address and pixel offset */
7503 +       lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
7504 +
7505 +       atmel_lcdfb_update_dma2d(sinfo, var);
7506 +}
7507 +
7508 +static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
7509 +{
7510 +       struct fb_info *info = sinfo->info;
7511 +
7512 +       dma_free_writecombine(info->device, info->fix.smem_len,
7513 +                               info->screen_base, info->fix.smem_start);
7514 +}
7515 +
7516 +/**
7517 + *     atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
7518 + *     @sinfo: the frame buffer to allocate memory for
7519 + */
7520 +static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
7521 +{
7522 +       struct fb_info *info = sinfo->info;
7523 +       struct fb_var_screeninfo *var = &info->var;
7524 +
7525 +       info->fix.smem_len = (var->xres_virtual * var->yres_virtual
7526 +                           * ((var->bits_per_pixel + 7) / 8));
7527 +
7528 +       info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
7529 +                                       (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
7530 +
7531 +       if (!info->screen_base) {
7532 +               return -ENOMEM;
7533 +       }
7534 +
7535 +       return 0;
7536 +}
7537 +
7538 +/**
7539 + *      atmel_lcdfb_check_var - Validates a var passed in.
7540 + *      @var: frame buffer variable screen structure
7541 + *      @info: frame buffer structure that represents a single frame buffer
7542 + *
7543 + *     Checks to see if the hardware supports the state requested by
7544 + *     var passed in. This function does not alter the hardware
7545 + *     state!!!  This means the data stored in struct fb_info and
7546 + *     struct atmel_lcdfb_info do not change. This includes the var
7547 + *     inside of struct fb_info.  Do NOT change these. This function
7548 + *     can be called on its own if we intent to only test a mode and
7549 + *     not actually set it. The stuff in modedb.c is a example of
7550 + *     this. If the var passed in is slightly off by what the
7551 + *     hardware can support then we alter the var PASSED in to what
7552 + *     we can do. If the hardware doesn't support mode change a
7553 + *     -EINVAL will be returned by the upper layers. You don't need
7554 + *     to implement this function then. If you hardware doesn't
7555 + *     support changing the resolution then this function is not
7556 + *     needed. In this case the driver would just provide a var that
7557 + *     represents the static state the screen is in.
7558 + *
7559 + *     Returns negative errno on error, or zero on success.
7560 + */
7561 +static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
7562 +                            struct fb_info *info)
7563 +{
7564 +       struct device *dev = info->device;
7565 +       struct atmel_lcdfb_info *sinfo = info->par;
7566 +       unsigned long clk_value_khz;
7567 +
7568 +       clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
7569 +
7570 +       dev_dbg(dev, "%s:\n", __func__);
7571 +       dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
7572 +       dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
7573 +       dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
7574 +       dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
7575 +
7576 +       if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
7577 +               dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
7578 +               return -EINVAL;
7579 +       }
7580 +
7581 +       /* Force same alignment for each line */
7582 +       var->xres = (var->xres + 3) & ~3UL;
7583 +       var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
7584 +
7585 +       var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
7586 +       var->transp.msb_right = 0;
7587 +       var->transp.offset = var->transp.length = 0;
7588 +       var->xoffset = var->yoffset = 0;
7589 +
7590 +       switch (var->bits_per_pixel) {
7591 +       case 2:
7592 +       case 4:
7593 +       case 8:
7594 +               var->red.offset = var->green.offset = var->blue.offset = 0;
7595 +               var->red.length = var->green.length = var->blue.length
7596 +                       = var->bits_per_pixel;
7597 +               break;
7598 +       case 15:
7599 +       case 16:
7600 +               var->red.offset = 0;
7601 +               var->green.offset = 5;
7602 +               var->blue.offset = 10;
7603 +               var->red.length = var->green.length = var->blue.length = 5;
7604 +               break;
7605 +       case 24:
7606 +       case 32:
7607 +               var->red.offset = 0;
7608 +               var->green.offset = 8;
7609 +               var->blue.offset = 16;
7610 +               var->red.length = var->green.length = var->blue.length = 8;
7611 +               break;
7612 +       default:
7613 +               dev_err(dev, "color depth %d not supported\n",
7614 +                                       var->bits_per_pixel);
7615 +               return -EINVAL;
7616 +       }
7617 +
7618 +       return 0;
7619 +}
7620 +
7621 +/**
7622 + *      atmel_lcdfb_set_par - Alters the hardware state.
7623 + *      @info: frame buffer structure that represents a single frame buffer
7624 + *
7625 + *     Using the fb_var_screeninfo in fb_info we set the resolution
7626 + *     of the this particular framebuffer. This function alters the
7627 + *     par AND the fb_fix_screeninfo stored in fb_info. It doesn't
7628 + *     not alter var in fb_info since we are using that data. This
7629 + *     means we depend on the data in var inside fb_info to be
7630 + *     supported by the hardware.  atmel_lcdfb_check_var is always called
7631 + *     before atmel_lcdfb_set_par to ensure this.  Again if you can't
7632 + *     change the resolution you don't need this function.
7633 + *
7634 + */
7635 +static int atmel_lcdfb_set_par(struct fb_info *info)
7636 +{
7637 +       struct atmel_lcdfb_info *sinfo = info->par;
7638 +       unsigned long value;
7639 +       unsigned long clk_value_khz;
7640 +
7641 +       dev_dbg(info->device, "%s:\n", __func__);
7642 +       dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
7643 +                info->var.xres, info->var.yres,
7644 +                info->var.xres_virtual, info->var.yres_virtual);
7645 +
7646 +       /* Turn off the LCD controller and the DMA controller */
7647 +       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
7648 +
7649 +       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
7650 +
7651 +       if (info->var.bits_per_pixel <= 8)
7652 +               info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
7653 +       else
7654 +               info->fix.visual = FB_VISUAL_TRUECOLOR;
7655 +
7656 +       info->fix.line_length = info->var.xres_virtual * (info->var.bits_per_pixel / 8);
7657 +
7658 +       /* Re-initialize the DMA engine... */
7659 +       dev_dbg(info->device, "  * update DMA engine\n");
7660 +       atmel_lcdfb_update_dma(info, &info->var);
7661 +
7662 +       /* ...set frame size and burst length = 8 words (?) */
7663 +       value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
7664 +       value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
7665 +       lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
7666 +
7667 +       /* Now, the LCDC core... */
7668 +
7669 +       /* Set pixel clock */
7670 +       clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
7671 +
7672 +       value = clk_value_khz / PICOS2KHZ(info->var.pixclock);
7673 +
7674 +       if (clk_value_khz % PICOS2KHZ(info->var.pixclock))
7675 +               value++;
7676 +
7677 +       value = (value / 2) - 1;
7678 +
7679 +       if (value <= 0) {
7680 +               dev_notice(info->device, "Bypassing pixel clock divider\n");
7681 +               lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
7682 +       } else
7683 +               lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
7684 +
7685 +       /* Initialize control register 2 */
7686 +       value = sinfo->default_lcdcon2;
7687 +
7688 +       if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
7689 +               value |= ATMEL_LCDC_INVLINE_INVERTED;
7690 +       if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
7691 +               value |= ATMEL_LCDC_INVFRAME_INVERTED;
7692 +
7693 +       switch (info->var.bits_per_pixel) {
7694 +               case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
7695 +               case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
7696 +               case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
7697 +               case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
7698 +               case 15: /* fall through */
7699 +               case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
7700 +               case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
7701 +               case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
7702 +               default: BUG(); break;
7703 +       }
7704 +       dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
7705 +       lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
7706 +
7707 +       /* Vertical timing */
7708 +       value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
7709 +       value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
7710 +       value |= info->var.lower_margin;
7711 +       dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
7712 +       lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
7713 +
7714 +       /* Horizontal timing */
7715 +       value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
7716 +       value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
7717 +       value |= (info->var.left_margin - 1);
7718 +       dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
7719 +       lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
7720 +
7721 +       /* Display size */
7722 +       value = (info->var.xres - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
7723 +       value |= info->var.yres - 1;
7724 +       lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
7725 +
7726 +       /* FIFO Threshold: Use formula from data sheet */
7727 +       value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
7728 +       lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
7729 +
7730 +       /* Toggle LCD_MODE every frame */
7731 +       lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
7732 +
7733 +       /* Disable all interrupts */
7734 +       lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
7735 +
7736 +       /* Set contrast */
7737 +       value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE;
7738 +       lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value);
7739 +       lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
7740 +       /* ...wait for DMA engine to become idle... */
7741 +       while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
7742 +               msleep(10);
7743 +
7744 +       dev_dbg(info->device, "  * re-enable DMA engine\n");
7745 +       /* ...and enable it with updated configuration */
7746 +       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
7747 +
7748 +       dev_dbg(info->device, "  * re-enable LCDC core\n");
7749 +       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
7750 +               (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
7751 +
7752 +       dev_dbg(info->device, "  * DONE\n");
7753 +
7754 +       return 0;
7755 +}
7756 +
7757 +static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
7758 +{
7759 +       chan &= 0xffff;
7760 +       chan >>= 16 - bf->length;
7761 +       return chan << bf->offset;
7762 +}
7763 +
7764 +/**
7765 + *     atmel_lcdfb_setcolreg - Optional function. Sets a color register.
7766 + *      @regno: Which register in the CLUT we are programming
7767 + *      @red: The red value which can be up to 16 bits wide
7768 + *     @green: The green value which can be up to 16 bits wide
7769 + *     @blue:  The blue value which can be up to 16 bits wide.
7770 + *     @transp: If supported the alpha value which can be up to 16 bits wide.
7771 + *      @info: frame buffer info structure
7772 + *
7773 + *     Set a single color register. The values supplied have a 16 bit
7774 + *     magnitude which needs to be scaled in this function for the hardware.
7775 + *     Things to take into consideration are how many color registers, if
7776 + *     any, are supported with the current color visual. With truecolor mode
7777 + *     no color palettes are supported. Here a psuedo palette is created
7778 + *     which we store the value in pseudo_palette in struct fb_info. For
7779 + *     pseudocolor mode we have a limited color palette. To deal with this
7780 + *     we can program what color is displayed for a particular pixel value.
7781 + *     DirectColor is similar in that we can program each color field. If
7782 + *     we have a static colormap we don't need to implement this function.
7783 + *
7784 + *     Returns negative errno on error, or zero on success. In an
7785 + *     ideal world, this would have been the case, but as it turns
7786 + *     out, the other drivers return 1 on failure, so that's what
7787 + *     we're going to do.
7788 + */
7789 +static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
7790 +                            unsigned int green, unsigned int blue,
7791 +                            unsigned int transp, struct fb_info *info)
7792 +{
7793 +       struct atmel_lcdfb_info *sinfo = info->par;
7794 +       unsigned int val;
7795 +       u32 *pal;
7796 +       int ret = 1;
7797 +
7798 +       if (info->var.grayscale)
7799 +               red = green = blue = (19595 * red + 38470 * green
7800 +                                     + 7471 * blue) >> 16;
7801 +
7802 +       switch (info->fix.visual) {
7803 +       case FB_VISUAL_TRUECOLOR:
7804 +               if (regno < 16) {
7805 +                       pal = info->pseudo_palette;
7806 +
7807 +                       val  = chan_to_field(red, &info->var.red);
7808 +                       val |= chan_to_field(green, &info->var.green);
7809 +                       val |= chan_to_field(blue, &info->var.blue);
7810 +
7811 +                       pal[regno] = val;
7812 +                       ret = 0;
7813 +               }
7814 +               break;
7815 +
7816 +       case FB_VISUAL_PSEUDOCOLOR:
7817 +               if (regno < 256) {
7818 +                       val  = ((red   >> 11) & 0x001f);
7819 +                       val |= ((green >>  6) & 0x03e0);
7820 +                       val |= ((blue  >>  1) & 0x7c00);
7821 +
7822 +                       /*
7823 +                        * TODO: intensity bit. Maybe something like
7824 +                        *   ~(red[10] ^ green[10] ^ blue[10]) & 1
7825 +                        */
7826 +
7827 +                       lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
7828 +                       ret = 0;
7829 +               }
7830 +               break;
7831 +       }
7832 +
7833 +       return ret;
7834 +}
7835 +
7836 +static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
7837 +                              struct fb_info *info)
7838 +{
7839 +       dev_dbg(info->device, "%s\n", __func__);
7840 +
7841 +       atmel_lcdfb_update_dma(info, var);
7842 +
7843 +       return 0;
7844 +}
7845 +
7846 +static struct fb_ops atmel_lcdfb_ops = {
7847 +       .owner          = THIS_MODULE,
7848 +       .fb_check_var   = atmel_lcdfb_check_var,
7849 +       .fb_set_par     = atmel_lcdfb_set_par,
7850 +       .fb_setcolreg   = atmel_lcdfb_setcolreg,
7851 +       .fb_pan_display = atmel_lcdfb_pan_display,
7852 +       .fb_fillrect    = cfb_fillrect,
7853 +       .fb_copyarea    = cfb_copyarea,
7854 +       .fb_imageblit   = cfb_imageblit,
7855 +};
7856 +
7857 +static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
7858 +{
7859 +       struct fb_info *info = dev_id;
7860 +       struct atmel_lcdfb_info *sinfo = info->par;
7861 +       u32 status;
7862 +
7863 +       status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
7864 +       lcdc_writel(sinfo, ATMEL_LCDC_IDR, status);
7865 +       return IRQ_HANDLED;
7866 +}
7867 +
7868 +static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
7869 +{
7870 +       struct fb_info *info = sinfo->info;
7871 +       int ret = 0;
7872 +
7873 +       memset_io(info->screen_base, 0, info->fix.smem_len);
7874 +       info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
7875 +
7876 +       dev_info(info->device,
7877 +              "%luKiB frame buffer at %08lx (mapped at %p)\n",
7878 +              (unsigned long)info->fix.smem_len / 1024,
7879 +              (unsigned long)info->fix.smem_start,
7880 +              info->screen_base);
7881 +
7882 +       /* Allocate colormap */
7883 +       ret = fb_alloc_cmap(&info->cmap, 256, 0);
7884 +       if (ret < 0)
7885 +               dev_err(info->device, "Alloc color map failed\n");
7886 +
7887 +       return ret;
7888 +}
7889 +
7890 +static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
7891 +{
7892 +       if (sinfo->bus_clk)
7893 +               clk_enable(sinfo->bus_clk);
7894 +       clk_enable(sinfo->lcdc_clk);
7895 +}
7896 +
7897 +static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
7898 +{
7899 +       if (sinfo->bus_clk)
7900 +               clk_disable(sinfo->bus_clk);
7901 +       clk_disable(sinfo->lcdc_clk);
7902 +}
7903 +
7904 +
7905 +static int __init atmel_lcdfb_probe(struct platform_device *pdev)
7906 +{
7907 +       struct device *dev = &pdev->dev;
7908 +       struct fb_info *info;
7909 +       struct atmel_lcdfb_info *sinfo;
7910 +       struct atmel_lcdfb_info *pdata_sinfo;
7911 +       struct resource *regs = NULL;
7912 +       struct resource *map = NULL;
7913 +       int ret;
7914 +
7915 +       dev_dbg(dev, "%s BEGIN\n", __func__);
7916 +
7917 +       ret = -ENOMEM;
7918 +       info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
7919 +       if (!info) {
7920 +               dev_err(dev, "cannot allocate memory\n");
7921 +               goto out;
7922 +       }
7923 +
7924 +       sinfo = info->par;
7925 +
7926 +       if (dev->platform_data) {
7927 +               pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
7928 +               sinfo->default_bpp = pdata_sinfo->default_bpp;
7929 +               sinfo->default_dmacon = pdata_sinfo->default_dmacon;
7930 +               sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
7931 +               sinfo->default_monspecs = pdata_sinfo->default_monspecs;
7932 +               sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
7933 +               sinfo->guard_time = pdata_sinfo->guard_time;
7934 +       } else {
7935 +               dev_err(dev, "cannot get default configuration\n");
7936 +               goto free_info;
7937 +       }
7938 +       sinfo->info = info;
7939 +       sinfo->pdev = pdev;
7940 +
7941 +       strcpy(info->fix.id, sinfo->pdev->name);
7942 +       info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
7943 +       info->pseudo_palette = sinfo->pseudo_palette;
7944 +       info->fbops = &atmel_lcdfb_ops;
7945 +
7946 +       memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
7947 +       info->fix = atmel_lcdfb_fix;
7948 +
7949 +       /* Enable LCDC Clocks */
7950 +       if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
7951 +               sinfo->bus_clk = clk_get(dev, "hck1");
7952 +               if (IS_ERR(sinfo->bus_clk)) {
7953 +                       ret = PTR_ERR(sinfo->bus_clk);
7954 +                       goto free_info;
7955 +               }
7956 +       }
7957 +       sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
7958 +       if (IS_ERR(sinfo->lcdc_clk)) {
7959 +               ret = PTR_ERR(sinfo->lcdc_clk);
7960 +               goto put_bus_clk;
7961 +       }
7962 +       atmel_lcdfb_start_clock(sinfo);
7963 +
7964 +       ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
7965 +                       info->monspecs.modedb_len, info->monspecs.modedb,
7966 +                       sinfo->default_bpp);
7967 +       if (!ret) {
7968 +               dev_err(dev, "no suitable video mode found\n");
7969 +               goto stop_clk;
7970 +       }
7971 +
7972 +
7973 +       regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
7974 +       if (!regs) {
7975 +               dev_err(dev, "resources unusable\n");
7976 +               ret = -ENXIO;
7977 +               goto stop_clk;
7978 +       }
7979 +
7980 +       sinfo->irq_base = platform_get_irq(pdev, 0);
7981 +       if (sinfo->irq_base < 0) {
7982 +               dev_err(dev, "unable to get irq\n");
7983 +               ret = sinfo->irq_base;
7984 +               goto stop_clk;
7985 +       }
7986 +
7987 +       /* Initialize video memory */
7988 +       map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
7989 +       if (map) {
7990 +               /* use a pre-allocated memory buffer */
7991 +               info->fix.smem_start = map->start;
7992 +               info->fix.smem_len = map->end - map->start + 1;
7993 +               if (!request_mem_region(info->fix.smem_start,
7994 +                                       info->fix.smem_len, pdev->name)) {
7995 +                       ret = -EBUSY;
7996 +                       goto stop_clk;
7997 +               }
7998 +
7999 +               info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
8000 +               if (!info->screen_base)
8001 +                       goto release_intmem;
8002 +       } else {
8003 +               /* alocate memory buffer */
8004 +               ret = atmel_lcdfb_alloc_video_memory(sinfo);
8005 +               if (ret < 0) {
8006 +                       dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
8007 +                       goto stop_clk;
8008 +               }
8009 +       }
8010 +
8011 +       /* LCDC registers */
8012 +       info->fix.mmio_start = regs->start;
8013 +       info->fix.mmio_len = regs->end - regs->start + 1;
8014 +
8015 +       if (!request_mem_region(info->fix.mmio_start,
8016 +                               info->fix.mmio_len, pdev->name)) {
8017 +               ret = -EBUSY;
8018 +               goto free_fb;
8019 +       }
8020 +
8021 +       sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
8022 +       if (!sinfo->mmio) {
8023 +               dev_err(dev, "cannot map LCDC registers\n");
8024 +               goto release_mem;
8025 +       }
8026 +
8027 +       /* interrupt */
8028 +       ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
8029 +       if (ret) {
8030 +               dev_err(dev, "request_irq failed: %d\n", ret);
8031 +               goto unmap_mmio;
8032 +       }
8033 +
8034 +       ret = atmel_lcdfb_init_fbinfo(sinfo);
8035 +       if (ret < 0) {
8036 +               dev_err(dev, "init fbinfo failed: %d\n", ret);
8037 +               goto unregister_irqs;
8038 +       }
8039 +
8040 +       /*
8041 +        * This makes sure that our colour bitfield
8042 +        * descriptors are correctly initialised.
8043 +        */
8044 +       atmel_lcdfb_check_var(&info->var, info);
8045 +
8046 +       ret = fb_set_var(info, &info->var);
8047 +       if (ret) {
8048 +               dev_warn(dev, "unable to set display parameters\n");
8049 +               goto free_cmap;
8050 +       }
8051 +
8052 +       dev_set_drvdata(dev, info);
8053 +
8054 +       /*
8055 +        * Tell the world that we're ready to go
8056 +        */
8057 +       ret = register_framebuffer(info);
8058 +       if (ret < 0) {
8059 +               dev_err(dev, "failed to register framebuffer device: %d\n", ret);
8060 +               goto free_cmap;
8061 +       }
8062 +
8063 +       /* Power up the LCDC screen */
8064 +       if (sinfo->atmel_lcdfb_power_control)
8065 +               sinfo->atmel_lcdfb_power_control(1);
8066 +
8067 +       dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
8068 +                      info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
8069 +
8070 +       return 0;
8071 +
8072 +
8073 +free_cmap:
8074 +       fb_dealloc_cmap(&info->cmap);
8075 +unregister_irqs:
8076 +       free_irq(sinfo->irq_base, info);
8077 +unmap_mmio:
8078 +       iounmap(sinfo->mmio);
8079 +release_mem:
8080 +       release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
8081 +free_fb:
8082 +       if (map)
8083 +               iounmap(info->screen_base);
8084 +       else
8085 +               atmel_lcdfb_free_video_memory(sinfo);
8086 +
8087 +release_intmem:
8088 +       if (map)
8089 +               release_mem_region(info->fix.smem_start, info->fix.smem_len);
8090 +stop_clk:
8091 +       atmel_lcdfb_stop_clock(sinfo);
8092 +       clk_put(sinfo->lcdc_clk);
8093 +put_bus_clk:
8094 +       if (sinfo->bus_clk)
8095 +               clk_put(sinfo->bus_clk);
8096 +free_info:
8097 +       framebuffer_release(info);
8098 +out:
8099 +       dev_dbg(dev, "%s FAILED\n", __func__);
8100 +       return ret;
8101 +}
8102 +
8103 +static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
8104 +{
8105 +       struct device *dev = &pdev->dev;
8106 +       struct fb_info *info = dev_get_drvdata(dev);
8107 +       struct atmel_lcdfb_info *sinfo = info->par;
8108 +
8109 +       if (!sinfo)
8110 +               return 0;
8111 +
8112 +       if (sinfo->atmel_lcdfb_power_control)
8113 +               sinfo->atmel_lcdfb_power_control(0);
8114 +       unregister_framebuffer(info);
8115 +       atmel_lcdfb_stop_clock(sinfo);
8116 +       clk_put(sinfo->lcdc_clk);
8117 +       if (sinfo->bus_clk)
8118 +               clk_put(sinfo->bus_clk);
8119 +       fb_dealloc_cmap(&info->cmap);
8120 +       free_irq(sinfo->irq_base, info);
8121 +       iounmap(sinfo->mmio);
8122 +       release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
8123 +       if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
8124 +               iounmap(info->screen_base);
8125 +               release_mem_region(info->fix.smem_start, info->fix.smem_len);
8126 +       } else {
8127 +               atmel_lcdfb_free_video_memory(sinfo);
8128 +       }
8129 +
8130 +       dev_set_drvdata(dev, NULL);
8131 +       framebuffer_release(info);
8132 +
8133 +       return 0;
8134 +}
8135 +
8136 +static struct platform_driver atmel_lcdfb_driver = {
8137 +       .remove         = __exit_p(atmel_lcdfb_remove),
8138 +       .driver         = {
8139 +               .name   = "atmel_lcdfb",
8140 +               .owner  = THIS_MODULE,
8141 +       },
8142 +};
8143 +
8144 +static int __init atmel_lcdfb_init(void)
8145 +{
8146 +       return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
8147 +}
8148 +
8149 +static void __exit atmel_lcdfb_exit(void)
8150 +{
8151 +       platform_driver_unregister(&atmel_lcdfb_driver);
8152 +}
8153 +
8154 +module_init(atmel_lcdfb_init);
8155 +module_exit(atmel_lcdfb_exit);
8156 +
8157 +MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
8158 +MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@rfo.atmel.com>");
8159 +MODULE_LICENSE("GPL");
8160 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/backlight/Kconfig avr32-git/drivers/video/backlight/Kconfig
8161 --- linux-2.6.21.3/drivers/video/backlight/Kconfig      2007-05-24 23:22:47.000000000 +0200
8162 +++ avr32-git/drivers/video/backlight/Kconfig   2007-06-06 11:34:00.000000000 +0200
8163 @@ -8,26 +8,44 @@
8164           Enable this to be able to choose the drivers for controlling the
8165           backlight and the LCD panel on some platforms, for example on PDAs.
8166
8167 -config BACKLIGHT_CLASS_DEVICE
8168 -        tristate "Lowlevel Backlight controls"
8169 +#
8170 +# LCD
8171 +#
8172 +config LCD_CLASS_DEVICE
8173 +        tristate "Lowlevel LCD controls"
8174         depends on BACKLIGHT_LCD_SUPPORT
8175         default m
8176         help
8177 -         This framework adds support for low-level control of the LCD
8178 -          backlight. This includes support for brightness and power.
8179 +         This framework adds support for low-level control of LCD.
8180 +         Some framebuffer devices connect to platform-specific LCD modules
8181 +         in order to have a platform-specific way to control the flat panel
8182 +         (contrast and applying power to the LCD (not to the backlight!)).
8183
8184           To have support for your specific LCD panel you will have to
8185           select the proper drivers which depend on this option.
8186
8187 -config LCD_CLASS_DEVICE
8188 -        tristate "Lowlevel LCD controls"
8189 +config LCD_LTV350QV
8190 +       tristate "Samsung LTV350QV LCD Panel"
8191 +       depends on LCD_CLASS_DEVICE && SPI_MASTER
8192 +       default n
8193 +       help
8194 +         If you have a Samsung LTV350QV LCD panel, say y to include a
8195 +         power control driver for it.  The panel starts up in power
8196 +         off state, so you need this driver in order to see any
8197 +         output.
8198 +
8199 +         The LTV350QV panel is present on all ATSTK1000 boards.
8200 +
8201 +#
8202 +# Backlight
8203 +#
8204 +config BACKLIGHT_CLASS_DEVICE
8205 +        tristate "Lowlevel Backlight controls"
8206         depends on BACKLIGHT_LCD_SUPPORT
8207         default m
8208         help
8209 -         This framework adds support for low-level control of LCD.
8210 -         Some framebuffer devices connect to platform-specific LCD modules
8211 -         in order to have a platform-specific way to control the flat panel
8212 -         (contrast and applying power to the LCD (not to the backlight!)).
8213 +         This framework adds support for low-level control of the LCD
8214 +          backlight. This includes support for brightness and power.
8215
8216           To have support for your specific LCD panel you will have to
8217           select the proper drivers which depend on this option.
8218 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/backlight/ltv350qv.c avr32-git/drivers/video/backlight/ltv350qv.c
8219 --- linux-2.6.21.3/drivers/video/backlight/ltv350qv.c   1970-01-01 01:00:00.000000000 +0100
8220 +++ avr32-git/drivers/video/backlight/ltv350qv.c        2007-06-06 11:34:00.000000000 +0200
8221 @@ -0,0 +1,340 @@
8222 +/*
8223 + * Power control for Samsung LTV350QV Quarter VGA LCD Panel
8224 + *
8225 + * Copyright (C) 2006, 2007 Atmel Corporation
8226 + *
8227 + * This program is free software; you can redistribute it and/or modify
8228 + * it under the terms of the GNU General Public License version 2 as
8229 + * published by the Free Software Foundation.
8230 + */
8231 +#include <linux/delay.h>
8232 +#include <linux/err.h>
8233 +#include <linux/fb.h>
8234 +#include <linux/init.h>
8235 +#include <linux/lcd.h>
8236 +#include <linux/module.h>
8237 +#include <linux/spi/spi.h>
8238 +
8239 +#include "ltv350qv.h"
8240 +
8241 +#define POWER_IS_ON(pwr)       ((pwr) <= FB_BLANK_NORMAL)
8242 +
8243 +struct ltv350qv {
8244 +       struct spi_device       *spi;
8245 +       u8                      *buffer;
8246 +       int                     power;
8247 +       struct lcd_device       *ld;
8248 +};
8249 +
8250 +/*
8251 + * The power-on and power-off sequences are taken from the
8252 + * LTV350QV-F04 data sheet from Samsung. The register definitions are
8253 + * taken from the S6F2002 command list also from Samsung. Both
8254 + * documents are distributed with the AVR32 Linux BSP CD from Atmel.
8255 + *
8256 + * There's still some voodoo going on here, but it's a lot better than
8257 + * in the first incarnation of the driver where all we had was the raw
8258 + * numbers from the initialization sequence.
8259 + */
8260 +static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
8261 +{
8262 +       struct spi_message msg;
8263 +       struct spi_transfer index_xfer = {
8264 +               .len            = 3,
8265 +               .cs_change      = 1,
8266 +       };
8267 +       struct spi_transfer value_xfer = {
8268 +               .len            = 3,
8269 +               .cs_change      = 1,
8270 +       };
8271 +
8272 +       spi_message_init(&msg);
8273 +
8274 +       /* register index */
8275 +       lcd->buffer[0] = LTV_OPC_INDEX;
8276 +       lcd->buffer[1] = 0x00;
8277 +       lcd->buffer[2] = reg & 0x7f;
8278 +       index_xfer.tx_buf = lcd->buffer;
8279 +       spi_message_add_tail(&index_xfer, &msg);
8280 +
8281 +       /* register value */
8282 +       lcd->buffer[4] = LTV_OPC_DATA;
8283 +       lcd->buffer[5] = val >> 8;
8284 +       lcd->buffer[6] = val;
8285 +       value_xfer.tx_buf = lcd->buffer + 4;
8286 +       spi_message_add_tail(&value_xfer, &msg);
8287 +
8288 +       return spi_sync(lcd->spi, &msg);
8289 +}
8290 +
8291 +/* The comments are taken straight from the data sheet */
8292 +static int ltv350qv_power_on(struct ltv350qv *lcd)
8293 +{
8294 +       int ret;
8295 +
8296 +       /* Power On Reset Display off State */
8297 +       if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000))
8298 +               goto err;
8299 +       msleep(15);
8300 +
8301 +       /* Power Setting Function 1 */
8302 +       if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE))
8303 +               goto err;
8304 +       if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE))
8305 +               goto err_power1;
8306 +
8307 +       /* Power Setting Function 2 */
8308 +       if (ltv350qv_write_reg(lcd, LTV_PWRCTL1,
8309 +                              LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
8310 +                              | LTV_SUPPLY_CURRENT(5)))
8311 +               goto err_power2;
8312 +
8313 +       msleep(55);
8314 +
8315 +       /* Instruction Setting */
8316 +       ret = ltv350qv_write_reg(lcd, LTV_IFCTL,
8317 +                                LTV_NMD | LTV_REV | LTV_NL(0x1d));
8318 +       ret |= ltv350qv_write_reg(lcd, LTV_DATACTL,
8319 +                                 LTV_DS_SAME | LTV_CHS_480
8320 +                                 | LTV_DF_RGB | LTV_RGB_BGR);
8321 +       ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE,
8322 +                                 LTV_VSPL_ACTIVE_LOW
8323 +                                 | LTV_HSPL_ACTIVE_LOW
8324 +                                 | LTV_DPL_SAMPLE_RISING
8325 +                                 | LTV_EPL_ACTIVE_LOW
8326 +                                 | LTV_SS_RIGHT_TO_LEFT);
8327 +       ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3));
8328 +       ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
8329 +                                 LTV_NW_INV_1LINE | LTV_FWI(3));
8330 +       ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a);
8331 +       ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021);
8332 +       ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0));
8333 +       ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103);
8334 +       ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301);
8335 +       ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f);
8336 +       ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f);
8337 +       ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707);
8338 +       ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307);
8339 +       ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707);
8340 +       ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000);
8341 +       ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004);
8342 +       ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000);
8343 +       if (ret)
8344 +               goto err_settings;
8345 +
8346 +       /* Wait more than 2 frames */
8347 +       msleep(20);
8348 +
8349 +       /* Display On Sequence */
8350 +       ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
8351 +                                LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE
8352 +                                | LTV_POWER_ON | LTV_DRIVE_CURRENT(5)
8353 +                                | LTV_SUPPLY_CURRENT(5));
8354 +       ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
8355 +                                 LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3));
8356 +       if (ret)
8357 +               goto err_disp_on;
8358 +
8359 +       /* Display should now be ON. Phew. */
8360 +       return 0;
8361 +
8362 +err_disp_on:
8363 +       /*
8364 +        * Try to recover. Error handling probably isn't very useful
8365 +        * at this point, just make a best effort to switch the panel
8366 +        * off.
8367 +        */
8368 +       ltv350qv_write_reg(lcd, LTV_PWRCTL1,
8369 +                          LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
8370 +                          | LTV_SUPPLY_CURRENT(5));
8371 +       ltv350qv_write_reg(lcd, LTV_GATECTL2,
8372 +                          LTV_NW_INV_1LINE | LTV_FWI(3));
8373 +err_settings:
8374 +err_power2:
8375 +err_power1:
8376 +       ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
8377 +       msleep(1);
8378 +err:
8379 +       ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
8380 +       return -EIO;
8381 +}
8382 +
8383 +static int ltv350qv_power_off(struct ltv350qv *lcd)
8384 +{
8385 +       int ret;
8386 +
8387 +       /* Display Off Sequence */
8388 +       ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
8389 +                                LTV_VCOM_DISABLE
8390 +                                | LTV_DRIVE_CURRENT(5)
8391 +                                | LTV_SUPPLY_CURRENT(5));
8392 +       ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
8393 +                                 LTV_NW_INV_1LINE | LTV_FWI(3));
8394 +
8395 +       /* Power down setting 1 */
8396 +       ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
8397 +
8398 +       /* Wait at least 1 ms */
8399 +       msleep(1);
8400 +
8401 +       /* Power down setting 2 */
8402 +       ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
8403 +
8404 +       /*
8405 +        * No point in trying to recover here. If we can't switch the
8406 +        * panel off, what are we supposed to do other than inform the
8407 +        * user about the failure?
8408 +        */
8409 +       if (ret)
8410 +               return -EIO;
8411 +
8412 +       /* Display power should now be OFF */
8413 +       return 0;
8414 +}
8415 +
8416 +static int ltv350qv_power(struct ltv350qv *lcd, int power)
8417 +{
8418 +       int ret = 0;
8419 +
8420 +       if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
8421 +               ret = ltv350qv_power_on(lcd);
8422 +       else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
8423 +               ret = ltv350qv_power_off(lcd);
8424 +
8425 +       if (!ret)
8426 +               lcd->power = power;
8427 +
8428 +       return ret;
8429 +}
8430 +
8431 +static int ltv350qv_set_power(struct lcd_device *ld, int power)
8432 +{
8433 +       struct ltv350qv *lcd;
8434 +
8435 +       lcd = class_get_devdata(&ld->class_dev);
8436 +       return ltv350qv_power(lcd, power);
8437 +}
8438 +
8439 +static int ltv350qv_get_power(struct lcd_device *ld)
8440 +{
8441 +       struct ltv350qv *lcd;
8442 +
8443 +       lcd = class_get_devdata(&ld->class_dev);
8444 +       return lcd->power;
8445 +}
8446 +
8447 +static struct lcd_ops ltv_ops = {
8448 +       .get_power      = ltv350qv_get_power,
8449 +       .set_power      = ltv350qv_set_power,
8450 +};
8451 +
8452 +static int __devinit ltv350qv_probe(struct spi_device *spi)
8453 +{
8454 +       struct ltv350qv *lcd;
8455 +       struct lcd_device *ld;
8456 +       int ret;
8457 +
8458 +       lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL);
8459 +       if (!lcd)
8460 +               return -ENOMEM;
8461 +
8462 +       lcd->spi = spi;
8463 +       lcd->power = FB_BLANK_POWERDOWN;
8464 +       lcd->buffer = kzalloc(8, GFP_KERNEL);
8465 +
8466 +       ld = lcd_device_register("ltv350qv", lcd, &ltv_ops);
8467 +       if (IS_ERR(ld)) {
8468 +               ret = PTR_ERR(ld);
8469 +               goto out_free_lcd;
8470 +       }
8471 +       lcd->ld = ld;
8472 +
8473 +       ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
8474 +       if (ret)
8475 +               goto out_unregister;
8476 +
8477 +       dev_set_drvdata(&spi->dev, lcd);
8478 +
8479 +       return 0;
8480 +
8481 +out_unregister:
8482 +       lcd_device_unregister(ld);
8483 +out_free_lcd:
8484 +       kfree(lcd);
8485 +       return ret;
8486 +}
8487 +
8488 +static int __devexit ltv350qv_remove(struct spi_device *spi)
8489 +{
8490 +       struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
8491 +
8492 +       ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
8493 +       lcd_device_unregister(lcd->ld);
8494 +       kfree(lcd);
8495 +
8496 +       return 0;
8497 +}
8498 +
8499 +#ifdef CONFIG_PM
8500 +static int ltv350qv_suspend(struct spi_device *spi,
8501 +                           pm_message_t state, u32 level)
8502 +{
8503 +       struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
8504 +
8505 +       if (level == SUSPEND_POWER_DOWN)
8506 +               return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
8507 +
8508 +       return 0;
8509 +}
8510 +
8511 +static int ltv350qv_resume(struct spi_device *spi, u32 level)
8512 +{
8513 +       struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
8514 +
8515 +       if (level == RESUME_POWER_ON)
8516 +               return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
8517 +
8518 +       return 0;
8519 +}
8520 +#else
8521 +#define ltv350qv_suspend       NULL
8522 +#define ltv350qv_resume                NULL
8523 +#endif
8524 +
8525 +/* Power down all displays on reboot, poweroff or halt */
8526 +static void ltv350qv_shutdown(struct spi_device *spi)
8527 +{
8528 +       struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
8529 +
8530 +       ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
8531 +}
8532 +
8533 +static struct spi_driver ltv350qv_driver = {
8534 +       .driver = {
8535 +               .name           = "ltv350qv",
8536 +               .bus            = &spi_bus_type,
8537 +               .owner          = THIS_MODULE,
8538 +       },
8539 +
8540 +       .probe          = ltv350qv_probe,
8541 +       .remove         = __devexit_p(ltv350qv_remove),
8542 +       .shutdown       = ltv350qv_shutdown,
8543 +       .suspend        = ltv350qv_suspend,
8544 +       .resume         = ltv350qv_resume,
8545 +};
8546 +
8547 +static int __init ltv350qv_init(void)
8548 +{
8549 +       return spi_register_driver(&ltv350qv_driver);
8550 +}
8551 +
8552 +static void __exit ltv350qv_exit(void)
8553 +{
8554 +       spi_unregister_driver(&ltv350qv_driver);
8555 +}
8556 +module_init(ltv350qv_init);
8557 +module_exit(ltv350qv_exit);
8558 +
8559 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
8560 +MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver");
8561 +MODULE_LICENSE("GPL");
8562 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/backlight/ltv350qv.h avr32-git/drivers/video/backlight/ltv350qv.h
8563 --- linux-2.6.21.3/drivers/video/backlight/ltv350qv.h   1970-01-01 01:00:00.000000000 +0100
8564 +++ avr32-git/drivers/video/backlight/ltv350qv.h        2007-06-06 11:34:00.000000000 +0200
8565 @@ -0,0 +1,95 @@
8566 +/*
8567 + * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel
8568 + *
8569 + * Copyright (C) 2006, 2007 Atmel Corporation
8570 + *
8571 + * This program is free software; you can redistribute it and/or modify
8572 + * it under the terms of the GNU General Public License version 2 as
8573 + * published by the Free Software Foundation.
8574 + */
8575 +#ifndef __LTV350QV_H
8576 +#define __LTV350QV_H
8577 +
8578 +#define LTV_OPC_INDEX  0x74
8579 +#define LTV_OPC_DATA   0x76
8580 +
8581 +#define LTV_ID         0x00            /* ID Read */
8582 +#define LTV_IFCTL      0x01            /* Display Interface Control */
8583 +#define LTV_DATACTL    0x02            /* Display Data Control */
8584 +#define LTV_ENTRY_MODE 0x03            /* Entry Mode */
8585 +#define LTV_GATECTL1   0x04            /* Gate Control 1 */
8586 +#define LTV_GATECTL2   0x05            /* Gate Control 2 */
8587 +#define LTV_VBP                0x06            /* Vertical Back Porch */
8588 +#define LTV_HBP                0x07            /* Horizontal Back Porch */
8589 +#define LTV_SOTCTL     0x08            /* Source Output Timing Control */
8590 +#define LTV_PWRCTL1    0x09            /* Power Control 1 */
8591 +#define LTV_PWRCTL2    0x0a            /* Power Control 2 */
8592 +#define LTV_GAMMA(x)   (0x10 + (x))    /* Gamma control */
8593 +
8594 +/* Bit definitions for LTV_IFCTL */
8595 +#define LTV_IM                 (1 << 15)
8596 +#define LTV_NMD                        (1 << 14)
8597 +#define LTV_SSMD               (1 << 13)
8598 +#define LTV_REV                        (1 <<  7)
8599 +#define LTV_NL(x)              (((x) & 0x001f) << 0)
8600 +
8601 +/* Bit definitions for LTV_DATACTL */
8602 +#define LTV_DS_SAME            (0 << 12)
8603 +#define LTV_DS_D_TO_S          (1 << 12)
8604 +#define LTV_DS_S_TO_D          (2 << 12)
8605 +#define LTV_CHS_384            (0 <<  9)
8606 +#define LTV_CHS_480            (1 <<  9)
8607 +#define LTV_CHS_492            (2 <<  9)
8608 +#define LTV_DF_RGB             (0 <<  6)
8609 +#define LTV_DF_RGBX            (1 <<  6)
8610 +#define LTV_DF_XRGB            (2 <<  6)
8611 +#define LTV_RGB_RGB            (0 <<  2)
8612 +#define LTV_RGB_BGR            (1 <<  2)
8613 +#define LTV_RGB_GRB            (2 <<  2)
8614 +#define LTV_RGB_RBG            (3 <<  2)
8615 +
8616 +/* Bit definitions for LTV_ENTRY_MODE */
8617 +#define LTV_VSPL_ACTIVE_LOW    (0 << 15)
8618 +#define LTV_VSPL_ACTIVE_HIGH   (1 << 15)
8619 +#define LTV_HSPL_ACTIVE_LOW    (0 << 14)
8620 +#define LTV_HSPL_ACTIVE_HIGH   (1 << 14)
8621 +#define LTV_DPL_SAMPLE_RISING  (0 << 13)
8622 +#define LTV_DPL_SAMPLE_FALLING (1 << 13)
8623 +#define LTV_EPL_ACTIVE_LOW     (0 << 12)
8624 +#define LTV_EPL_ACTIVE_HIGH    (1 << 12)
8625 +#define LTV_SS_LEFT_TO_RIGHT   (0 <<  8)
8626 +#define LTV_SS_RIGHT_TO_LEFT   (1 <<  8)
8627 +#define LTV_STB                        (1 <<  1)
8628 +
8629 +/* Bit definitions for LTV_GATECTL1 */
8630 +#define LTV_CLW(x)             (((x) & 0x0007) << 12)
8631 +#define LTV_GAON               (1 <<  5)
8632 +#define LTV_SDR                        (1 <<  3)
8633 +
8634 +/* Bit definitions for LTV_GATECTL2 */
8635 +#define LTV_NW_INV_FRAME       (0 << 14)
8636 +#define LTV_NW_INV_1LINE       (1 << 14)
8637 +#define LTV_NW_INV_2LINE       (2 << 14)
8638 +#define LTV_DSC                        (1 << 12)
8639 +#define LTV_GIF                        (1 <<  8)
8640 +#define LTV_FHN                        (1 <<  7)
8641 +#define LTV_FTI(x)             (((x) & 0x0003) << 4)
8642 +#define LTV_FWI(x)             (((x) & 0x0003) << 0)
8643 +
8644 +/* Bit definitions for LTV_SOTCTL */
8645 +#define LTV_SDT(x)             (((x) & 0x0007) << 10)
8646 +#define LTV_EQ(x)              (((x) & 0x0007) <<  2)
8647 +
8648 +/* Bit definitions for LTV_PWRCTL1 */
8649 +#define LTV_VCOM_DISABLE       (1 << 14)
8650 +#define LTV_VCOMOUT_ENABLE     (1 << 11)
8651 +#define LTV_POWER_ON           (1 <<  9)
8652 +#define LTV_DRIVE_CURRENT(x)   (((x) & 0x0007) << 4)   /* 0=off, 5=max */
8653 +#define LTV_SUPPLY_CURRENT(x)  (((x) & 0x0007) << 0)   /* 0=off, 5=max */
8654 +
8655 +/* Bit definitions for LTV_PWRCTL2 */
8656 +#define LTV_VCOML_ENABLE       (1 << 13)
8657 +#define LTV_VCOML_VOLTAGE(x)   (((x) & 0x001f) << 8)   /* 0=1V, 31=-1V */
8658 +#define LTV_VCOMH_VOLTAGE(x)   (((x) & 0x001f) << 0)   /* 0=3V, 31=4.5V */
8659 +
8660 +#endif /* __LTV350QV_H */
8661 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/backlight/Makefile avr32-git/drivers/video/backlight/Makefile
8662 --- linux-2.6.21.3/drivers/video/backlight/Makefile     2007-05-24 23:22:47.000000000 +0200
8663 +++ avr32-git/drivers/video/backlight/Makefile  2007-06-06 11:34:00.000000000 +0200
8664 @@ -1,6 +1,8 @@
8665  # Backlight & LCD drivers
8666
8667  obj-$(CONFIG_LCD_CLASS_DEVICE)     += lcd.o
8668 +obj-$(CONFIG_LCD_LTV350QV)     += ltv350qv.o
8669 +
8670  obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
8671  obj-$(CONFIG_BACKLIGHT_CORGI)  += corgi_bl.o
8672  obj-$(CONFIG_BACKLIGHT_HP680)  += hp680_bl.o
8673 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/fbmem.c avr32-git/drivers/video/fbmem.c
8674 --- linux-2.6.21.3/drivers/video/fbmem.c        2007-05-24 23:22:47.000000000 +0200
8675 +++ avr32-git/drivers/video/fbmem.c     2007-06-06 11:34:00.000000000 +0200
8676 @@ -1198,6 +1198,10 @@
8677         pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
8678  #elif defined(__arm__) || defined(__sh__) || defined(__m32r__)
8679         vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
8680 +#elif defined(__avr32__)
8681 +       vma->vm_page_prot = __pgprot((pgprot_val(vma->vm_page_prot)
8682 +                                     & ~_PAGE_CACHABLE)
8683 +                                    | (_PAGE_BUFFER | _PAGE_DIRTY));
8684  #elif defined(__ia64__)
8685         if (efi_range_is_wc(vma->vm_start, vma->vm_end - vma->vm_start))
8686                 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
8687 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/Kconfig avr32-git/drivers/video/Kconfig
8688 --- linux-2.6.21.3/drivers/video/Kconfig        2007-05-24 23:22:47.000000000 +0200
8689 +++ avr32-git/drivers/video/Kconfig     2007-06-06 11:34:00.000000000 +0200
8690 @@ -674,6 +674,22 @@
8691           working with S1D13806). Product specs at
8692           <http://www.erd.epson.com/vdc/html/legacy_13xxx.htm>
8693
8694 +config FB_ATMEL
8695 +       tristate "AT91/AT32 LCD Controller support"
8696 +       depends on FB && (ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || AVR32)
8697 +       select FB_CFB_FILLRECT
8698 +       select FB_CFB_COPYAREA
8699 +       select FB_CFB_IMAGEBLIT
8700 +       help
8701 +         This enables support for the AT91/AT32 LCD Controller.
8702 +
8703 +config FB_INTSRAM
8704 +       bool "Frame Buffer in internal SRAM"
8705 +       depends on FB_ATMEL && ARCH_AT91SAM9261
8706 +       help
8707 +         Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
8708 +         to let frame buffer in external SDRAM.
8709 +
8710  config FB_NVIDIA
8711         tristate "nVidia Framebuffer Support"
8712         depends on FB && PCI
8713 diff -Nur -x .gitignore -x .git linux-2.6.21.3/drivers/video/Makefile avr32-git/drivers/video/Makefile
8714 --- linux-2.6.21.3/drivers/video/Makefile       2007-05-24 23:22:47.000000000 +0200
8715 +++ avr32-git/drivers/video/Makefile    2007-06-06 11:34:00.000000000 +0200
8716 @@ -75,6 +75,7 @@
8717  obj-$(CONFIG_FB_SA1100)           += sa1100fb.o
8718  obj-$(CONFIG_FB_HIT)              += hitfb.o
8719  obj-$(CONFIG_FB_EPSON1355)       += epson1355fb.o
8720 +obj-$(CONFIG_FB_ATMEL)           += atmel_lcdfb.o
8721  obj-$(CONFIG_FB_PVR2)             += pvr2fb.o
8722  obj-$(CONFIG_FB_VOODOO1)          += sstfb.o
8723  obj-$(CONFIG_FB_ARMCLCD)         += amba-clcd.o
8724 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-alpha/pgtable.h avr32-git/include/asm-alpha/pgtable.h
8725 --- linux-2.6.21.3/include/asm-alpha/pgtable.h  2007-05-24 23:22:47.000000000 +0200
8726 +++ avr32-git/include/asm-alpha/pgtable.h       2007-06-06 11:34:07.000000000 +0200
8727 @@ -345,10 +345,6 @@
8728  #define io_remap_pfn_range(vma, start, pfn, size, prot)        \
8729                 remap_pfn_range(vma, start, pfn, size, prot)
8730
8731 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
8732 -#define GET_IOSPACE(pfn)               0
8733 -#define GET_PFN(pfn)                   (pfn)
8734 -
8735  #define pte_ERROR(e) \
8736         printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
8737  #define pmd_ERROR(e) \
8738 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-alpha/scatterlist.h avr32-git/include/asm-alpha/scatterlist.h
8739 --- linux-2.6.21.3/include/asm-alpha/scatterlist.h      2007-05-24 23:22:47.000000000 +0200
8740 +++ avr32-git/include/asm-alpha/scatterlist.h   2007-06-06 11:34:07.000000000 +0200
8741 @@ -2,6 +2,7 @@
8742  #define _ALPHA_SCATTERLIST_H
8743
8744  #include <asm/page.h>
8745 +#include <asm/types.h>
8746
8747  struct scatterlist {
8748         struct page *page;
8749 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-arm/arch-at91/cpu.h avr32-git/include/asm-arm/arch-at91/cpu.h
8750 --- linux-2.6.21.3/include/asm-arm/arch-at91/cpu.h      2007-05-24 23:22:47.000000000 +0200
8751 +++ avr32-git/include/asm-arm/arch-at91/cpu.h   2007-06-06 11:34:07.000000000 +0200
8752 @@ -68,4 +68,10 @@
8753  #define cpu_is_at91sam9263()   (0)
8754  #endif
8755
8756 +/*
8757 + * Since this is ARM, we will never run on any AVR32 CPU. But these
8758 + * definitions may reduce clutter in common drivers.
8759 + */
8760 +#define cpu_is_at32ap7000()    (0)
8761 +
8762  #endif
8763 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-arm/pgtable.h avr32-git/include/asm-arm/pgtable.h
8764 --- linux-2.6.21.3/include/asm-arm/pgtable.h    2007-05-24 23:22:47.000000000 +0200
8765 +++ avr32-git/include/asm-arm/pgtable.h 2007-06-06 11:34:10.000000000 +0200
8766 @@ -395,10 +395,6 @@
8767  #define io_remap_pfn_range(vma,from,pfn,size,prot) \
8768                 remap_pfn_range(vma, from, pfn, size, prot)
8769
8770 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
8771 -#define GET_IOSPACE(pfn)               0
8772 -#define GET_PFN(pfn)                   (pfn)
8773 -
8774  #define pgtable_cache_init() do { } while (0)
8775
8776  #endif /* !__ASSEMBLY__ */
8777 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-arm/pgtable-nommu.h avr32-git/include/asm-arm/pgtable-nommu.h
8778 --- linux-2.6.21.3/include/asm-arm/pgtable-nommu.h      2007-05-24 23:22:47.000000000 +0200
8779 +++ avr32-git/include/asm-arm/pgtable-nommu.h   2007-06-06 11:34:10.000000000 +0200
8780 @@ -83,10 +83,6 @@
8781  #define io_remap_page_range    remap_page_range
8782  #define io_remap_pfn_range     remap_pfn_range
8783
8784 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
8785 -#define GET_IOSPACE(pfn)               0
8786 -#define GET_PFN(pfn)                   (pfn)
8787 -
8788
8789  /*
8790   * All 32bit addresses are effectively valid for vmalloc...
8791 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-arm26/pgtable.h avr32-git/include/asm-arm26/pgtable.h
8792 --- linux-2.6.21.3/include/asm-arm26/pgtable.h  2007-05-24 23:22:47.000000000 +0200
8793 +++ avr32-git/include/asm-arm26/pgtable.h       2007-06-06 11:34:10.000000000 +0200
8794 @@ -297,10 +297,6 @@
8795  #define io_remap_pfn_range(vma,from,pfn,size,prot) \
8796                 remap_pfn_range(vma, from, pfn, size, prot)
8797
8798 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
8799 -#define GET_IOSPACE(pfn)               0
8800 -#define GET_PFN(pfn)                   (pfn)
8801 -
8802  #endif /* !__ASSEMBLY__ */
8803
8804  #endif /* _ASMARM_PGTABLE_H */
8805 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/arch-at32ap/board.h avr32-git/include/asm-avr32/arch-at32ap/board.h
8806 --- linux-2.6.21.3/include/asm-avr32/arch-at32ap/board.h        2007-05-24 23:22:47.000000000 +0200
8807 +++ avr32-git/include/asm-avr32/arch-at32ap/board.h     2007-06-06 11:34:10.000000000 +0200
8808 @@ -6,6 +6,8 @@
8809
8810  #include <linux/types.h>
8811
8812 +#define GPIO_PIN_NONE  (-1)
8813 +
8814  /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
8815  void at32_add_system_devices(void);
8816
8817 @@ -30,11 +32,22 @@
8818  struct platform_device *
8819  at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
8820
8821 -struct lcdc_platform_data {
8822 -       unsigned long fbmem_start;
8823 -       unsigned long fbmem_size;
8824 +struct platform_device *at32_add_device_twi(unsigned int id);
8825 +
8826 +struct mci_platform_data {
8827 +       int detect_pin;
8828 +       int wp_pin;
8829  };
8830  struct platform_device *
8831 -at32_add_device_lcdc(unsigned int id, struct lcdc_platform_data *data);
8832 +at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
8833 +struct platform_device *at32_add_device_usba(unsigned int id);
8834 +
8835 +struct atmel_lcdfb_info;
8836 +struct platform_device *
8837 +at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
8838 +                    unsigned long fbmem_start, unsigned long fbmem_len);
8839 +
8840 +struct platform_device *at32_add_device_ac97c(unsigned int id);
8841 +struct platform_device *at32_add_device_abdac(unsigned int id);
8842
8843  #endif /* __ASM_ARCH_BOARD_H */
8844 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/arch-at32ap/cpu.h avr32-git/include/asm-avr32/arch-at32ap/cpu.h
8845 --- linux-2.6.21.3/include/asm-avr32/arch-at32ap/cpu.h  1970-01-01 01:00:00.000000000 +0100
8846 +++ avr32-git/include/asm-avr32/arch-at32ap/cpu.h       2007-06-06 11:34:10.000000000 +0200
8847 @@ -0,0 +1,33 @@
8848 +/*
8849 + * AVR32 and (fake) AT91 CPU identification
8850 + *
8851 + * Copyright (C) 2007 Atmel Corporation
8852 + *
8853 + * This program is free software; you can redistribute it and/or modify
8854 + * it under the terms of the GNU General Public License version 2 as
8855 + * published by the Free Software Foundation.
8856 + */
8857 +#ifndef __ASM_ARCH_CPU_H
8858 +#define __ASM_ARCH_CPU_H
8859 +
8860 +/*
8861 + * Only AT32AP7000 is defined for now. We can identify the specific
8862 + * chip at runtime, but I'm not sure if it's really worth it.
8863 + */
8864 +#ifdef CONFIG_CPU_AT32AP7000
8865 +# define cpu_is_at32ap7000()   (1)
8866 +#else
8867 +# define cpu_is_at32ap7000()   (0)
8868 +#endif
8869 +
8870 +/*
8871 + * Since this is AVR32, we will never run on any AT91 CPU. But these
8872 + * definitions may reduce clutter in common drivers.
8873 + */
8874 +#define cpu_is_at91rm9200()    (0)
8875 +#define cpu_is_at91sam9xe()    (0)
8876 +#define cpu_is_at91sam9260()   (0)
8877 +#define cpu_is_at91sam9261()   (0)
8878 +#define cpu_is_at91sam9263()   (0)
8879 +
8880 +#endif /* __ASM_ARCH_CPU_H */
8881 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/arch-at32ap/gpio.h avr32-git/include/asm-avr32/arch-at32ap/gpio.h
8882 --- linux-2.6.21.3/include/asm-avr32/arch-at32ap/gpio.h 2007-05-24 23:22:47.000000000 +0200
8883 +++ avr32-git/include/asm-avr32/arch-at32ap/gpio.h      2007-06-06 11:34:11.000000000 +0200
8884 @@ -14,6 +14,8 @@
8885  int gpio_get_value(unsigned int gpio);
8886  void gpio_set_value(unsigned int gpio, int value);
8887
8888 +#include <asm-generic/gpio.h>          /* cansleep wrappers */
8889 +
8890  static inline int gpio_to_irq(unsigned int gpio)
8891  {
8892         return gpio + GPIO_IRQ_BASE;
8893 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/arch-at32ap/io.h avr32-git/include/asm-avr32/arch-at32ap/io.h
8894 --- linux-2.6.21.3/include/asm-avr32/arch-at32ap/io.h   1970-01-01 01:00:00.000000000 +0100
8895 +++ avr32-git/include/asm-avr32/arch-at32ap/io.h        2007-06-06 11:34:11.000000000 +0200
8896 @@ -0,0 +1,39 @@
8897 +#ifndef __ASM_AVR32_ARCH_AT32AP_IO_H
8898 +#define __ASM_AVR32_ARCH_AT32AP_IO_H
8899 +
8900 +/* For "bizarre" halfword swapping */
8901 +#include <linux/byteorder/swabb.h>
8902 +
8903 +#if defined(CONFIG_AP7000_32_BIT_SMC)
8904 +# define __swizzle_addr_b(addr)        (addr ^ 3UL)
8905 +# define __swizzle_addr_w(addr)        (addr ^ 2UL)
8906 +# define __swizzle_addr_l(addr)        (addr)
8907 +# define ioswabb(a, x)         (x)
8908 +# define ioswabw(a, x)         (x)
8909 +# define ioswabl(a, x)         (x)
8910 +# define __mem_ioswabb(a, x)   (x)
8911 +# define __mem_ioswabw(a, x)   swab16(x)
8912 +# define __mem_ioswabl(a, x)   swab32(x)
8913 +#elif defined(CONFIG_AP7000_16_BIT_SMC)
8914 +# define __swizzle_addr_b(addr)        (addr ^ 1UL)
8915 +# define __swizzle_addr_w(addr)        (addr)
8916 +# define __swizzle_addr_l(addr)        (addr)
8917 +# define ioswabb(a, x)         (x)
8918 +# define ioswabw(a, x)         (x)
8919 +# define ioswabl(a, x)         swahw32(x)
8920 +# define __mem_ioswabb(a, x)   (x)
8921 +# define __mem_ioswabw(a, x)   swab16(x)
8922 +# define __mem_ioswabl(a, x)   swahb32(x)
8923 +#else
8924 +# define __swizzle_addr_b(addr)        (addr)
8925 +# define __swizzle_addr_w(addr)        (addr)
8926 +# define __swizzle_addr_l(addr)        (addr)
8927 +# define ioswabb(a, x)         (x)
8928 +# define ioswabw(a, x)         swab16(x)
8929 +# define ioswabl(a, x)         swab32(x)
8930 +# define __mem_ioswabb(a, x)   (x)
8931 +# define __mem_ioswabw(a, x)   (x)
8932 +# define __mem_ioswabl(a, x)   (x)
8933 +#endif
8934 +
8935 +#endif /* __ASM_AVR32_ARCH_AT32AP_IO_H */
8936 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/arch-at32ap/smc.h avr32-git/include/asm-avr32/arch-at32ap/smc.h
8937 --- linux-2.6.21.3/include/asm-avr32/arch-at32ap/smc.h  2007-05-24 23:22:47.000000000 +0200
8938 +++ avr32-git/include/asm-avr32/arch-at32ap/smc.h       2007-06-06 11:34:11.000000000 +0200
8939 @@ -48,10 +48,32 @@
8940         unsigned int    nwe_controlled:1;
8941
8942         /*
8943 +        * 0: NWAIT is disabled
8944 +        * 1: Reserved
8945 +        * 2: NWAIT is frozen mode
8946 +        * 3: NWAIT in ready mode
8947 +        */
8948 +       unsigned int    nwait_mode:2;
8949 +
8950 +       /*
8951          * 0: Byte select access type
8952          * 1: Byte write access type
8953          */
8954         unsigned int    byte_write:1;
8955 +
8956 +       /*
8957 +        * Number of clock cycles before data is released after
8958 +        * the rising edge of the read controlling signal
8959 +        *
8960 +        * Total cycles from SMC is tdf_cycles + 1
8961 +        */
8962 +       unsigned int    tdf_cycles:4;
8963 +
8964 +       /*
8965 +        * 0: TDF optimization disabled
8966 +        * 1: TDF optimization enabled
8967 +        */
8968 +       unsigned int    tdf_mode:1;
8969  };
8970
8971  extern int smc_set_configuration(int cs, const struct smc_config *config);
8972 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/arch-at32ap/time.h avr32-git/include/asm-avr32/arch-at32ap/time.h
8973 --- linux-2.6.21.3/include/asm-avr32/arch-at32ap/time.h 1970-01-01 01:00:00.000000000 +0100
8974 +++ avr32-git/include/asm-avr32/arch-at32ap/time.h      2007-06-06 11:34:11.000000000 +0200
8975 @@ -0,0 +1,112 @@
8976 +/*
8977 + * Copyright (C) 2007 Atmel Corporation
8978 + *
8979 + * This program is free software; you can redistribute it and/or modify
8980 + * it under the terms of the GNU General Public License version 2 as
8981 + * published by the Free Software Foundation.
8982 + */
8983 +
8984 +#ifndef _ASM_AVR32_ARCH_AT32AP_TIME_H
8985 +#define _ASM_AVR32_ARCH_AT32AP_TIME_H
8986 +
8987 +#include <linux/platform_device.h>
8988 +
8989 +extern struct irqaction timer_irqaction;
8990 +extern struct platform_device at32_systc0_device;
8991 +extern void local_timer_interrupt(int irq, void *dev_id);
8992 +
8993 +#define TIMER_BCR                                      0x000000c0
8994 +#define TIMER_BCR_SYNC                                          0
8995 +#define TIMER_BMR                                      0x000000c4
8996 +#define TIMER_BMR_TC0XC0S                                       0
8997 +#define TIMER_BMR_TC1XC1S                                       2
8998 +#define TIMER_BMR_TC2XC2S                                       4
8999 +#define TIMER_CCR                                      0x00000000
9000 +#define TIMER_CCR_CLKDIS                                        1
9001 +#define TIMER_CCR_CLKEN                                                 0
9002 +#define TIMER_CCR_SWTRG                                                 2
9003 +#define TIMER_CMR                                      0x00000004
9004 +#define TIMER_CMR_ABETRG                                       10
9005 +#define TIMER_CMR_ACPA                                         16
9006 +#define TIMER_CMR_ACPC                                         18
9007 +#define TIMER_CMR_AEEVT                                                20
9008 +#define TIMER_CMR_ASWTRG                                       22
9009 +#define TIMER_CMR_BCPB                                         24
9010 +#define TIMER_CMR_BCPC                                         26
9011 +#define TIMER_CMR_BEEVT                                                28
9012 +#define TIMER_CMR_BSWTRG                                       30
9013 +#define TIMER_CMR_BURST                                                 4
9014 +#define TIMER_CMR_CLKI                                          3
9015 +#define TIMER_CMR_CPCDIS                                        7
9016 +#define TIMER_CMR_CPCSTOP                                       6
9017 +#define TIMER_CMR_CPCTRG                                       14
9018 +#define TIMER_CMR_EEVT                                         10
9019 +#define TIMER_CMR_EEVTEDG                                       8
9020 +#define TIMER_CMR_ENETRG                                       12
9021 +#define TIMER_CMR_ETRGEDG                                       8
9022 +#define TIMER_CMR_LDBDIS                                        7
9023 +#define TIMER_CMR_LDBSTOP                                       6
9024 +#define TIMER_CMR_LDRA                                         16
9025 +#define TIMER_CMR_LDRB                                         18
9026 +#define TIMER_CMR_TCCLKS                                        0
9027 +#define TIMER_CMR_WAVE                                         15
9028 +#define TIMER_CMR_WAVSEL                                       13
9029 +#define TIMER_CV                                       0x00000010
9030 +#define TIMER_CV_CV                                             0
9031 +#define TIMER_IDR                                      0x00000028
9032 +#define TIMER_IDR_COVFS                                                 0
9033 +#define TIMER_IDR_CPAS                                          2
9034 +#define TIMER_IDR_CPBS                                          3
9035 +#define TIMER_IDR_CPCS                                          4
9036 +#define TIMER_IDR_ETRGS                                                 7
9037 +#define TIMER_IDR_LDRAS                                                 5
9038 +#define TIMER_IDR_LDRBS                                                 6
9039 +#define TIMER_IDR_LOVRS                                                 1
9040 +#define TIMER_IER                                      0x00000024
9041 +#define TIMER_IER_COVFS                                                 0
9042 +#define TIMER_IER_CPAS                                          2
9043 +#define TIMER_IER_CPBS                                          3
9044 +#define TIMER_IER_CPCS                                          4
9045 +#define TIMER_IER_ETRGS                                                 7
9046 +#define TIMER_IER_LDRAS                                                 5
9047 +#define TIMER_IER_LDRBS                                                 6
9048 +#define TIMER_IER_LOVRS                                                 1
9049 +#define TIMER_IMR                                      0x0000002c
9050 +#define TIMER_IMR_COVFS                                                 0
9051 +#define TIMER_IMR_CPAS                                          2
9052 +#define TIMER_IMR_CPBS                                          3
9053 +#define TIMER_IMR_CPCS                                          4
9054 +#define TIMER_IMR_ETRGS                                                 7
9055 +#define TIMER_IMR_LDRAS                                                 5
9056 +#define TIMER_IMR_LDRBS                                                 6
9057 +#define TIMER_IMR_LOVRS                                                 1
9058 +#define TIMER_RA                                       0x00000014
9059 +#define TIMER_RA_RA                                             0
9060 +#define TIMER_RB                                       0x00000018
9061 +#define TIMER_RB_RB                                             0
9062 +#define TIMER_RC                                       0x0000001c
9063 +#define TIMER_RC_RC                                             0
9064 +#define TIMER_SR                                       0x00000020
9065 +#define TIMER_SR_CLKSTA                                                16
9066 +#define TIMER_SR_COVFS                                          0
9067 +#define TIMER_SR_CPAS                                           2
9068 +#define TIMER_SR_CPBS                                           3
9069 +#define TIMER_SR_CPCS                                           4
9070 +#define TIMER_SR_ETRGS                                          7
9071 +#define TIMER_SR_LDRAS                                          5
9072 +#define TIMER_SR_LDRBS                                          6
9073 +#define TIMER_SR_LOVRS                                          1
9074 +#define TIMER_SR_MTIOA                                         17
9075 +#define TIMER_SR_MTIOB                                         18
9076 +
9077 +/* Bit manipulation macros */
9078 +#define TIMER_BIT(name)                (1 << TIMER_##name)
9079 +#define TIMER_BF(name,value)   ((value) << TIMER_##name)
9080 +
9081 +/* Register access macros */
9082 +#define timer_read(port,instance,reg) \
9083 +       __raw_readl(port + (0x40 * instance) + TIMER_##reg)
9084 +#define timer_write(port,instance,reg,value) \
9085 +       __raw_writel((value), port + (0x40 * instance) + TIMER_##reg)
9086 +
9087 +#endif /* _ASM_AVR32_ARCH_AT32AP_TIME_H */
9088 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/atomic.h avr32-git/include/asm-avr32/atomic.h
9089 --- linux-2.6.21.3/include/asm-avr32/atomic.h   2007-05-24 23:22:47.000000000 +0200
9090 +++ avr32-git/include/asm-avr32/atomic.h        2007-06-06 11:34:11.000000000 +0200
9091 @@ -173,7 +173,7 @@
9092  }
9093
9094  #define atomic_xchg(v, new)    (xchg(&((v)->counter), new))
9095 -#define atomic_cmpxchg(v, o, n)        ((int)cmpxchg(&((v)->counter), (o), (n)))
9096 +#define atomic_cmpxchg(v, o, n)        (cmpxchg(&((v)->counter), (o), (n)))
9097
9098  #define atomic_sub(i, v)       (void)atomic_sub_return(i, v)
9099  #define atomic_add(i, v)       (void)atomic_add_return(i, v)
9100 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/bug.h avr32-git/include/asm-avr32/bug.h
9101 --- linux-2.6.21.3/include/asm-avr32/bug.h      2007-05-24 23:22:47.000000000 +0200
9102 +++ avr32-git/include/asm-avr32/bug.h   2007-06-06 11:34:11.000000000 +0200
9103 @@ -18,27 +18,53 @@
9104
9105  #ifdef CONFIG_DEBUG_BUGVERBOSE
9106
9107 -#define BUG()                                                          \
9108 -       do {                                                            \
9109 -               asm volatile(".hword    %0\n\t"                         \
9110 -                            ".hword    %1\n\t"                         \
9111 -                            ".long     %2"                             \
9112 -                            :                                          \
9113 -                            : "n"(AVR32_BUG_OPCODE),                   \
9114 -                              "i"(__LINE__), "X"(__FILE__));           \
9115 -       } while (0)
9116 +#define _BUG_OR_WARN(flags)                                            \
9117 +       asm volatile(                                                   \
9118 +               "1:     .hword  %0\n"                                   \
9119 +               "       .section __bug_table,\"a\",@progbits\n"         \
9120 +               "2:     .long   1b\n"                                   \
9121 +               "       .long   %1\n"                                   \
9122 +               "       .short  %2\n"                                   \
9123 +               "       .short  %3\n"                                   \
9124 +               "       .org    2b + %4\n"                              \
9125 +               "       .previous"                                      \
9126 +               :                                                       \
9127 +               : "i"(AVR32_BUG_OPCODE), "i"(__FILE__),                 \
9128 +                 "i"(__LINE__), "i"(flags),                            \
9129 +                 "i"(sizeof(struct bug_entry)))
9130
9131  #else
9132
9133 +#define _BUG_OR_WARN(flags)                                            \
9134 +       asm volatile(                                                   \
9135 +               "1:     .hword  %0\n"                                   \
9136 +               "       .section __bug_table,\"a\",@progbits\n"         \
9137 +               "2:     .long   1b\n"                                   \
9138 +               "       .short  %1\n"                                   \
9139 +               "       .org    2b + %2\n"                              \
9140 +               "       .previous"                                      \
9141 +               :                                                       \
9142 +               : "i"(AVR32_BUG_OPCODE), "i"(flags),                    \
9143 +                 "i"(sizeof(struct bug_entry)))
9144 +
9145 +#endif /* CONFIG_DEBUG_BUGVERBOSE */
9146 +
9147  #define BUG()                                                          \
9148         do {                                                            \
9149 -               asm volatile(".hword    %0\n\t"                         \
9150 -                            : : "n"(AVR32_BUG_OPCODE));                \
9151 +               _BUG_OR_WARN(0);                                        \
9152 +               for (;;);                                               \
9153         } while (0)
9154
9155 -#endif /* CONFIG_DEBUG_BUGVERBOSE */
9156 +#define WARN_ON(condition)                                                     \
9157 +       ({                                                              \
9158 +               typeof(condition) __ret_warn_on = (condition);          \
9159 +               if (unlikely(__ret_warn_on))                            \
9160 +                       _BUG_OR_WARN(BUGFLAG_WARNING);                  \
9161 +               unlikely(__ret_warn_on);                                \
9162 +       })
9163
9164  #define HAVE_ARCH_BUG
9165 +#define HAVE_ARCH_WARN_ON
9166
9167  #endif /* CONFIG_BUG */
9168
9169 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/dma-controller.h avr32-git/include/asm-avr32/dma-controller.h
9170 --- linux-2.6.21.3/include/asm-avr32/dma-controller.h   1970-01-01 01:00:00.000000000 +0100
9171 +++ avr32-git/include/asm-avr32/dma-controller.h        2007-06-06 11:34:11.000000000 +0200
9172 @@ -0,0 +1,166 @@
9173 +/*
9174 + * Copyright (C) 2005-2006 Atmel Corporation
9175 + *
9176 + * This program is free software; you can redistribute it and/or modify
9177 + * it under the terms of the GNU General Public License version 2 as
9178 + * published by the Free Software Foundation.
9179 + */
9180 +#ifndef __ASM_AVR32_DMA_CONTROLLER_H
9181 +#define __ASM_AVR32_DMA_CONTROLLER_H
9182 +
9183 +#include <linux/device.h>
9184 +
9185 +#define DMA_DIR_MEM_TO_MEM             0x0000
9186 +#define DMA_DIR_MEM_TO_PERIPH          0x0001
9187 +#define DMA_DIR_PERIPH_TO_MEM          0x0002
9188 +#define DMA_DIR_PERIPH_TO_PERIPH       0x0003
9189 +
9190 +#define DMA_WIDTH_8BIT                 0
9191 +#define DMA_WIDTH_16BIT                        1
9192 +#define DMA_WIDTH_32BIT                        2
9193 +
9194 +struct dma_request {
9195 +       struct dma_controller *dmac;
9196 +       struct list_head list;
9197 +
9198 +       unsigned short channel;
9199 +
9200 +       void (*xfer_complete)(struct dma_request *req);
9201 +       void (*block_complete)(struct dma_request *req);
9202 +       void (*error)(struct dma_request *req);
9203 +};
9204 +
9205 +struct dma_request_sg {
9206 +       struct dma_request req;
9207 +
9208 +       int nr_sg;
9209 +       struct scatterlist *sg;
9210 +       unsigned long block_size;
9211 +       unsigned int nr_blocks;
9212 +
9213 +       dma_addr_t data_reg;
9214 +       unsigned short periph_id;
9215 +
9216 +       unsigned char direction;
9217 +       unsigned char width;
9218 +};
9219 +#define to_dma_request_sg(_req)                                \
9220 +       container_of(_req, struct dma_request_sg, req)
9221 +
9222 +struct dma_request_cyclic {
9223 +       struct dma_request req;
9224 +
9225 +        int periods;
9226 +       unsigned long buffer_size;
9227 +
9228 +        dma_addr_t buffer_start;
9229 +       dma_addr_t data_reg;
9230 +
9231 +       unsigned short periph_id;
9232 +       unsigned char direction;
9233 +       unsigned char width;
9234 +
9235 +        void *dev_id;
9236 +};
9237 +#define to_dma_request_cyclic(_req)                            \
9238 +       container_of(_req, struct dma_request_cyclic, req)
9239 +
9240 +struct dma_request_memcpy {
9241 +       struct dma_request req;
9242 +
9243 +       dma_addr_t src_addr;
9244 +       unsigned int src_width;
9245 +       unsigned int src_stride;
9246 +
9247 +       dma_addr_t dst_addr;
9248 +       unsigned int dst_width;
9249 +       unsigned int dst_stride;
9250 +
9251 +       size_t length;
9252 +
9253 +       unsigned short src_reverse:1;
9254 +       unsigned short dst_reverse:1;
9255 +};
9256 +#define to_dma_request_memcpy(_req)                            \
9257 +       container_of(_req, struct dma_request_memcpy, req)
9258 +
9259 +struct dma_controller {
9260 +       struct list_head list;
9261 +       int id;
9262 +       struct device *dev;
9263 +
9264 +       int (*alloc_channel)(struct dma_controller *dmac);
9265 +       void (*release_channel)(struct dma_controller *dmac,
9266 +                               int channel);
9267 +       int (*prepare_request_sg)(struct dma_controller *dmac,
9268 +                                 struct dma_request_sg *req);
9269 +        int (*prepare_request_cyclic)(struct dma_controller *dmac,
9270 +                                     struct dma_request_cyclic *req);
9271 +       int (*prepare_request_memcpy)(struct dma_controller *dmac,
9272 +                                     struct dma_request_memcpy *req);
9273 +       int (*start_request)(struct dma_controller *dmac,
9274 +                            unsigned int channel);
9275 +       int (*stop_request)(struct dma_controller *dmac,
9276 +                            unsigned int channel);
9277 +        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
9278 +                                      unsigned int channel);
9279 +};
9280 +
9281 +static inline int
9282 +dma_alloc_channel(struct dma_controller *dmac)
9283 +{
9284 +       return dmac->alloc_channel(dmac);
9285 +}
9286 +
9287 +static inline void
9288 +dma_release_channel(struct dma_controller *dmac, int chan)
9289 +{
9290 +       dmac->release_channel(dmac, chan);
9291 +}
9292 +
9293 +static inline int
9294 +dma_prepare_request_sg(struct dma_controller *dmac,
9295 +                      struct dma_request_sg *req)
9296 +{
9297 +       return dmac->prepare_request_sg(dmac, req);
9298 +}
9299 +
9300 +static inline int
9301 +dma_prepare_request_cyclic(struct dma_controller *dmac,
9302 +                          struct dma_request_cyclic *req)
9303 +{
9304 +       return dmac->prepare_request_cyclic(dmac, req);
9305 +}
9306 +
9307 +static inline int
9308 +dma_prepare_request_memcpy(struct dma_controller *dmac,
9309 +                          struct dma_request_memcpy *req)
9310 +{
9311 +       return dmac->prepare_request_memcpy(dmac, req);
9312 +}
9313 +
9314 +static inline int
9315 +dma_start_request(struct dma_controller *dmac,
9316 +                 unsigned int channel)
9317 +{
9318 +       return dmac->start_request(dmac, channel);
9319 +}
9320 +
9321 +static inline int
9322 +dma_stop_request(struct dma_controller *dmac,
9323 +                 unsigned int channel)
9324 +{
9325 +       return dmac->stop_request(dmac, channel);
9326 +}
9327 +
9328 +static inline dma_addr_t
9329 +dma_get_current_pos(struct dma_controller *dmac,
9330 +                    unsigned int channel)
9331 +{
9332 +       return dmac->get_current_pos(dmac, channel);
9333 +}
9334 +
9335 +extern int register_dma_controller(struct dma_controller *dmac);
9336 +extern struct dma_controller *find_dma_controller(int id);
9337 +
9338 +#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
9339 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/io.h avr32-git/include/asm-avr32/io.h
9340 --- linux-2.6.21.3/include/asm-avr32/io.h       2007-05-24 23:22:47.000000000 +0200
9341 +++ avr32-git/include/asm-avr32/io.h    2007-06-06 11:34:11.000000000 +0200
9342 @@ -1,13 +1,15 @@
9343  #ifndef __ASM_AVR32_IO_H
9344  #define __ASM_AVR32_IO_H
9345
9346 +#include <linux/kernel.h>
9347  #include <linux/string.h>
9348 -
9349 -#ifdef __KERNEL__
9350 +#include <linux/types.h>
9351
9352  #include <asm/addrspace.h>
9353  #include <asm/byteorder.h>
9354
9355 +#include <asm/arch/io.h>
9356 +
9357  /* virt_to_phys will only work when address is in P1 or P2 */
9358  static __inline__ unsigned long virt_to_phys(volatile void *address)
9359  {
9360 @@ -36,104 +38,215 @@
9361  extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
9362  extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
9363
9364 -static inline void writeb(unsigned char b, volatile void __iomem *addr)
9365 +static inline void __raw_writeb(u8 v, volatile void __iomem *addr)
9366  {
9367 -       *(volatile unsigned char __force *)addr = b;
9368 +       *(volatile u8 __force *)addr = v;
9369  }
9370 -static inline void writew(unsigned short b, volatile void __iomem *addr)
9371 +static inline void __raw_writew(u16 v, volatile void __iomem *addr)
9372  {
9373 -       *(volatile unsigned short __force *)addr = b;
9374 +       *(volatile u16 __force *)addr = v;
9375  }
9376 -static inline void writel(unsigned int b, volatile void __iomem *addr)
9377 +static inline void __raw_writel(u32 v, volatile void __iomem *addr)
9378  {
9379 -       *(volatile unsigned int __force *)addr = b;
9380 +       *(volatile u32 __force *)addr = v;
9381  }
9382 -#define __raw_writeb writeb
9383 -#define __raw_writew writew
9384 -#define __raw_writel writel
9385
9386 -static inline unsigned char readb(const volatile void __iomem *addr)
9387 +static inline u8 __raw_readb(const volatile void __iomem *addr)
9388  {
9389 -       return *(const volatile unsigned char __force *)addr;
9390 +       return *(const volatile u8 __force *)addr;
9391  }
9392 -static inline unsigned short readw(const volatile void __iomem *addr)
9393 +static inline u16 __raw_readw(const volatile void __iomem *addr)
9394  {
9395 -       return *(const volatile unsigned short __force *)addr;
9396 +       return *(const volatile u16 __force *)addr;
9397  }
9398 -static inline unsigned int readl(const volatile void __iomem *addr)
9399 +static inline u32 __raw_readl(const volatile void __iomem *addr)
9400  {
9401 -       return *(const volatile unsigned int __force *)addr;
9402 +       return *(const volatile u32 __force *)addr;
9403  }
9404 -#define __raw_readb readb
9405 -#define __raw_readw readw
9406 -#define __raw_readl readl
9407
9408 -#define writesb(p, d, l)       __raw_writesb((unsigned int)p, d, l)
9409 -#define writesw(p, d, l)       __raw_writesw((unsigned int)p, d, l)
9410 -#define writesl(p, d, l)       __raw_writesl((unsigned int)p, d, l)
9411 +/* Convert I/O port address to virtual address */
9412 +#ifndef __io
9413 +# define __io(p)       ((void *)phys_to_uncached(p))
9414 +#endif
9415
9416 -#define readsb(p, d, l)                __raw_readsb((unsigned int)p, d, l)
9417 -#define readsw(p, d, l)                __raw_readsw((unsigned int)p, d, l)
9418 -#define readsl(p, d, l)                __raw_readsl((unsigned int)p, d, l)
9419 +/*
9420 + * Not really sure about the best way to slow down I/O on
9421 + * AVR32. Defining it as a no-op until we have an actual test case.
9422 + */
9423 +#define SLOW_DOWN_IO   do { } while (0)
9424
9425 +#define __BUILD_MEMORY_SINGLE(pfx, bwl, type)                          \
9426 +static inline void                                                     \
9427 +pfx##write##bwl(type val, volatile void __iomem *addr)                 \
9428 +{                                                                      \
9429 +       volatile type *__addr;                                          \
9430 +       type __val;                                                     \
9431 +                                                                       \
9432 +       __addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr));   \
9433 +       __val = pfx##ioswab##bwl(__addr, val);                          \
9434 +                                                                       \
9435 +       BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long));             \
9436 +                                                                       \
9437 +       *__addr = __val;                                                \
9438 +}                                                                      \
9439 +                                                                       \
9440 +static inline type pfx##read##bwl(const volatile void __iomem *addr)   \
9441 +{                                                                      \
9442 +       volatile type *__addr;                                          \
9443 +       type __val;                                                     \
9444 +                                                                       \
9445 +       __addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr));   \
9446 +                                                                       \
9447 +       BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long));             \
9448 +                                                                       \
9449 +       __val = *__addr;                                                \
9450 +       return pfx##ioswab##bwl(__addr, __val);                         \
9451 +}
9452 +
9453 +#define __BUILD_IOPORT_SINGLE(pfx, bwl, type, p, slow)                 \
9454 +static inline void pfx##out##bwl##p(type val, unsigned long port)      \
9455 +{                                                                      \
9456 +       volatile type *__addr;                                          \
9457 +       type __val;                                                     \
9458 +                                                                       \
9459 +       __addr = __io(__swizzle_addr_##bwl(port));                      \
9460 +       __val = pfx##ioswab##bwl(__addr, val);                          \
9461 +                                                                       \
9462 +       BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long));             \
9463 +                                                                       \
9464 +       *__addr = __val;                                                \
9465 +       slow;                                                           \
9466 +}                                                                      \
9467 +                                                                       \
9468 +static inline type pfx##in##bwl##p(unsigned long port)                 \
9469 +{                                                                      \
9470 +       volatile type *__addr;                                          \
9471 +       type __val;                                                     \
9472 +                                                                       \
9473 +       __addr = __io(__swizzle_addr_##bwl(port));                      \
9474 +                                                                       \
9475 +       BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long));             \
9476 +                                                                       \
9477 +       __val = *__addr;                                                \
9478 +       slow;                                                           \
9479 +                                                                       \
9480 +       return pfx##ioswab##bwl(__addr, __val);                         \
9481 +}
9482 +
9483 +#define __BUILD_MEMORY_PFX(bus, bwl, type)                             \
9484 +       __BUILD_MEMORY_SINGLE(bus, bwl, type)
9485 +
9486 +#define BUILDIO_MEM(bwl, type)                                         \
9487 +       __BUILD_MEMORY_PFX(, bwl, type)                                 \
9488 +       __BUILD_MEMORY_PFX(__mem_, bwl, type)
9489 +
9490 +#define __BUILD_IOPORT_PFX(bus, bwl, type)                             \
9491 +       __BUILD_IOPORT_SINGLE(bus, bwl, type, ,)                        \
9492 +       __BUILD_IOPORT_SINGLE(bus, bwl, type, _p, SLOW_DOWN_IO)
9493 +
9494 +#define BUILDIO_IOPORT(bwl, type)                                      \
9495 +       __BUILD_IOPORT_PFX(, bwl, type)                                 \
9496 +       __BUILD_IOPORT_PFX(__mem_, bwl, type)
9497 +
9498 +BUILDIO_MEM(b, u8)
9499 +BUILDIO_MEM(w, u16)
9500 +BUILDIO_MEM(l, u32)
9501 +
9502 +BUILDIO_IOPORT(b, u8)
9503 +BUILDIO_IOPORT(w, u16)
9504 +BUILDIO_IOPORT(l, u32)
9505 +
9506 +#define readb_relaxed                  readb
9507 +#define readw_relaxed                  readw
9508 +#define readl_relaxed                  readl
9509 +
9510 +#define __BUILD_MEMORY_STRING(bwl, type)                               \
9511 +static inline void writes##bwl(volatile void __iomem *addr,            \
9512 +                              const void *data, unsigned int count)    \
9513 +{                                                                      \
9514 +       const type *__data = data;                                      \
9515 +                                                                       \
9516 +       while (count--)                                                 \
9517 +               __mem_write##bwl(*__data++, addr);                      \
9518 +}                                                                      \
9519 +                                                                       \
9520 +static inline void reads##bwl(const volatile void __iomem *addr,       \
9521 +                             void *data, unsigned int count)           \
9522 +{                                                                      \
9523 +       type *__data = data;                                            \
9524 +                                                                       \
9525 +       while (count--)                                                 \
9526 +               *__data++ = __mem_read##bwl(addr);                      \
9527 +}
9528 +
9529 +#define __BUILD_IOPORT_STRING(bwl, type)                               \
9530 +static inline void outs##bwl(unsigned long port, const void *data,     \
9531 +                            unsigned int count)                        \
9532 +{                                                                      \
9533 +       const type *__data = data;                                      \
9534 +                                                                       \
9535 +       while (count--)                                                 \
9536 +               __mem_out##bwl(*__data++, port);                        \
9537 +}                                                                      \
9538 +                                                                       \
9539 +static inline void ins##bwl(unsigned long port, void *data,            \
9540 +                          unsigned int count)                          \
9541 +{                                                                      \
9542 +       type *__data = data;                                            \
9543 +                                                                       \
9544 +       while (count--)                                                 \
9545 +               *__data++ = __mem_in##bwl(port);                        \
9546 +}
9547 +
9548 +#define BUILDSTRING(bwl, type)                                         \
9549 +       __BUILD_MEMORY_STRING(bwl, type)                                \
9550 +       __BUILD_IOPORT_STRING(bwl, type)
9551 +
9552 +BUILDSTRING(b, u8)
9553 +BUILDSTRING(w, u16)
9554 +BUILDSTRING(l, u32)
9555
9556  /*
9557   * io{read,write}{8,16,32} macros in both le (for PCI style consumers) and native be
9558   */
9559  #ifndef ioread8
9560
9561 -#define ioread8(p)     ({ unsigned int __v = __raw_readb(p); __v; })
9562 +#define ioread8(p)             ((unsigned int)readb(p))
9563
9564 -#define ioread16(p)    ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; })
9565 -#define ioread16be(p)  ({ unsigned int __v = be16_to_cpu(__raw_readw(p)); __v; })
9566 +#define ioread16(p)            ((unsigned int)readw(p))
9567 +#define ioread16be(p)          ((unsigned int)__raw_readw(p))
9568
9569 -#define ioread32(p)    ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; })
9570 -#define ioread32be(p)  ({ unsigned int __v = be32_to_cpu(__raw_readl(p)); __v; })
9571 +#define ioread32(p)            ((unsigned int)readl(p))
9572 +#define ioread32be(p)          ((unsigned int)__raw_readl(p))
9573
9574 -#define iowrite8(v,p)  __raw_writeb(v, p)
9575 +#define iowrite8(v,p)          writeb(v, p)
9576
9577 -#define iowrite16(v,p) __raw_writew(cpu_to_le16(v), p)
9578 -#define iowrite16be(v,p)       __raw_writew(cpu_to_be16(v), p)
9579 +#define iowrite16(v,p)         writew(v, p)
9580 +#define iowrite16be(v,p)       __raw_writew(v, p)
9581
9582 -#define iowrite32(v,p) __raw_writel(cpu_to_le32(v), p)
9583 -#define iowrite32be(v,p)       __raw_writel(cpu_to_be32(v), p)
9584 +#define iowrite32(v,p)         writel(v, p)
9585 +#define iowrite32be(v,p)       __raw_writel(v, p)
9586
9587 -#define ioread8_rep(p,d,c)     __raw_readsb(p,d,c)
9588 -#define ioread16_rep(p,d,c)    __raw_readsw(p,d,c)
9589 -#define ioread32_rep(p,d,c)    __raw_readsl(p,d,c)
9590 +#define ioread8_rep(p,d,c)     readsb(p,d,c)
9591 +#define ioread16_rep(p,d,c)    readsw(p,d,c)
9592 +#define ioread32_rep(p,d,c)    readsl(p,d,c)
9593
9594 -#define iowrite8_rep(p,s,c)    __raw_writesb(p,s,c)
9595 -#define iowrite16_rep(p,s,c)   __raw_writesw(p,s,c)
9596 -#define iowrite32_rep(p,s,c)   __raw_writesl(p,s,c)
9597 +#define iowrite8_rep(p,s,c)    writesb(p,s,c)
9598 +#define iowrite16_rep(p,s,c)   writesw(p,s,c)
9599 +#define iowrite32_rep(p,s,c)   writesl(p,s,c)
9600
9601  #endif
9602
9603 -
9604 -/*
9605 - * These two are only here because ALSA _thinks_ it needs them...
9606 - */
9607  static inline void memcpy_fromio(void * to, const volatile void __iomem *from,
9608                                  unsigned long count)
9609  {
9610 -       char *p = to;
9611 -       while (count) {
9612 -               count--;
9613 -               *p = readb(from);
9614 -               p++;
9615 -               from++;
9616 -       }
9617 +       memcpy(to, (const void __force *)from, count);
9618  }
9619
9620  static inline void  memcpy_toio(volatile void __iomem *to, const void * from,
9621                                 unsigned long count)
9622  {
9623 -       const char *p = from;
9624 -       while (count) {
9625 -               count--;
9626 -               writeb(*p, to);
9627 -               p++;
9628 -               to++;
9629 -       }
9630 +       memcpy((void __force *)to, from, count);
9631  }
9632
9633  static inline void memset_io(volatile void __iomem *addr, unsigned char val,
9634 @@ -142,99 +255,8 @@
9635         memset((void __force *)addr, val, count);
9636  }
9637
9638 -/*
9639 - * Bad read/write accesses...
9640 - */
9641 -extern void __readwrite_bug(const char *fn);
9642 -
9643  #define IO_SPACE_LIMIT 0xffffffff
9644
9645 -/* Convert I/O port address to virtual address */
9646 -#define __io(p)                ((void __iomem *)phys_to_uncached(p))
9647 -
9648 -/*
9649 - *  IO port access primitives
9650 - *  -------------------------
9651 - *
9652 - * The AVR32 doesn't have special IO access instructions; all IO is memory
9653 - * mapped. Note that these are defined to perform little endian accesses
9654 - * only. Their primary purpose is to access PCI and ISA peripherals.
9655 - *
9656 - * Note that for a big endian machine, this implies that the following
9657 - * big endian mode connectivity is in place.
9658 - *
9659 - * The machine specific io.h include defines __io to translate an "IO"
9660 - * address to a memory address.
9661 - *
9662 - * Note that we prevent GCC re-ordering or caching values in expressions
9663 - * by introducing sequence points into the in*() definitions.  Note that
9664 - * __raw_* do not guarantee this behaviour.
9665 - *
9666 - * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
9667 - */
9668 -#define outb(v, p)             __raw_writeb(v, __io(p))
9669 -#define outw(v, p)             __raw_writew(cpu_to_le16(v), __io(p))
9670 -#define outl(v, p)             __raw_writel(cpu_to_le32(v), __io(p))
9671 -
9672 -#define inb(p)                 __raw_readb(__io(p))
9673 -#define inw(p)                 le16_to_cpu(__raw_readw(__io(p)))
9674 -#define inl(p)                 le32_to_cpu(__raw_readl(__io(p)))
9675 -
9676 -static inline void __outsb(unsigned long port, void *addr, unsigned int count)
9677 -{
9678 -       while (count--) {
9679 -               outb(*(u8 *)addr, port);
9680 -               addr++;
9681 -       }
9682 -}
9683 -
9684 -static inline void __insb(unsigned long port, void *addr, unsigned int count)
9685 -{
9686 -       while (count--) {
9687 -               *(u8 *)addr = inb(port);
9688 -               addr++;
9689 -       }
9690 -}
9691 -
9692 -static inline void __outsw(unsigned long port, void *addr, unsigned int count)
9693 -{
9694 -       while (count--) {
9695 -               outw(*(u16 *)addr, port);
9696 -               addr += 2;
9697 -       }
9698 -}
9699 -
9700 -static inline void __insw(unsigned long port, void *addr, unsigned int count)
9701 -{
9702 -       while (count--) {
9703 -               *(u16 *)addr = inw(port);
9704 -               addr += 2;
9705 -       }
9706 -}
9707 -
9708 -static inline void __outsl(unsigned long port, void *addr, unsigned int count)
9709 -{
9710 -       while (count--) {
9711 -               outl(*(u32 *)addr, port);
9712 -               addr += 4;
9713 -       }
9714 -}
9715 -
9716 -static inline void __insl(unsigned long port, void *addr, unsigned int count)
9717 -{
9718 -       while (count--) {
9719 -               *(u32 *)addr = inl(port);
9720 -               addr += 4;
9721 -       }
9722 -}
9723 -
9724 -#define outsb(port, addr, count)       __outsb(port, addr, count)
9725 -#define insb(port, addr, count)                __insb(port, addr, count)
9726 -#define outsw(port, addr, count)       __outsw(port, addr, count)
9727 -#define insw(port, addr, count)                __insw(port, addr, count)
9728 -#define outsl(port, addr, count)       __outsl(port, addr, count)
9729 -#define insl(port, addr, count)                __insl(port, addr, count)
9730 -
9731  extern void __iomem *__ioremap(unsigned long offset, size_t size,
9732                                unsigned long flags);
9733  extern void __iounmap(void __iomem *addr);
9734 @@ -292,6 +314,4 @@
9735   */
9736  #define xlate_dev_kmem_ptr(p)   p
9737
9738 -#endif /* __KERNEL__ */
9739 -
9740  #endif /* __ASM_AVR32_IO_H */
9741 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/kdebug.h avr32-git/include/asm-avr32/kdebug.h
9742 --- linux-2.6.21.3/include/asm-avr32/kdebug.h   2007-05-24 23:22:47.000000000 +0200
9743 +++ avr32-git/include/asm-avr32/kdebug.h        2007-06-06 11:34:11.000000000 +0200
9744 @@ -12,16 +12,12 @@
9745
9746  int register_die_notifier(struct notifier_block *nb);
9747  int unregister_die_notifier(struct notifier_block *nb);
9748 -int register_page_fault_notifier(struct notifier_block *nb);
9749 -int unregister_page_fault_notifier(struct notifier_block *nb);
9750  extern struct atomic_notifier_head avr32_die_chain;
9751
9752  /* Grossly misnamed. */
9753  enum die_val {
9754 -       DIE_FAULT,
9755         DIE_BREAKPOINT,
9756         DIE_SSTEP,
9757 -       DIE_PAGE_FAULT,
9758  };
9759
9760  static inline int notify_die(enum die_val val, struct pt_regs *regs,
9761 @@ -35,4 +31,18 @@
9762         return atomic_notifier_call_chain(&avr32_die_chain, val, &args);
9763  }
9764
9765 +/*
9766 + * These are only here because kprobes.c wants them to implement a
9767 + * blatant layering violation.  Will hopefully go away soon once all
9768 + * architectures are updated.
9769 + */
9770 +static inline int register_page_fault_notifier(struct notifier_block *nb)
9771 +{
9772 +       return 0;
9773 +}
9774 +static inline int unregister_page_fault_notifier(struct notifier_block *nb)
9775 +{
9776 +       return 0;
9777 +}
9778 +
9779  #endif /* __ASM_AVR32_KDEBUG_H */
9780 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/kprobes.h avr32-git/include/asm-avr32/kprobes.h
9781 --- linux-2.6.21.3/include/asm-avr32/kprobes.h  2007-05-24 23:22:47.000000000 +0200
9782 +++ avr32-git/include/asm-avr32/kprobes.h       2007-06-06 11:34:11.000000000 +0200
9783 @@ -26,6 +26,7 @@
9784         kprobe_opcode_t insn[MAX_INSN_SIZE];
9785  };
9786
9787 +extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
9788  extern int kprobe_exceptions_notify(struct notifier_block *self,
9789                                     unsigned long val, void *data);
9790
9791 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/pgtable.h avr32-git/include/asm-avr32/pgtable.h
9792 --- linux-2.6.21.3/include/asm-avr32/pgtable.h  2007-05-24 23:22:47.000000000 +0200
9793 +++ avr32-git/include/asm-avr32/pgtable.h       2007-06-06 11:34:11.000000000 +0200
9794 @@ -394,10 +394,6 @@
9795  #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)        \
9796         remap_pfn_range(vma, vaddr, pfn, size, prot)
9797
9798 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
9799 -#define GET_IOSPACE(pfn)               0
9800 -#define GET_PFN(pfn)                   (pfn)
9801 -
9802  /* No page table caches to initialize (?) */
9803  #define pgtable_cache_init()   do { } while(0)
9804
9805 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/processor.h avr32-git/include/asm-avr32/processor.h
9806 --- linux-2.6.21.3/include/asm-avr32/processor.h        2007-05-24 23:22:47.000000000 +0200
9807 +++ avr32-git/include/asm-avr32/processor.h     2007-06-06 11:34:11.000000000 +0200
9808 @@ -40,6 +40,14 @@
9809         TLB_INVALID
9810  };
9811
9812 +#define AVR32_FEATURE_RMW      (1 << 0)
9813 +#define AVR32_FEATURE_DSP      (1 << 1)
9814 +#define AVR32_FEATURE_SIMD     (1 << 2)
9815 +#define AVR32_FEATURE_OCD      (1 << 3)
9816 +#define AVR32_FEATURE_PCTR     (1 << 4)
9817 +#define AVR32_FEATURE_JAVA     (1 << 5)
9818 +#define AVR32_FEATURE_FPU      (1 << 6)
9819 +
9820  struct avr32_cpuinfo {
9821         struct clk *clk;
9822         unsigned long loops_per_jiffy;
9823 @@ -48,6 +56,7 @@
9824         unsigned short arch_revision;
9825         unsigned short cpu_revision;
9826         enum tlb_config tlb_config;
9827 +       unsigned long features;
9828
9829         struct cache_info icache;
9830         struct cache_info dcache;
9831 @@ -125,10 +134,10 @@
9832  #define thread_saved_pc(tsk)    ((tsk)->thread.cpu_context.pc)
9833
9834  struct pt_regs;
9835 -void show_trace(struct task_struct *task, unsigned long *stack,
9836 -               struct pt_regs *regs);
9837 -
9838  extern unsigned long get_wchan(struct task_struct *p);
9839 +extern void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl);
9840 +extern void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp,
9841 +                              struct pt_regs *regs, const char *log_lvl);
9842
9843  #define KSTK_EIP(tsk)  ((tsk)->thread.cpu_context.pc)
9844  #define KSTK_ESP(tsk)  ((tsk)->thread.cpu_context.ksp)
9845 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/scatterlist.h avr32-git/include/asm-avr32/scatterlist.h
9846 --- linux-2.6.21.3/include/asm-avr32/scatterlist.h      2007-05-24 23:22:47.000000000 +0200
9847 +++ avr32-git/include/asm-avr32/scatterlist.h   2007-06-06 11:34:11.000000000 +0200
9848 @@ -1,6 +1,8 @@
9849  #ifndef __ASM_AVR32_SCATTERLIST_H
9850  #define __ASM_AVR32_SCATTERLIST_H
9851
9852 +#include <asm/types.h>
9853 +
9854  struct scatterlist {
9855      struct page                *page;
9856      unsigned int       offset;
9857 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/setup.h avr32-git/include/asm-avr32/setup.h
9858 --- linux-2.6.21.3/include/asm-avr32/setup.h    2007-05-24 23:22:47.000000000 +0200
9859 +++ avr32-git/include/asm-avr32/setup.h 2007-06-06 11:34:11.000000000 +0200
9860 @@ -110,7 +110,7 @@
9861         int     (*parse)(struct tag *);
9862  };
9863
9864 -#define __tag __attribute_used__ __attribute__((__section__(".taglist")))
9865 +#define __tag __attribute_used__ __attribute__((__section__(".taglist.init")))
9866  #define __tagtable(tag, fn)                                            \
9867         static struct tagtable __tagtable_##fn __tag = { tag, fn }
9868
9869 @@ -124,19 +124,12 @@
9870  #define for_each_tag(t,base)                                           \
9871         for (t = base; t->hdr.size; t = tag_next(t))
9872
9873 -extern struct tag_mem_range *mem_phys;
9874 -extern struct tag_mem_range *mem_reserved;
9875 -extern struct tag_mem_range *mem_ramdisk;
9876 -
9877  extern struct tag *bootloader_tags;
9878
9879 -extern void setup_bootmem(void);
9880 -extern void setup_processor(void);
9881 -extern void board_setup_fbmem(unsigned long fbmem_start,
9882 -                             unsigned long fbmem_size);
9883 +extern resource_size_t fbmem_start;
9884 +extern resource_size_t fbmem_size;
9885
9886 -/* Chip-specific hook to enable the use of SDRAM */
9887 -void chip_enable_sdram(void);
9888 +void setup_processor(void);
9889
9890  #endif /* !__ASSEMBLY__ */
9891
9892 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/sysreg.h avr32-git/include/asm-avr32/sysreg.h
9893 --- linux-2.6.21.3/include/asm-avr32/sysreg.h   2007-05-24 23:22:47.000000000 +0200
9894 +++ avr32-git/include/asm-avr32/sysreg.h        2007-06-06 11:34:11.000000000 +0200
9895 @@ -7,326 +7,281 @@
9896   * it under the terms of the GNU General Public License version 2 as
9897   * published by the Free Software Foundation.
9898   */
9899 -#ifndef __ASM_AVR32_SYSREG_H__
9900 -#define __ASM_AVR32_SYSREG_H__
9901 +#ifndef __ASM_AVR32_SYSREG_H
9902 +#define __ASM_AVR32_SYSREG_H
9903
9904  /* sysreg register offsets */
9905 -#define SYSREG_SR                               0x0000
9906 -#define SYSREG_EVBA                             0x0004
9907 -#define SYSREG_ACBA                             0x0008
9908 -#define SYSREG_CPUCR                            0x000c
9909 -#define SYSREG_ECR                              0x0010
9910 -#define SYSREG_RSR_SUP                          0x0014
9911 -#define SYSREG_RSR_INT0                         0x0018
9912 -#define SYSREG_RSR_INT1                         0x001c
9913 -#define SYSREG_RSR_INT2                         0x0020
9914 -#define SYSREG_RSR_INT3                         0x0024
9915 -#define SYSREG_RSR_EX                           0x0028
9916 -#define SYSREG_RSR_NMI                          0x002c
9917 -#define SYSREG_RSR_DBG                          0x0030
9918 -#define SYSREG_RAR_SUP                          0x0034
9919 -#define SYSREG_RAR_INT0                         0x0038
9920 -#define SYSREG_RAR_INT1                         0x003c
9921 -#define SYSREG_RAR_INT2                         0x0040
9922 -#define SYSREG_RAR_INT3                         0x0044
9923 -#define SYSREG_RAR_EX                           0x0048
9924 -#define SYSREG_RAR_NMI                          0x004c
9925 -#define SYSREG_RAR_DBG                          0x0050
9926 -#define SYSREG_JECR                             0x0054
9927 -#define SYSREG_JOSP                             0x0058
9928 -#define SYSREG_JAVA_LV0                         0x005c
9929 -#define SYSREG_JAVA_LV1                         0x0060
9930 -#define SYSREG_JAVA_LV2                         0x0064
9931 -#define SYSREG_JAVA_LV3                         0x0068
9932 -#define SYSREG_JAVA_LV4                         0x006c
9933 -#define SYSREG_JAVA_LV5                         0x0070
9934 -#define SYSREG_JAVA_LV6                         0x0074
9935 -#define SYSREG_JAVA_LV7                         0x0078
9936 -#define SYSREG_JTBA                             0x007c
9937 -#define SYSREG_JBCR                             0x0080
9938 -#define SYSREG_CONFIG0                          0x0100
9939 -#define SYSREG_CONFIG1                          0x0104
9940 -#define SYSREG_COUNT                            0x0108
9941 -#define SYSREG_COMPARE                          0x010c
9942 -#define SYSREG_TLBEHI                           0x0110
9943 -#define SYSREG_TLBELO                           0x0114
9944 -#define SYSREG_PTBR                             0x0118
9945 -#define SYSREG_TLBEAR                           0x011c
9946 -#define SYSREG_MMUCR                            0x0120
9947 -#define SYSREG_TLBARLO                          0x0124
9948 -#define SYSREG_TLBARHI                          0x0128
9949 -#define SYSREG_PCCNT                            0x012c
9950 -#define SYSREG_PCNT0                            0x0130
9951 -#define SYSREG_PCNT1                            0x0134
9952 -#define SYSREG_PCCR                             0x0138
9953 -#define SYSREG_BEAR                             0x013c
9954 +#define SYSREG_SR                              0x0000
9955 +#define SYSREG_EVBA                            0x0004
9956 +#define SYSREG_ACBA                            0x0008
9957 +#define SYSREG_CPUCR                           0x000c
9958 +#define SYSREG_ECR                             0x0010
9959 +#define SYSREG_RSR_SUP                         0x0014
9960 +#define SYSREG_RSR_INT0                                0x0018
9961 +#define SYSREG_RSR_INT1                                0x001c
9962 +#define SYSREG_RSR_INT2                                0x0020
9963 +#define SYSREG_RSR_INT3                                0x0024
9964 +#define SYSREG_RSR_EX                          0x0028
9965 +#define SYSREG_RSR_NMI                         0x002c
9966 +#define SYSREG_RSR_DBG                         0x0030
9967 +#define SYSREG_RAR_SUP                         0x0034
9968 +#define SYSREG_RAR_INT0                                0x0038
9969 +#define SYSREG_RAR_INT1                                0x003c
9970 +#define SYSREG_RAR_INT2                                0x0040
9971 +#define SYSREG_RAR_INT3                                0x0044
9972 +#define SYSREG_RAR_EX                          0x0048
9973 +#define SYSREG_RAR_NMI                         0x004c
9974 +#define SYSREG_RAR_DBG                         0x0050
9975 +#define SYSREG_JECR                            0x0054
9976 +#define SYSREG_JOSP                            0x0058
9977 +#define SYSREG_JAVA_LV0                                0x005c
9978 +#define SYSREG_JAVA_LV1                                0x0060
9979 +#define SYSREG_JAVA_LV2                                0x0064
9980 +#define SYSREG_JAVA_LV3                                0x0068
9981 +#define SYSREG_JAVA_LV4                                0x006c
9982 +#define SYSREG_JAVA_LV5                                0x0070
9983 +#define SYSREG_JAVA_LV6                                0x0074
9984 +#define SYSREG_JAVA_LV7                                0x0078
9985 +#define SYSREG_JTBA                            0x007c
9986 +#define SYSREG_JBCR                            0x0080
9987 +#define SYSREG_CONFIG0                         0x0100
9988 +#define SYSREG_CONFIG1                         0x0104
9989 +#define SYSREG_COUNT                           0x0108
9990 +#define SYSREG_COMPARE                         0x010c
9991 +#define SYSREG_TLBEHI                          0x0110
9992 +#define SYSREG_TLBELO                          0x0114
9993 +#define SYSREG_PTBR                            0x0118
9994 +#define SYSREG_TLBEAR                          0x011c
9995 +#define SYSREG_MMUCR                           0x0120
9996 +#define SYSREG_TLBARLO                         0x0124
9997 +#define SYSREG_TLBARHI                         0x0128
9998 +#define SYSREG_PCCNT                           0x012c
9999 +#define SYSREG_PCNT0                           0x0130
10000 +#define SYSREG_PCNT1                           0x0134
10001 +#define SYSREG_PCCR                            0x0138
10002 +#define SYSREG_BEAR                            0x013c
10003 +#define SYSREG_SABAL                           0x0300
10004 +#define SYSREG_SABAH                           0x0304
10005 +#define SYSREG_SABD                            0x0308
10006
10007  /* Bitfields in SR */
10008 -#define SYSREG_SR_C_OFFSET                      0
10009 -#define SYSREG_SR_C_SIZE                        1
10010 -#define SYSREG_Z_OFFSET                         1
10011 -#define SYSREG_Z_SIZE                           1
10012 -#define SYSREG_SR_N_OFFSET                      2
10013 -#define SYSREG_SR_N_SIZE                        1
10014 -#define SYSREG_SR_V_OFFSET                      3
10015 -#define SYSREG_SR_V_SIZE                        1
10016 -#define SYSREG_Q_OFFSET                         4
10017 -#define SYSREG_Q_SIZE                           1
10018 -#define SYSREG_GM_OFFSET                        16
10019 -#define SYSREG_GM_SIZE                          1
10020 -#define SYSREG_I0M_OFFSET                       17
10021 -#define SYSREG_I0M_SIZE                         1
10022 -#define SYSREG_I1M_OFFSET                       18
10023 -#define SYSREG_I1M_SIZE                         1
10024 -#define SYSREG_I2M_OFFSET                       19
10025 -#define SYSREG_I2M_SIZE                         1
10026 -#define SYSREG_I3M_OFFSET                       20
10027 -#define SYSREG_I3M_SIZE                         1
10028 -#define SYSREG_EM_OFFSET                        21
10029 -#define SYSREG_EM_SIZE                          1
10030 -#define SYSREG_M0_OFFSET                        22
10031 -#define SYSREG_M0_SIZE                          1
10032 -#define SYSREG_M1_OFFSET                        23
10033 -#define SYSREG_M1_SIZE                          1
10034 -#define SYSREG_M2_OFFSET                        24
10035 -#define SYSREG_M2_SIZE                          1
10036 -#define SYSREG_SR_D_OFFSET                      26
10037 -#define SYSREG_SR_D_SIZE                        1
10038 -#define SYSREG_DM_OFFSET                        27
10039 -#define SYSREG_DM_SIZE                          1
10040 -#define SYSREG_SR_J_OFFSET                      28
10041 -#define SYSREG_SR_J_SIZE                        1
10042 -#define SYSREG_R_OFFSET                         29
10043 -#define SYSREG_R_SIZE                           1
10044 -#define SYSREG_H_OFFSET                         30
10045 -#define SYSREG_H_SIZE                           1
10046 -
10047 -/* Bitfields in EVBA */
10048 -
10049 -/* Bitfields in ACBA */
10050 +#define SYSREG_SR_C_OFFSET                     0
10051 +#define SYSREG_SR_C_SIZE                       1
10052 +#define SYSREG_Z_OFFSET                                1
10053 +#define SYSREG_Z_SIZE                          1
10054 +#define SYSREG_SR_N_OFFSET                     2
10055 +#define SYSREG_SR_N_SIZE                       1
10056 +#define SYSREG_SR_V_OFFSET                     3
10057 +#define SYSREG_SR_V_SIZE                       1
10058 +#define SYSREG_Q_OFFSET                                4
10059 +#define SYSREG_Q_SIZE                          1
10060 +#define SYSREG_L_OFFSET                                5
10061 +#define SYSREG_L_SIZE                          1
10062 +#define SYSREG_T_OFFSET                                14
10063 +#define SYSREG_T_SIZE                          1
10064 +#define SYSREG_SR_R_OFFSET                     15
10065 +#define SYSREG_SR_R_SIZE                       1
10066 +#define SYSREG_GM_OFFSET                       16
10067 +#define SYSREG_GM_SIZE                         1
10068 +#define SYSREG_I0M_OFFSET                      17
10069 +#define SYSREG_I0M_SIZE                                1
10070 +#define SYSREG_I1M_OFFSET                      18
10071 +#define SYSREG_I1M_SIZE                                1
10072 +#define SYSREG_I2M_OFFSET                      19
10073 +#define SYSREG_I2M_SIZE                                1
10074 +#define SYSREG_I3M_OFFSET                      20
10075 +#define SYSREG_I3M_SIZE                                1
10076 +#define SYSREG_EM_OFFSET                       21
10077 +#define SYSREG_EM_SIZE                         1
10078 +#define SYSREG_M0_OFFSET                       22
10079 +#define SYSREG_M0_SIZE                         1
10080 +#define SYSREG_M1_OFFSET                       23
10081 +#define SYSREG_M1_SIZE                         1
10082 +#define SYSREG_M2_OFFSET                       24
10083 +#define SYSREG_M2_SIZE                         1
10084 +#define SYSREG_SR_D_OFFSET                     26
10085 +#define SYSREG_SR_D_SIZE                       1
10086 +#define SYSREG_DM_OFFSET                       27
10087 +#define SYSREG_DM_SIZE                         1
10088 +#define SYSREG_SR_J_OFFSET                     28
10089 +#define SYSREG_SR_J_SIZE                       1
10090 +#define SYSREG_H_OFFSET                                29
10091 +#define SYSREG_H_SIZE                          1
10092
10093  /* Bitfields in CPUCR */
10094 -#define SYSREG_BI_OFFSET                        0
10095 -#define SYSREG_BI_SIZE                          1
10096 -#define SYSREG_BE_OFFSET                        1
10097 -#define SYSREG_BE_SIZE                          1
10098 -#define SYSREG_FE_OFFSET                        2
10099 -#define SYSREG_FE_SIZE                          1
10100 -#define SYSREG_RE_OFFSET                        3
10101 -#define SYSREG_RE_SIZE                          1
10102 -#define SYSREG_IBE_OFFSET                       4
10103 -#define SYSREG_IBE_SIZE                         1
10104 -#define SYSREG_IEE_OFFSET                       5
10105 -#define SYSREG_IEE_SIZE                         1
10106 -
10107 -/* Bitfields in ECR */
10108 -#define SYSREG_ECR_OFFSET                       0
10109 -#define SYSREG_ECR_SIZE                         32
10110 -
10111 -/* Bitfields in RSR_SUP */
10112 -
10113 -/* Bitfields in RSR_INT0 */
10114 -
10115 -/* Bitfields in RSR_INT1 */
10116 -
10117 -/* Bitfields in RSR_INT2 */
10118 -
10119 -/* Bitfields in RSR_INT3 */
10120 -
10121 -/* Bitfields in RSR_EX */
10122 -
10123 -/* Bitfields in RSR_NMI */
10124 -
10125 -/* Bitfields in RSR_DBG */
10126 -
10127 -/* Bitfields in RAR_SUP */
10128 -
10129 -/* Bitfields in RAR_INT0 */
10130 -
10131 -/* Bitfields in RAR_INT1 */
10132 -
10133 -/* Bitfields in RAR_INT2 */
10134 -
10135 -/* Bitfields in RAR_INT3 */
10136 -
10137 -/* Bitfields in RAR_EX */
10138 -
10139 -/* Bitfields in RAR_NMI */
10140 -
10141 -/* Bitfields in RAR_DBG */
10142 -
10143 -/* Bitfields in JECR */
10144 -
10145 -/* Bitfields in JOSP */
10146 -
10147 -/* Bitfields in JAVA_LV0 */
10148 -
10149 -/* Bitfields in JAVA_LV1 */
10150 -
10151 -/* Bitfields in JAVA_LV2 */
10152 -
10153 -/* Bitfields in JAVA_LV3 */
10154 -
10155 -/* Bitfields in JAVA_LV4 */
10156 -
10157 -/* Bitfields in JAVA_LV5 */
10158 -
10159 -/* Bitfields in JAVA_LV6 */
10160 -
10161 -/* Bitfields in JAVA_LV7 */
10162 -
10163 -/* Bitfields in JTBA */
10164 -
10165 -/* Bitfields in JBCR */
10166 +#define SYSREG_BI_OFFSET                       0
10167 +#define SYSREG_BI_SIZE                         1
10168 +#define SYSREG_BE_OFFSET                       1
10169 +#define SYSREG_BE_SIZE                         1
10170 +#define SYSREG_FE_OFFSET                       2
10171 +#define SYSREG_FE_SIZE                         1
10172 +#define SYSREG_RE_OFFSET                       3
10173 +#define SYSREG_RE_SIZE                         1
10174 +#define SYSREG_IBE_OFFSET                      4
10175 +#define SYSREG_IBE_SIZE                                1
10176 +#define SYSREG_IEE_OFFSET                      5
10177 +#define SYSREG_IEE_SIZE                                1
10178
10179  /* Bitfields in CONFIG0 */
10180 -#define SYSREG_CONFIG0_D_OFFSET                 1
10181 -#define SYSREG_CONFIG0_D_SIZE                   1
10182 -#define SYSREG_CONFIG0_S_OFFSET                 2
10183 -#define SYSREG_CONFIG0_S_SIZE                   1
10184 -#define SYSREG_O_OFFSET                         3
10185 -#define SYSREG_O_SIZE                           1
10186 -#define SYSREG_P_OFFSET                         4
10187 -#define SYSREG_P_SIZE                           1
10188 -#define SYSREG_CONFIG0_J_OFFSET                 5
10189 -#define SYSREG_CONFIG0_J_SIZE                   1
10190 -#define SYSREG_F_OFFSET                         6
10191 -#define SYSREG_F_SIZE                           1
10192 -#define SYSREG_MMUT_OFFSET                      7
10193 -#define SYSREG_MMUT_SIZE                        3
10194 -#define SYSREG_AR_OFFSET                        10
10195 -#define SYSREG_AR_SIZE                          3
10196 -#define SYSREG_AT_OFFSET                        13
10197 -#define SYSREG_AT_SIZE                          3
10198 -#define SYSREG_PROCESSORREVISION_OFFSET         16
10199 -#define SYSREG_PROCESSORREVISION_SIZE           8
10200 -#define SYSREG_PROCESSORID_OFFSET               24
10201 -#define SYSREG_PROCESSORID_SIZE                 8
10202 +#define SYSREG_CONFIG0_R_OFFSET                        0
10203 +#define SYSREG_CONFIG0_R_SIZE                  1
10204 +#define SYSREG_CONFIG0_D_OFFSET                        1
10205 +#define SYSREG_CONFIG0_D_SIZE                  1
10206 +#define SYSREG_CONFIG0_S_OFFSET                        2
10207 +#define SYSREG_CONFIG0_S_SIZE                  1
10208 +#define SYSREG_CONFIG0_O_OFFSET                        3
10209 +#define SYSREG_CONFIG0_O_SIZE                  1
10210 +#define SYSREG_CONFIG0_P_OFFSET                        4
10211 +#define SYSREG_CONFIG0_P_SIZE                  1
10212 +#define SYSREG_CONFIG0_J_OFFSET                        5
10213 +#define SYSREG_CONFIG0_J_SIZE                  1
10214 +#define SYSREG_CONFIG0_F_OFFSET                        6
10215 +#define SYSREG_CONFIG0_F_SIZE                  1
10216 +#define SYSREG_MMUT_OFFSET                     7
10217 +#define SYSREG_MMUT_SIZE                       3
10218 +#define SYSREG_AR_OFFSET                       10
10219 +#define SYSREG_AR_SIZE                         3
10220 +#define SYSREG_AT_OFFSET                       13
10221 +#define SYSREG_AT_SIZE                         3
10222 +#define SYSREG_PROCESSORREVISION_OFFSET                16
10223 +#define SYSREG_PROCESSORREVISION_SIZE          8
10224 +#define SYSREG_PROCESSORID_OFFSET              24
10225 +#define SYSREG_PROCESSORID_SIZE                        8
10226
10227  /* Bitfields in CONFIG1 */
10228 -#define SYSREG_DASS_OFFSET                      0
10229 -#define SYSREG_DASS_SIZE                        3
10230 -#define SYSREG_DLSZ_OFFSET                      3
10231 -#define SYSREG_DLSZ_SIZE                        3
10232 -#define SYSREG_DSET_OFFSET                      6
10233 -#define SYSREG_DSET_SIZE                        4
10234 -#define SYSREG_IASS_OFFSET                      10
10235 -#define SYSREG_IASS_SIZE                        2
10236 -#define SYSREG_ILSZ_OFFSET                      13
10237 -#define SYSREG_ILSZ_SIZE                        3
10238 -#define SYSREG_ISET_OFFSET                      16
10239 -#define SYSREG_ISET_SIZE                        4
10240 -#define SYSREG_DMMUSZ_OFFSET                    20
10241 -#define SYSREG_DMMUSZ_SIZE                      6
10242 -#define SYSREG_IMMUSZ_OFFSET                    26
10243 -#define SYSREG_IMMUSZ_SIZE                      6
10244 -
10245 -/* Bitfields in COUNT */
10246 -
10247 -/* Bitfields in COMPARE */
10248 +#define SYSREG_DASS_OFFSET                     0
10249 +#define SYSREG_DASS_SIZE                       3
10250 +#define SYSREG_DLSZ_OFFSET                     3
10251 +#define SYSREG_DLSZ_SIZE                       3
10252 +#define SYSREG_DSET_OFFSET                     6
10253 +#define SYSREG_DSET_SIZE                       4
10254 +#define SYSREG_IASS_OFFSET                     10
10255 +#define SYSREG_IASS_SIZE                       3
10256 +#define SYSREG_ILSZ_OFFSET                     13
10257 +#define SYSREG_ILSZ_SIZE                       3
10258 +#define SYSREG_ISET_OFFSET                     16
10259 +#define SYSREG_ISET_SIZE                       4
10260 +#define SYSREG_DMMUSZ_OFFSET                   20
10261 +#define SYSREG_DMMUSZ_SIZE                     6
10262 +#define SYSREG_IMMUSZ_OFFSET                   26
10263 +#define SYSREG_IMMUSZ_SIZE                     6
10264
10265  /* Bitfields in TLBEHI */
10266 -#define SYSREG_ASID_OFFSET                      0
10267 -#define SYSREG_ASID_SIZE                        8
10268 -#define SYSREG_TLBEHI_I_OFFSET                  8
10269 -#define SYSREG_TLBEHI_I_SIZE                    1
10270 -#define SYSREG_TLBEHI_V_OFFSET                  9
10271 -#define SYSREG_TLBEHI_V_SIZE                    1
10272 -#define SYSREG_VPN_OFFSET                       10
10273 -#define SYSREG_VPN_SIZE                         22
10274 +#define SYSREG_ASID_OFFSET                     0
10275 +#define SYSREG_ASID_SIZE                       8
10276 +#define SYSREG_TLBEHI_I_OFFSET                 8
10277 +#define SYSREG_TLBEHI_I_SIZE                   1
10278 +#define SYSREG_TLBEHI_V_OFFSET                 9
10279 +#define SYSREG_TLBEHI_V_SIZE                   1
10280 +#define SYSREG_VPN_OFFSET                      10
10281 +#define SYSREG_VPN_SIZE                                22
10282
10283  /* Bitfields in TLBELO */
10284 -#define SYSREG_W_OFFSET                         0
10285 -#define SYSREG_W_SIZE                           1
10286 -#define SYSREG_TLBELO_D_OFFSET                  1
10287 -#define SYSREG_TLBELO_D_SIZE                    1
10288 -#define SYSREG_SZ_OFFSET                        2
10289 -#define SYSREG_SZ_SIZE                          2
10290 -#define SYSREG_AP_OFFSET                        4
10291 -#define SYSREG_AP_SIZE                          3
10292 -#define SYSREG_B_OFFSET                         7
10293 -#define SYSREG_B_SIZE                           1
10294 -#define SYSREG_G_OFFSET                         8
10295 -#define SYSREG_G_SIZE                           1
10296 -#define SYSREG_TLBELO_C_OFFSET                  9
10297 -#define SYSREG_TLBELO_C_SIZE                    1
10298 -#define SYSREG_PFN_OFFSET                       10
10299 -#define SYSREG_PFN_SIZE                         22
10300 -
10301 -/* Bitfields in PTBR */
10302 -
10303 -/* Bitfields in TLBEAR */
10304 +#define SYSREG_W_OFFSET                                0
10305 +#define SYSREG_W_SIZE                          1
10306 +#define SYSREG_TLBELO_D_OFFSET                 1
10307 +#define SYSREG_TLBELO_D_SIZE                   1
10308 +#define SYSREG_SZ_OFFSET                       2
10309 +#define SYSREG_SZ_SIZE                         2
10310 +#define SYSREG_AP_OFFSET                       4
10311 +#define SYSREG_AP_SIZE                         3
10312 +#define SYSREG_B_OFFSET                                7
10313 +#define SYSREG_B_SIZE                          1
10314 +#define SYSREG_G_OFFSET                                8
10315 +#define SYSREG_G_SIZE                          1
10316 +#define SYSREG_TLBELO_C_OFFSET                 9
10317 +#define SYSREG_TLBELO_C_SIZE                   1
10318 +#define SYSREG_PFN_OFFSET                      10
10319 +#define SYSREG_PFN_SIZE                                22
10320
10321  /* Bitfields in MMUCR */
10322 -#define SYSREG_E_OFFSET                         0
10323 -#define SYSREG_E_SIZE                           1
10324 -#define SYSREG_M_OFFSET                         1
10325 -#define SYSREG_M_SIZE                           1
10326 -#define SYSREG_MMUCR_I_OFFSET                   2
10327 -#define SYSREG_MMUCR_I_SIZE                     1
10328 -#define SYSREG_MMUCR_N_OFFSET                   3
10329 -#define SYSREG_MMUCR_N_SIZE                     1
10330 -#define SYSREG_MMUCR_S_OFFSET                   4
10331 -#define SYSREG_MMUCR_S_SIZE                     1
10332 -#define SYSREG_DLA_OFFSET                       8
10333 -#define SYSREG_DLA_SIZE                         6
10334 -#define SYSREG_DRP_OFFSET                       14
10335 -#define SYSREG_DRP_SIZE                         6
10336 -#define SYSREG_ILA_OFFSET                       20
10337 -#define SYSREG_ILA_SIZE                         6
10338 -#define SYSREG_IRP_OFFSET                       26
10339 -#define SYSREG_IRP_SIZE                         6
10340 -
10341 -/* Bitfields in TLBARLO */
10342 -
10343 -/* Bitfields in TLBARHI */
10344 -
10345 -/* Bitfields in PCCNT */
10346 -
10347 -/* Bitfields in PCNT0 */
10348 -
10349 -/* Bitfields in PCNT1 */
10350 +#define SYSREG_E_OFFSET                                0
10351 +#define SYSREG_E_SIZE                          1
10352 +#define SYSREG_M_OFFSET                                1
10353 +#define SYSREG_M_SIZE                          1
10354 +#define SYSREG_MMUCR_I_OFFSET                  2
10355 +#define SYSREG_MMUCR_I_SIZE                    1
10356 +#define SYSREG_MMUCR_N_OFFSET                  3
10357 +#define SYSREG_MMUCR_N_SIZE                    1
10358 +#define SYSREG_MMUCR_S_OFFSET                  4
10359 +#define SYSREG_MMUCR_S_SIZE                    1
10360 +#define SYSREG_DLA_OFFSET                      8
10361 +#define SYSREG_DLA_SIZE                                6
10362 +#define SYSREG_DRP_OFFSET                      14
10363 +#define SYSREG_DRP_SIZE                                6
10364 +#define SYSREG_ILA_OFFSET                      20
10365 +#define SYSREG_ILA_SIZE                                6
10366 +#define SYSREG_IRP_OFFSET                      26
10367 +#define SYSREG_IRP_SIZE                                6
10368
10369  /* Bitfields in PCCR */
10370 -
10371 -/* Bitfields in BEAR */
10372 +#define SYSREG_PCCR_R_OFFSET                   1
10373 +#define SYSREG_PCCR_R_SIZE                     1
10374 +#define SYSREG_PCCR_C_OFFSET                   2
10375 +#define SYSREG_PCCR_C_SIZE                     1
10376 +#define SYSREG_PCCR_S_OFFSET                   3
10377 +#define SYSREG_PCCR_S_SIZE                     1
10378 +#define SYSREG_IEC_OFFSET                      4
10379 +#define SYSREG_IEC_SIZE                                1
10380 +#define SYSREG_IE0_OFFSET                      5
10381 +#define SYSREG_IE0_SIZE                                1
10382 +#define SYSREG_IE1_OFFSET                      6
10383 +#define SYSREG_IE1_SIZE                                1
10384 +#define SYSREG_FC_OFFSET                       8
10385 +#define SYSREG_FC_SIZE                         1
10386 +#define SYSREG_F0_OFFSET                       9
10387 +#define SYSREG_F0_SIZE                         1
10388 +#define SYSREG_F1_OFFSET                       10
10389 +#define SYSREG_F1_SIZE                         1
10390 +#define SYSREG_CONF0_OFFSET                    12
10391 +#define SYSREG_CONF0_SIZE                      6
10392 +#define SYSREG_CONF1_OFFSET                    18
10393 +#define SYSREG_CONF1_SIZE                      6
10394
10395  /* Constants for ECR */
10396 -#define ECR_UNRECOVERABLE                       0
10397 -#define ECR_TLB_MULTIPLE                        1
10398 -#define ECR_BUS_ERROR_WRITE                     2
10399 -#define ECR_BUS_ERROR_READ                      3
10400 -#define ECR_NMI                                 4
10401 -#define ECR_ADDR_ALIGN_X                        5
10402 -#define ECR_PROTECTION_X                        6
10403 -#define ECR_DEBUG                               7
10404 -#define ECR_ILLEGAL_OPCODE                      8
10405 -#define ECR_UNIMPL_INSTRUCTION                  9
10406 -#define ECR_PRIVILEGE_VIOLATION                 10
10407 -#define ECR_FPE                                 11
10408 -#define ECR_COPROC_ABSENT                       12
10409 -#define ECR_ADDR_ALIGN_R                        13
10410 -#define ECR_ADDR_ALIGN_W                        14
10411 -#define ECR_PROTECTION_R                        15
10412 -#define ECR_PROTECTION_W                        16
10413 -#define ECR_DTLB_MODIFIED                       17
10414 -#define ECR_TLB_MISS_X                          20
10415 -#define ECR_TLB_MISS_R                          24
10416 -#define ECR_TLB_MISS_W                          28
10417 +#define ECR_UNRECOVERABLE                      0
10418 +#define ECR_TLB_MULTIPLE                       1
10419 +#define ECR_BUS_ERROR_WRITE                    2
10420 +#define ECR_BUS_ERROR_READ                     3
10421 +#define ECR_NMI                                        4
10422 +#define ECR_ADDR_ALIGN_X                       5
10423 +#define ECR_PROTECTION_X                       6
10424 +#define ECR_DEBUG                              7
10425 +#define ECR_ILLEGAL_OPCODE                     8
10426 +#define ECR_UNIMPL_INSTRUCTION                 9
10427 +#define ECR_PRIVILEGE_VIOLATION                        10
10428 +#define ECR_FPE                                        11
10429 +#define ECR_COPROC_ABSENT                      12
10430 +#define ECR_ADDR_ALIGN_R                       13
10431 +#define ECR_ADDR_ALIGN_W                       14
10432 +#define ECR_PROTECTION_R                       15
10433 +#define ECR_PROTECTION_W                       16
10434 +#define ECR_DTLB_MODIFIED                      17
10435 +#define ECR_TLB_MISS_X                         20
10436 +#define ECR_TLB_MISS_R                         24
10437 +#define ECR_TLB_MISS_W                         28
10438
10439  /* Bit manipulation macros */
10440 -#define SYSREG_BIT(name)                        (1 << SYSREG_##name##_OFFSET)
10441 -#define SYSREG_BF(name,value)                   (((value) & ((1 << SYSREG_##name##_SIZE) - 1)) << SYSREG_##name##_OFFSET)
10442 -#define SYSREG_BFEXT(name,value)                (((value) >> SYSREG_##name##_OFFSET) & ((1 << SYSREG_##name##_SIZE) - 1))
10443 -#define SYSREG_BFINS(name,value,old)            (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1) << SYSREG_##name##_OFFSET)) | SYSREG_BF(name,value))
10444 +#define SYSREG_BIT(name)                               \
10445 +       (1 << SYSREG_##name##_OFFSET)
10446 +#define SYSREG_BF(name,value)                          \
10447 +       (((value) & ((1 << SYSREG_##name##_SIZE) - 1))  \
10448 +        << SYSREG_##name##_OFFSET)
10449 +#define SYSREG_BFEXT(name,value)\
10450 +       (((value) >> SYSREG_##name##_OFFSET)            \
10451 +        & ((1 << SYSREG_##name##_SIZE) - 1))
10452 +#define SYSREG_BFINS(name,value,old)                   \
10453 +       (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1)   \
10454 +                   << SYSREG_##name##_OFFSET))         \
10455 +        | SYSREG_BF(name,value))
10456
10457 +/* Register access macros */
10458  #ifdef __CHECKER__
10459  extern unsigned long __builtin_mfsr(unsigned long reg);
10460  extern void __builtin_mtsr(unsigned long reg, unsigned long value);
10461  #endif
10462
10463 -/* Register access macros */
10464 -#define sysreg_read(reg)                        __builtin_mfsr(SYSREG_##reg)
10465 -#define sysreg_write(reg, value)                __builtin_mtsr(SYSREG_##reg, value)
10466 +#define sysreg_read(reg)               __builtin_mfsr(SYSREG_##reg)
10467 +#define sysreg_write(reg, value)       __builtin_mtsr(SYSREG_##reg, value)
10468
10469 -#endif /* __ASM_AVR32_SYSREG_H__ */
10470 +#endif /* __ASM_AVR32_SYSREG_H */
10471 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/system.h avr32-git/include/asm-avr32/system.h
10472 --- linux-2.6.21.3/include/asm-avr32/system.h   2007-05-24 23:22:47.000000000 +0200
10473 +++ avr32-git/include/asm-avr32/system.h        2007-06-06 11:34:11.000000000 +0200
10474 @@ -9,6 +9,7 @@
10475  #define __ASM_AVR32_SYSTEM_H
10476
10477  #include <linux/compiler.h>
10478 +#include <linux/linkage.h>
10479  #include <linux/types.h>
10480
10481  #include <asm/ptrace.h>
10482 @@ -140,15 +141,9 @@
10483                                    sizeof(*(ptr))))
10484
10485  struct pt_regs;
10486 -extern void __die(const char *, struct pt_regs *, unsigned long,
10487 -                 const char *, const char *, unsigned long);
10488 -extern void __die_if_kernel(const char *, struct pt_regs *, unsigned long,
10489 -                           const char *, const char *, unsigned long);
10490 -
10491 -#define die(msg, regs, err)                                    \
10492 -       __die(msg, regs, err, __FILE__ ":", __FUNCTION__, __LINE__)
10493 -#define die_if_kernel(msg, regs, err)                                  \
10494 -       __die_if_kernel(msg, regs, err, __FILE__ ":", __FUNCTION__, __LINE__)
10495 +void NORET_TYPE die(const char *str, struct pt_regs *regs, long err);
10496 +void _exception(long signr, struct pt_regs *regs, int code,
10497 +               unsigned long addr);
10498
10499  #define arch_align_stack(x)    (x)
10500
10501 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/thread_info.h avr32-git/include/asm-avr32/thread_info.h
10502 --- linux-2.6.21.3/include/asm-avr32/thread_info.h      2007-05-24 23:22:47.000000000 +0200
10503 +++ avr32-git/include/asm-avr32/thread_info.h   2007-06-06 11:34:11.000000000 +0200
10504 @@ -83,6 +83,7 @@
10505  #define TIF_SINGLE_STEP                6       /* single step after next break */
10506  #define TIF_MEMDIE             7
10507  #define TIF_RESTORE_SIGMASK    8       /* restore signal mask in do_signal */
10508 +#define TIF_CPU_GOING_TO_SLEEP 9       /* CPU is entering sleep 0 mode */
10509  #define TIF_USERSPACE          31      /* true if FS sets userspace */
10510
10511  #define _TIF_SYSCALL_TRACE     (1 << TIF_SYSCALL_TRACE)
10512 @@ -94,6 +95,7 @@
10513  #define _TIF_SINGLE_STEP       (1 << TIF_SINGLE_STEP)
10514  #define _TIF_MEMDIE            (1 << TIF_MEMDIE)
10515  #define _TIF_RESTORE_SIGMASK   (1 << TIF_RESTORE_SIGMASK)
10516 +#define _TIF_CPU_GOING_TO_SLEEP (1 << TIF_CPU_GOING_TO_SLEEP)
10517
10518  /* XXX: These two masks must never span more than 16 bits! */
10519  /* work to do on interrupt/exception return */
10520 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/uaccess.h avr32-git/include/asm-avr32/uaccess.h
10521 --- linux-2.6.21.3/include/asm-avr32/uaccess.h  2007-05-24 23:22:47.000000000 +0200
10522 +++ avr32-git/include/asm-avr32/uaccess.h       2007-06-06 11:34:11.000000000 +0200
10523 @@ -181,24 +181,23 @@
10524
10525  #define __get_user_nocheck(x, ptr, size)                               \
10526  ({                                                                     \
10527 -       typeof(*(ptr)) __gu_val = (typeof(*(ptr)) __force)0;            \
10528 +       unsigned long __gu_val = 0;                                     \
10529         int __gu_err = 0;                                               \
10530                                                                         \
10531         switch (size) {                                                 \
10532         case 1: __get_user_asm("ub", __gu_val, ptr, __gu_err); break;   \
10533         case 2: __get_user_asm("uh", __gu_val, ptr, __gu_err); break;   \
10534         case 4: __get_user_asm("w", __gu_val, ptr, __gu_err); break;    \
10535 -       case 8: __get_user_asm("d", __gu_val, ptr, __gu_err); break;    \
10536         default: __gu_err = __get_user_bad(); break;                    \
10537         }                                                               \
10538                                                                         \
10539 -       x = __gu_val;                                                   \
10540 +       x = (typeof(*(ptr)))__gu_val;                                   \
10541         __gu_err;                                                       \
10542  })
10543
10544  #define __get_user_check(x, ptr, size)                                 \
10545  ({                                                                     \
10546 -       typeof(*(ptr)) __gu_val = (typeof(*(ptr)) __force)0;            \
10547 +       unsigned long __gu_val = 0;                                     \
10548         const typeof(*(ptr)) __user * __gu_addr = (ptr);                \
10549         int __gu_err = 0;                                               \
10550                                                                         \
10551 @@ -216,10 +215,6 @@
10552                         __get_user_asm("w", __gu_val, __gu_addr,        \
10553                                        __gu_err);                       \
10554                         break;                                          \
10555 -               case 8:                                                 \
10556 -                       __get_user_asm("d", __gu_val, __gu_addr,        \
10557 -                                      __gu_err);                       \
10558 -                       break;                                          \
10559                 default:                                                \
10560                         __gu_err = __get_user_bad();                    \
10561                         break;                                          \
10562 @@ -227,7 +222,7 @@
10563         } else {                                                        \
10564                 __gu_err = -EFAULT;                                     \
10565         }                                                               \
10566 -       x = __gu_val;                                                   \
10567 +       x = (typeof(*(ptr)))__gu_val;                                   \
10568         __gu_err;                                                       \
10569  })
10570
10571 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-avr32/unaligned.h avr32-git/include/asm-avr32/unaligned.h
10572 --- linux-2.6.21.3/include/asm-avr32/unaligned.h        2007-05-24 23:22:47.000000000 +0200
10573 +++ avr32-git/include/asm-avr32/unaligned.h     2007-06-06 11:34:11.000000000 +0200
10574 @@ -6,20 +6,31 @@
10575   * implementation.  The AVR32 AP implementation can handle unaligned
10576   * words, but halfwords must be halfword-aligned, and doublewords must
10577   * be word-aligned.
10578 - *
10579 - * TODO: Make all this CPU-specific and optimize.
10580   */
10581
10582 -#include <linux/string.h>
10583 +#include <asm-generic/unaligned.h>
10584
10585 -/* Use memmove here, so gcc does not insert a __builtin_memcpy. */
10586 +#ifdef CONFIG_CPU_AT32AP7000
10587
10588 +/* REVISIT calling memmove() may be smaller for 64-bit values ... */
10589 +
10590 +#undef get_unaligned
10591  #define get_unaligned(ptr) \
10592 -  ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
10593 +       ___get_unaligned(ptr, sizeof((*ptr)))
10594 +#define ___get_unaligned(ptr, size) \
10595 +       ((size == 4) ? *(ptr) : __get_unaligned(ptr, size))
10596 +
10597 +#undef put_unaligned
10598 +#define put_unaligned(val, ptr) \
10599 +       ___put_unaligned((__u64)(val), ptr, sizeof((*ptr)))
10600 +#define ___put_unaligned(val, ptr, size)               \
10601 +do {                                                   \
10602 +       if (size == 4)                                  \
10603 +               *(ptr) = (val);                         \
10604 +       else                                            \
10605 +               __put_unaligned(val, ptr, size);        \
10606 +} while (0)
10607
10608 -#define put_unaligned(val, ptr)                                \
10609 -  ({ __typeof__(*(ptr)) __tmp = (val);                 \
10610 -     memmove((ptr), &__tmp, sizeof(*(ptr)));           \
10611 -     (void)0; })
10612 +#endif
10613
10614  #endif /* __ASM_AVR32_UNALIGNED_H */
10615 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-frv/pgtable.h avr32-git/include/asm-frv/pgtable.h
10616 --- linux-2.6.21.3/include/asm-frv/pgtable.h    2007-05-24 23:22:47.000000000 +0200
10617 +++ avr32-git/include/asm-frv/pgtable.h 2007-06-06 11:34:11.000000000 +0200
10618 @@ -509,10 +509,6 @@
10619  #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)                \
10620                 remap_pfn_range(vma, vaddr, pfn, size, prot)
10621
10622 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10623 -#define GET_IOSPACE(pfn)               0
10624 -#define GET_PFN(pfn)                   (pfn)
10625 -
10626  #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
10627  #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
10628  #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
10629 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-frv/scatterlist.h avr32-git/include/asm-frv/scatterlist.h
10630 --- linux-2.6.21.3/include/asm-frv/scatterlist.h        2007-05-24 23:22:47.000000000 +0200
10631 +++ avr32-git/include/asm-frv/scatterlist.h     2007-06-06 11:34:11.000000000 +0200
10632 @@ -1,6 +1,8 @@
10633  #ifndef _ASM_SCATTERLIST_H
10634  #define _ASM_SCATTERLIST_H
10635
10636 +#include <asm/types.h>
10637 +
10638  /*
10639   * Drivers must set either ->address or (preferred) ->page and ->offset
10640   * to indicate where data must be transferred to/from.
10641 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-h8300/pgtable.h avr32-git/include/asm-h8300/pgtable.h
10642 --- linux-2.6.21.3/include/asm-h8300/pgtable.h  2007-05-24 23:22:47.000000000 +0200
10643 +++ avr32-git/include/asm-h8300/pgtable.h       2007-06-06 11:34:12.000000000 +0200
10644 @@ -55,10 +55,6 @@
10645  #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)                \
10646                 remap_pfn_range(vma, vaddr, pfn, size, prot)
10647
10648 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10649 -#define GET_IOSPACE(pfn)               0
10650 -#define GET_PFN(pfn)                   (pfn)
10651 -
10652  /*
10653   * All 32bit addresses are effectively valid for vmalloc...
10654   * Sort of meaningless for non-VM targets.
10655 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-h8300/scatterlist.h avr32-git/include/asm-h8300/scatterlist.h
10656 --- linux-2.6.21.3/include/asm-h8300/scatterlist.h      2007-05-24 23:22:47.000000000 +0200
10657 +++ avr32-git/include/asm-h8300/scatterlist.h   2007-06-06 11:34:12.000000000 +0200
10658 @@ -1,6 +1,8 @@
10659  #ifndef _H8300_SCATTERLIST_H
10660  #define _H8300_SCATTERLIST_H
10661
10662 +#include <asm/types.h>
10663 +
10664  struct scatterlist {
10665         struct page     *page;
10666         unsigned int    offset;
10667 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-i386/pgtable.h avr32-git/include/asm-i386/pgtable.h
10668 --- linux-2.6.21.3/include/asm-i386/pgtable.h   2007-05-24 23:22:47.000000000 +0200
10669 +++ avr32-git/include/asm-i386/pgtable.h        2007-06-06 11:34:12.000000000 +0200
10670 @@ -519,10 +519,6 @@
10671  #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)                \
10672                 remap_pfn_range(vma, vaddr, pfn, size, prot)
10673
10674 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10675 -#define GET_IOSPACE(pfn)               0
10676 -#define GET_PFN(pfn)                   (pfn)
10677 -
10678  #include <asm-generic/pgtable.h>
10679
10680  #endif /* _I386_PGTABLE_H */
10681 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-i386/scatterlist.h avr32-git/include/asm-i386/scatterlist.h
10682 --- linux-2.6.21.3/include/asm-i386/scatterlist.h       2007-05-24 23:22:47.000000000 +0200
10683 +++ avr32-git/include/asm-i386/scatterlist.h    2007-06-06 11:34:12.000000000 +0200
10684 @@ -1,6 +1,8 @@
10685  #ifndef _I386_SCATTERLIST_H
10686  #define _I386_SCATTERLIST_H
10687
10688 +#include <asm/types.h>
10689 +
10690  struct scatterlist {
10691      struct page                *page;
10692      unsigned int       offset;
10693 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-ia64/pgtable.h avr32-git/include/asm-ia64/pgtable.h
10694 --- linux-2.6.21.3/include/asm-ia64/pgtable.h   2007-05-24 23:22:47.000000000 +0200
10695 +++ avr32-git/include/asm-ia64/pgtable.h        2007-06-06 11:34:12.000000000 +0200
10696 @@ -485,10 +485,6 @@
10697  #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)                \
10698                 remap_pfn_range(vma, vaddr, pfn, size, prot)
10699
10700 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10701 -#define GET_IOSPACE(pfn)               0
10702 -#define GET_PFN(pfn)                   (pfn)
10703 -
10704  /*
10705   * ZERO_PAGE is a global shared page that is always zero: used
10706   * for zero-mapped memory areas etc..
10707 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-ia64/scatterlist.h avr32-git/include/asm-ia64/scatterlist.h
10708 --- linux-2.6.21.3/include/asm-ia64/scatterlist.h       2007-05-24 23:22:47.000000000 +0200
10709 +++ avr32-git/include/asm-ia64/scatterlist.h    2007-06-06 11:34:12.000000000 +0200
10710 @@ -6,6 +6,8 @@
10711   *     David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
10712   */
10713
10714 +#include <asm/types.h>
10715 +
10716  struct scatterlist {
10717         struct page *page;
10718         unsigned int offset;
10719 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-m32r/pgtable.h avr32-git/include/asm-m32r/pgtable.h
10720 --- linux-2.6.21.3/include/asm-m32r/pgtable.h   2007-05-24 23:22:47.000000000 +0200
10721 +++ avr32-git/include/asm-m32r/pgtable.h        2007-06-06 11:34:12.000000000 +0200
10722 @@ -381,10 +381,6 @@
10723  #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)        \
10724                 remap_pfn_range(vma, vaddr, pfn, size, prot)
10725
10726 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10727 -#define GET_IOSPACE(pfn)               0
10728 -#define GET_PFN(pfn)                   (pfn)
10729 -
10730  #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
10731  #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
10732  #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
10733 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-m32r/scatterlist.h avr32-git/include/asm-m32r/scatterlist.h
10734 --- linux-2.6.21.3/include/asm-m32r/scatterlist.h       2007-05-24 23:22:47.000000000 +0200
10735 +++ avr32-git/include/asm-m32r/scatterlist.h    2007-06-06 11:34:12.000000000 +0200
10736 @@ -1,6 +1,8 @@
10737  #ifndef _ASM_M32R_SCATTERLIST_H
10738  #define _ASM_M32R_SCATTERLIST_H
10739
10740 +#include <asm/types.h>
10741 +
10742  struct scatterlist {
10743      char *  address;    /* Location data is to be transferred to, NULL for
10744                           * highmem page */
10745 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-m68k/pgtable.h avr32-git/include/asm-m68k/pgtable.h
10746 --- linux-2.6.21.3/include/asm-m68k/pgtable.h   2007-05-24 23:22:47.000000000 +0200
10747 +++ avr32-git/include/asm-m68k/pgtable.h        2007-06-06 11:34:12.000000000 +0200
10748 @@ -143,10 +143,6 @@
10749  #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)                \
10750                 remap_pfn_range(vma, vaddr, pfn, size, prot)
10751
10752 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10753 -#define GET_IOSPACE(pfn)               0
10754 -#define GET_PFN(pfn)                   (pfn)
10755 -
10756  /* MMU-specific headers */
10757
10758  #ifdef CONFIG_SUN3
10759 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-m68knommu/pgtable.h avr32-git/include/asm-m68knommu/pgtable.h
10760 --- linux-2.6.21.3/include/asm-m68knommu/pgtable.h      2007-05-24 23:22:47.000000000 +0200
10761 +++ avr32-git/include/asm-m68knommu/pgtable.h   2007-06-06 11:34:12.000000000 +0200
10762 @@ -59,10 +59,6 @@
10763  #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)                \
10764                 remap_pfn_range(vma, vaddr, pfn, size, prot)
10765
10766 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10767 -#define GET_IOSPACE(pfn)               0
10768 -#define GET_PFN(pfn)                   (pfn)
10769 -
10770  /*
10771   * All 32bit addresses are effectively valid for vmalloc...
10772   * Sort of meaningless for non-VM targets.
10773 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-m68knommu/scatterlist.h avr32-git/include/asm-m68knommu/scatterlist.h
10774 --- linux-2.6.21.3/include/asm-m68knommu/scatterlist.h  2007-05-24 23:22:47.000000000 +0200
10775 +++ avr32-git/include/asm-m68knommu/scatterlist.h       2007-06-06 11:34:12.000000000 +0200
10776 @@ -2,6 +2,7 @@
10777  #define _M68KNOMMU_SCATTERLIST_H
10778
10779  #include <linux/mm.h>
10780 +#include <asm/types.h>
10781
10782  struct scatterlist {
10783         struct page     *page;
10784 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-mips/pgtable.h avr32-git/include/asm-mips/pgtable.h
10785 --- linux-2.6.21.3/include/asm-mips/pgtable.h   2007-05-24 23:22:47.000000000 +0200
10786 +++ avr32-git/include/asm-mips/pgtable.h        2007-06-06 11:34:12.000000000 +0200
10787 @@ -387,10 +387,6 @@
10788                 remap_pfn_range(vma, vaddr, pfn, size, prot)
10789  #endif
10790
10791 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10792 -#define GET_IOSPACE(pfn)               0
10793 -#define GET_PFN(pfn)                   (pfn)
10794 -
10795  #include <asm-generic/pgtable.h>
10796
10797  /*
10798 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-mips/scatterlist.h avr32-git/include/asm-mips/scatterlist.h
10799 --- linux-2.6.21.3/include/asm-mips/scatterlist.h       2007-05-24 23:22:47.000000000 +0200
10800 +++ avr32-git/include/asm-mips/scatterlist.h    2007-06-06 11:34:12.000000000 +0200
10801 @@ -1,6 +1,8 @@
10802  #ifndef __ASM_SCATTERLIST_H
10803  #define __ASM_SCATTERLIST_H
10804
10805 +#include <asm/types.h>
10806 +
10807  struct scatterlist {
10808         struct page *   page;
10809         unsigned int    offset;
10810 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-parisc/pgtable.h avr32-git/include/asm-parisc/pgtable.h
10811 --- linux-2.6.21.3/include/asm-parisc/pgtable.h 2007-05-24 23:22:47.000000000 +0200
10812 +++ avr32-git/include/asm-parisc/pgtable.h      2007-06-06 11:34:12.000000000 +0200
10813 @@ -528,10 +528,6 @@
10814
10815  #define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_NO_CACHE)
10816
10817 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10818 -#define GET_IOSPACE(pfn)               0
10819 -#define GET_PFN(pfn)                   (pfn)
10820 -
10821  /* We provide our own get_unmapped_area to provide cache coherency */
10822
10823  #define HAVE_ARCH_UNMAPPED_AREA
10824 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-parisc/scatterlist.h avr32-git/include/asm-parisc/scatterlist.h
10825 --- linux-2.6.21.3/include/asm-parisc/scatterlist.h     2007-05-24 23:22:47.000000000 +0200
10826 +++ avr32-git/include/asm-parisc/scatterlist.h  2007-06-06 11:34:12.000000000 +0200
10827 @@ -2,6 +2,7 @@
10828  #define _ASM_PARISC_SCATTERLIST_H
10829
10830  #include <asm/page.h>
10831 +#include <asm/types.h>
10832
10833  struct scatterlist {
10834         struct page *page;
10835 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-ppc/pgtable.h avr32-git/include/asm-ppc/pgtable.h
10836 --- linux-2.6.21.3/include/asm-ppc/pgtable.h    2007-05-24 23:22:47.000000000 +0200
10837 +++ avr32-git/include/asm-ppc/pgtable.h 2007-06-06 11:34:13.000000000 +0200
10838 @@ -827,10 +827,6 @@
10839                 remap_pfn_range(vma, vaddr, pfn, size, prot)
10840  #endif
10841
10842 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10843 -#define GET_IOSPACE(pfn)               0
10844 -#define GET_PFN(pfn)                   (pfn)
10845 -
10846  /*
10847   * No page table caches to initialise
10848   */
10849 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-sh/pgtable.h avr32-git/include/asm-sh/pgtable.h
10850 --- linux-2.6.21.3/include/asm-sh/pgtable.h     2007-05-24 23:22:47.000000000 +0200
10851 +++ avr32-git/include/asm-sh/pgtable.h  2007-06-06 11:34:13.000000000 +0200
10852 @@ -568,10 +568,6 @@
10853  #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)                \
10854                 remap_pfn_range(vma, vaddr, pfn, size, prot)
10855
10856 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10857 -#define GET_IOSPACE(pfn)               0
10858 -#define GET_PFN(pfn)                   (pfn)
10859 -
10860  struct mm_struct;
10861
10862  /*
10863 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-sh/scatterlist.h avr32-git/include/asm-sh/scatterlist.h
10864 --- linux-2.6.21.3/include/asm-sh/scatterlist.h 2007-05-24 23:22:47.000000000 +0200
10865 +++ avr32-git/include/asm-sh/scatterlist.h      2007-06-06 11:34:13.000000000 +0200
10866 @@ -1,6 +1,8 @@
10867  #ifndef __ASM_SH_SCATTERLIST_H
10868  #define __ASM_SH_SCATTERLIST_H
10869
10870 +#include <asm/types.h>
10871 +
10872  struct scatterlist {
10873      struct page * page; /* Location for highmem page, if any */
10874      unsigned int offset;/* for highmem, page offset */
10875 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-sh64/pgtable.h avr32-git/include/asm-sh64/pgtable.h
10876 --- linux-2.6.21.3/include/asm-sh64/pgtable.h   2007-05-24 23:22:47.000000000 +0200
10877 +++ avr32-git/include/asm-sh64/pgtable.h        2007-06-06 11:34:13.000000000 +0200
10878 @@ -485,10 +485,6 @@
10879  #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)                \
10880                 remap_pfn_range(vma, vaddr, pfn, size, prot)
10881
10882 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10883 -#define GET_IOSPACE(pfn)               0
10884 -#define GET_PFN(pfn)                   (pfn)
10885 -
10886  #endif /* !__ASSEMBLY__ */
10887
10888  /*
10889 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-sh64/scatterlist.h avr32-git/include/asm-sh64/scatterlist.h
10890 --- linux-2.6.21.3/include/asm-sh64/scatterlist.h       2007-05-24 23:22:47.000000000 +0200
10891 +++ avr32-git/include/asm-sh64/scatterlist.h    2007-06-06 11:34:13.000000000 +0200
10892 @@ -11,6 +11,8 @@
10893  #ifndef __ASM_SH64_SCATTERLIST_H
10894  #define __ASM_SH64_SCATTERLIST_H
10895
10896 +#include <asm/types.h>
10897 +
10898  struct scatterlist {
10899      struct page * page; /* Location for highmem page, if any */
10900      unsigned int offset;/* for highmem, page offset */
10901 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-sparc64/scatterlist.h avr32-git/include/asm-sparc64/scatterlist.h
10902 --- linux-2.6.21.3/include/asm-sparc64/scatterlist.h    2007-05-24 23:22:47.000000000 +0200
10903 +++ avr32-git/include/asm-sparc64/scatterlist.h 2007-06-06 11:34:13.000000000 +0200
10904 @@ -3,6 +3,7 @@
10905  #define _SPARC64_SCATTERLIST_H
10906
10907  #include <asm/page.h>
10908 +#include <asm/types.h>
10909
10910  struct scatterlist {
10911         struct page     *page;
10912 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-v850/scatterlist.h avr32-git/include/asm-v850/scatterlist.h
10913 --- linux-2.6.21.3/include/asm-v850/scatterlist.h       2007-05-24 23:22:47.000000000 +0200
10914 +++ avr32-git/include/asm-v850/scatterlist.h    2007-06-06 11:34:13.000000000 +0200
10915 @@ -14,6 +14,8 @@
10916  #ifndef __V850_SCATTERLIST_H__
10917  #define __V850_SCATTERLIST_H__
10918
10919 +#include <asm/types.h>
10920 +
10921  struct scatterlist {
10922         struct page     *page;
10923         unsigned        offset;
10924 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-x86_64/pgtable.h avr32-git/include/asm-x86_64/pgtable.h
10925 --- linux-2.6.21.3/include/asm-x86_64/pgtable.h 2007-05-24 23:22:47.000000000 +0200
10926 +++ avr32-git/include/asm-x86_64/pgtable.h      2007-06-06 11:34:13.000000000 +0200
10927 @@ -413,10 +413,6 @@
10928  #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)                \
10929                 remap_pfn_range(vma, vaddr, pfn, size, prot)
10930
10931 -#define MK_IOSPACE_PFN(space, pfn)     (pfn)
10932 -#define GET_IOSPACE(pfn)               0
10933 -#define GET_PFN(pfn)                   (pfn)
10934 -
10935  #define HAVE_ARCH_UNMAPPED_AREA
10936
10937  #define pgtable_cache_init()   do { } while (0)
10938 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-x86_64/scatterlist.h avr32-git/include/asm-x86_64/scatterlist.h
10939 --- linux-2.6.21.3/include/asm-x86_64/scatterlist.h     2007-05-24 23:22:47.000000000 +0200
10940 +++ avr32-git/include/asm-x86_64/scatterlist.h  2007-06-06 11:34:13.000000000 +0200
10941 @@ -1,6 +1,8 @@
10942  #ifndef _X8664_SCATTERLIST_H
10943  #define _X8664_SCATTERLIST_H
10944
10945 +#include <asm/types.h>
10946 +
10947  struct scatterlist {
10948      struct page                *page;
10949      unsigned int       offset;
10950 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/asm-xtensa/scatterlist.h avr32-git/include/asm-xtensa/scatterlist.h
10951 --- linux-2.6.21.3/include/asm-xtensa/scatterlist.h     2007-05-24 23:22:47.000000000 +0200
10952 +++ avr32-git/include/asm-xtensa/scatterlist.h  2007-06-06 11:34:13.000000000 +0200
10953 @@ -11,6 +11,8 @@
10954  #ifndef _XTENSA_SCATTERLIST_H
10955  #define _XTENSA_SCATTERLIST_H
10956
10957 +#include <asm/types.h>
10958 +
10959  struct scatterlist {
10960         struct page     *page;
10961         unsigned int    offset;
10962 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/linux/fb.h avr32-git/include/linux/fb.h
10963 --- linux-2.6.21.3/include/linux/fb.h   2007-05-24 23:22:47.000000000 +0200
10964 +++ avr32-git/include/linux/fb.h        2007-06-06 11:34:13.000000000 +0200
10965 @@ -833,7 +833,7 @@
10966  #define fb_writeq sbus_writeq
10967  #define fb_memset sbus_memset_io
10968
10969 -#elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || defined(__hppa__) || (defined(__sh__) && !defined(__SH5__)) || defined(__powerpc__)
10970 +#elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || defined(__hppa__) || (defined(__sh__) && !defined(__SH5__)) || defined(__powerpc__) || defined(__avr32__)
10971
10972  #define fb_readb __raw_readb
10973  #define fb_readw __raw_readw
10974 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/linux/i2c-gpio.h avr32-git/include/linux/i2c-gpio.h
10975 --- linux-2.6.21.3/include/linux/i2c-gpio.h     1970-01-01 01:00:00.000000000 +0100
10976 +++ avr32-git/include/linux/i2c-gpio.h  2007-06-06 11:34:13.000000000 +0200
10977 @@ -0,0 +1,38 @@
10978 +/*
10979 + * i2c-gpio interface to platform code
10980 + *
10981 + * Copyright (C) 2007 Atmel Corporation
10982 + *
10983 + * This program is free software; you can redistribute it and/or modify
10984 + * it under the terms of the GNU General Public License version 2 as
10985 + * published by the Free Software Foundation.
10986 + */
10987 +#ifndef _LINUX_I2C_GPIO_H
10988 +#define _LINUX_I2C_GPIO_H
10989 +
10990 +/**
10991 + * struct i2c_gpio_platform_data - Platform-dependent data for i2c-gpio
10992 + * @sda_pin: GPIO pin ID to use for SDA
10993 + * @scl_pin: GPIO pin ID to use for SCL
10994 + * @udelay: signal toggle delay. SCL frequency is (500 / udelay) kHz
10995 + * @timeout: clock stretching timeout in jiffies. If the slave keeps
10996 + *     SCL low for longer than this, the transfer will time out.
10997 + * @sda_is_open_drain: SDA is configured as open drain, i.e. the pin
10998 + *     isn't actively driven high when setting the output value high.
10999 + *     gpio_get_value() must return the actual pin state even if the
11000 + *     pin is configured as an output.
11001 + * @scl_is_open_drain: SCL is set up as open drain. Same requirements
11002 + *     as for sda_is_open_drain apply.
11003 + * @scl_is_output_only: SCL output drivers cannot be turned off.
11004 + */
11005 +struct i2c_gpio_platform_data {
11006 +       unsigned int    sda_pin;
11007 +       unsigned int    scl_pin;
11008 +       int             udelay;
11009 +       int             timeout;
11010 +       unsigned int    sda_is_open_drain:1;
11011 +       unsigned int    scl_is_open_drain:1;
11012 +       unsigned int    scl_is_output_only:1;
11013 +};
11014 +
11015 +#endif /* _LINUX_I2C_GPIO_H */
11016 diff -Nur -x .gitignore -x .git linux-2.6.21.3/include/video/atmel_lcdc.h avr32-git/include/video/atmel_lcdc.h
11017 --- linux-2.6.21.3/include/video/atmel_lcdc.h   1970-01-01 01:00:00.000000000 +0100
11018 +++ avr32-git/include/video/atmel_lcdc.h        2007-06-06 11:34:13.000000000 +0200
11019 @@ -0,0 +1,196 @@
11020 +/*
11021 + *  Header file for AT91/AT32 LCD Controller
11022 + *
11023 + *  Data structure and register user interface
11024 + *
11025 + *  Copyright (C) 2007 Atmel Corporation
11026 + *
11027 + * This program is free software; you can redistribute it and/or modify
11028 + * it under the terms of the GNU General Public License as published by
11029 + * the Free Software Foundation; either version 2 of the License, or
11030 + * (at your option) any later version.
11031 + *
11032 + * This program is distributed in the hope that it will be useful,
11033 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
11034 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11035 + * GNU General Public License for more details.
11036 + *
11037 + * You should have received a copy of the GNU General Public License
11038 + * along with this program; if not, write to the Free Software
11039 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
11040 + */
11041 +#ifndef __ATMEL_LCDC_H__
11042 +#define __ATMEL_LCDC_H__
11043 +
11044 + /* LCD Controller info data structure */
11045 +struct atmel_lcdfb_info {
11046 +       spinlock_t              lock;
11047 +       struct fb_info          *info;
11048 +       void __iomem            *mmio;
11049 +       unsigned long           irq_base;
11050 +
11051 +       unsigned int            guard_time;
11052 +       struct platform_device  *pdev;
11053 +       struct clk              *bus_clk;
11054 +       struct clk              *lcdc_clk;
11055 +       unsigned int            default_bpp;
11056 +       unsigned int            default_lcdcon2;
11057 +       unsigned int            default_dmacon;
11058 +       void (*atmel_lcdfb_power_control)(int on);
11059 +       struct fb_monspecs      *default_monspecs;
11060 +       u32                     pseudo_palette[16];
11061 +};
11062 +
11063 +#define ATMEL_LCDC_DMABADDR1   0x00
11064 +#define ATMEL_LCDC_DMABADDR2   0x04
11065 +#define ATMEL_LCDC_DMAFRMPT1   0x08
11066 +#define ATMEL_LCDC_DMAFRMPT2   0x0c
11067 +#define ATMEL_LCDC_DMAFRMADD1  0x10
11068 +#define ATMEL_LCDC_DMAFRMADD2  0x14
11069 +
11070 +#define ATMEL_LCDC_DMAFRMCFG   0x18
11071 +#define        ATMEL_LCDC_FRSIZE       (0x7fffff <<  0)
11072 +#define        ATMEL_LCDC_BLENGTH_OFFSET       24
11073 +#define        ATMEL_LCDC_BLENGTH      (0x7f     << ATMEL_LCDC_BLENGTH_OFFSET)
11074 +
11075 +#define ATMEL_LCDC_DMACON      0x1c
11076 +#define        ATMEL_LCDC_DMAEN        (0x1 << 0)
11077 +#define        ATMEL_LCDC_DMARST       (0x1 << 1)
11078 +#define        ATMEL_LCDC_DMABUSY      (0x1 << 2)
11079 +#define                ATMEL_LCDC_DMAUPDT      (0x1 << 3)
11080 +#define                ATMEL_LCDC_DMA2DEN      (0x1 << 4)
11081 +
11082 +#define ATMEL_LCDC_DMA2DCFG    0x20
11083 +#define                ATMEL_LCDC_ADDRINC_OFFSET       0
11084 +#define                ATMEL_LCDC_ADDRINC              (0xffff)
11085 +#define                ATMEL_LCDC_PIXELOFF_OFFSET      24
11086 +#define                ATMEL_LCDC_PIXELOFF             (0x1f << 24)
11087 +
11088 +#define ATMEL_LCDC_LCDCON1     0x0800
11089 +#define        ATMEL_LCDC_BYPASS       (1     <<  0)
11090 +#define        ATMEL_LCDC_CLKVAL_OFFSET        12
11091 +#define        ATMEL_LCDC_CLKVAL       (0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
11092 +#define        ATMEL_LCDC_LINCNT       (0x7ff << 21)
11093 +
11094 +#define ATMEL_LCDC_LCDCON2     0x0804
11095 +#define        ATMEL_LCDC_DISTYPE      (3 << 0)
11096 +#define                ATMEL_LCDC_DISTYPE_STNMONO      (0 << 0)
11097 +#define                ATMEL_LCDC_DISTYPE_STNCOLOR     (1 << 0)
11098 +#define                ATMEL_LCDC_DISTYPE_TFT          (2 << 0)
11099 +#define        ATMEL_LCDC_SCANMOD      (1 << 2)
11100 +#define                ATMEL_LCDC_SCANMOD_SINGLE       (0 << 2)
11101 +#define                ATMEL_LCDC_SCANMOD_DUAL         (1 << 2)
11102 +#define        ATMEL_LCDC_IFWIDTH      (3 << 3)
11103 +#define                ATMEL_LCDC_IFWIDTH_4            (0 << 3)
11104 +#define                ATMEL_LCDC_IFWIDTH_8            (1 << 3)
11105 +#define                ATMEL_LCDC_IFWIDTH_16           (2 << 3)
11106 +#define        ATMEL_LCDC_PIXELSIZE    (7 << 5)
11107 +#define                ATMEL_LCDC_PIXELSIZE_1          (0 << 5)
11108 +#define                ATMEL_LCDC_PIXELSIZE_2          (1 << 5)
11109 +#define                ATMEL_LCDC_PIXELSIZE_4          (2 << 5)
11110 +#define                ATMEL_LCDC_PIXELSIZE_8          (3 << 5)
11111 +#define                ATMEL_LCDC_PIXELSIZE_16         (4 << 5)
11112 +#define                ATMEL_LCDC_PIXELSIZE_24         (5 << 5)
11113 +#define                ATMEL_LCDC_PIXELSIZE_32         (6 << 5)
11114 +#define        ATMEL_LCDC_INVVD        (1 << 8)
11115 +#define                ATMEL_LCDC_INVVD_NORMAL         (0 << 8)
11116 +#define                ATMEL_LCDC_INVVD_INVERTED       (1 << 8)
11117 +#define        ATMEL_LCDC_INVFRAME     (1 << 9 )
11118 +#define                ATMEL_LCDC_INVFRAME_NORMAL      (0 << 9)
11119 +#define                ATMEL_LCDC_INVFRAME_INVERTED    (1 << 9)
11120 +#define        ATMEL_LCDC_INVLINE      (1 << 10)
11121 +#define                ATMEL_LCDC_INVLINE_NORMAL       (0 << 10)
11122 +#define                ATMEL_LCDC_INVLINE_INVERTED     (1 << 10)
11123 +#define        ATMEL_LCDC_INVCLK       (1 << 11)
11124 +#define                ATMEL_LCDC_INVCLK_NORMAL        (0 << 11)
11125 +#define                ATMEL_LCDC_INVCLK_INVERTED      (1 << 11)
11126 +#define        ATMEL_LCDC_INVDVAL      (1 << 12)
11127 +#define                ATMEL_LCDC_INVDVAL_NORMAL       (0 << 12)
11128 +#define                ATMEL_LCDC_INVDVAL_INVERTED     (1 << 12)
11129 +#define        ATMEL_LCDC_CLKMOD       (1 << 15)
11130 +#define                ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15)
11131 +#define                ATMEL_LCDC_CLKMOD_ALWAYSACTIVE  (1 << 15)
11132 +#define        ATMEL_LCDC_MEMOR        (1 << 31)
11133 +#define                ATMEL_LCDC_MEMOR_BIG            (0 << 31)
11134 +#define                ATMEL_LCDC_MEMOR_LITTLE         (1 << 31)
11135 +
11136 +#define ATMEL_LCDC_TIM1                0x0808
11137 +#define        ATMEL_LCDC_VFP          (0xff <<  0)
11138 +#define        ATMEL_LCDC_VBP_OFFSET           8
11139 +#define        ATMEL_LCDC_VBP          (0xff <<  ATMEL_LCDC_VBP_OFFSET)
11140 +#define        ATMEL_LCDC_VPW_OFFSET           16
11141 +#define        ATMEL_LCDC_VPW          (0x3f << ATMEL_LCDC_VPW_OFFSET)
11142 +#define        ATMEL_LCDC_VHDLY_OFFSET         24
11143 +#define        ATMEL_LCDC_VHDLY        (0xf  << ATMEL_LCDC_VHDLY_OFFSET)
11144 +
11145 +#define ATMEL_LCDC_TIM2                0x080c
11146 +#define        ATMEL_LCDC_HBP          (0xff  <<  0)
11147 +#define        ATMEL_LCDC_HPW_OFFSET           8
11148 +#define        ATMEL_LCDC_HPW          (0x3f  <<  ATMEL_LCDC_HPW_OFFSET)
11149 +#define        ATMEL_LCDC_HFP_OFFSET           21
11150 +#define        ATMEL_LCDC_HFP          (0x7ff << ATMEL_LCDC_HFP_OFFSET)
11151 +
11152 +#define ATMEL_LCDC_LCDFRMCFG   0x0810
11153 +#define        ATMEL_LCDC_LINEVAL      (0x7ff <<  0)
11154 +#define        ATMEL_LCDC_HOZVAL_OFFSET        21
11155 +#define        ATMEL_LCDC_HOZVAL       (0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)
11156 +
11157 +#define ATMEL_LCDC_FIFO                0x0814
11158 +#define        ATMEL_LCDC_FIFOTH       (0xffff)
11159 +
11160 +#define ATMEL_LCDC_MVAL                0x0818
11161 +
11162 +#define ATMEL_LCDC_DP1_2       0x081c
11163 +#define ATMEL_LCDC_DP4_7       0x0820
11164 +#define ATMEL_LCDC_DP3_5       0x0824
11165 +#define ATMEL_LCDC_DP2_3       0x0828
11166 +#define ATMEL_LCDC_DP5_7       0x082c
11167 +#define ATMEL_LCDC_DP3_4       0x0830
11168 +#define ATMEL_LCDC_DP4_5       0x0834
11169 +#define ATMEL_LCDC_DP6_7       0x0838
11170 +#define        ATMEL_LCDC_DP1_2_VAL    (0xff)
11171 +#define        ATMEL_LCDC_DP4_7_VAL    (0xfffffff)
11172 +#define        ATMEL_LCDC_DP3_5_VAL    (0xfffff)
11173 +#define        ATMEL_LCDC_DP2_3_VAL    (0xfff)
11174 +#define        ATMEL_LCDC_DP5_7_VAL    (0xfffffff)
11175 +#define        ATMEL_LCDC_DP3_4_VAL    (0xffff)
11176 +#define        ATMEL_LCDC_DP4_5_VAL    (0xfffff)
11177 +#define        ATMEL_LCDC_DP6_7_VAL    (0xfffffff)
11178 +
11179 +#define ATMEL_LCDC_PWRCON      0x083c
11180 +#define        ATMEL_LCDC_PWR          (1    <<  0)
11181 +#define        ATMEL_LCDC_GUARDT_OFFSET        1
11182 +#define        ATMEL_LCDC_GUARDT       (0x7f <<  ATMEL_LCDC_GUARDT_OFFSET)
11183 +#define        ATMEL_LCDC_BUSY         (1    << 31)
11184 +
11185 +#define ATMEL_LCDC_CONTRAST_CTR        0x0840
11186 +#define        ATMEL_LCDC_PS           (3 << 0)
11187 +#define                ATMEL_LCDC_PS_DIV1              (0 << 0)
11188 +#define                ATMEL_LCDC_PS_DIV2              (1 << 0)
11189 +#define                ATMEL_LCDC_PS_DIV4              (2 << 0)
11190 +#define                ATMEL_LCDC_PS_DIV8              (3 << 0)
11191 +#define        ATMEL_LCDC_POL          (1 << 2)
11192 +#define                ATMEL_LCDC_POL_NEGATIVE         (0 << 2)
11193 +#define                ATMEL_LCDC_POL_POSITIVE         (1 << 2)
11194 +#define        ATMEL_LCDC_ENA          (1 << 3)
11195 +#define                ATMEL_LCDC_ENA_PWMDISABLE       (0 << 3)
11196 +#define                ATMEL_LCDC_ENA_PWMENABLE        (1 << 3)
11197 +
11198 +#define ATMEL_LCDC_CONTRAST_VAL        0x0844
11199 +#define        ATMEL_LCDC_CVAL (0xff)
11200 +
11201 +#define ATMEL_LCDC_IER         0x0848
11202 +#define ATMEL_LCDC_IDR         0x084c
11203 +#define ATMEL_LCDC_IMR         0x0850
11204 +#define ATMEL_LCDC_ISR         0x0854
11205 +#define ATMEL_LCDC_ICR         0x0858
11206 +#define        ATMEL_LCDC_LNI          (1 << 0)
11207 +#define        ATMEL_LCDC_LSTLNI       (1 << 1)
11208 +#define        ATMEL_LCDC_EOFI         (1 << 2)
11209 +#define        ATMEL_LCDC_UFLWI        (1 << 4)
11210 +#define        ATMEL_LCDC_OWRI         (1 << 5)
11211 +#define        ATMEL_LCDC_MERI         (1 << 6)
11212 +
11213 +#define ATMEL_LCDC_LUT(n)      (0x0c00 + ((n)*4))
11214 +
11215 +#endif /* __ATMEL_LCDC_H__ */
11216 diff -Nur -x .gitignore -x .git linux-2.6.21.3/MAINTAINERS avr32-git/MAINTAINERS
11217 --- linux-2.6.21.3/MAINTAINERS  2007-05-24 23:22:47.000000000 +0200
11218 +++ avr32-git/MAINTAINERS       2007-06-06 11:33:46.000000000 +0200
11219 @@ -1434,6 +1434,11 @@
11220  W:     http://www.icp-vortex.com/
11221  S:     Supported
11222
11223 +GENERIC GPIO I2C DRIVER
11224 +P:     Haavard Skinnemoen
11225 +M:     hskinnemoen@atmel.com
11226 +S:     Supported
11227 +
11228  GENERIC HDLC DRIVER, N2, C101, PCI200SYN and WANXL DRIVERS
11229  P:     Krzysztof Halasa
11230  M:     khc@pm.waw.pl
11231 diff -Nur -x .gitignore -x .git linux-2.6.21.3/scripts/checkstack.pl avr32-git/scripts/checkstack.pl
11232 --- linux-2.6.21.3/scripts/checkstack.pl        2007-05-24 23:22:47.000000000 +0200
11233 +++ avr32-git/scripts/checkstack.pl     2007-06-06 11:34:14.000000000 +0200
11234 @@ -12,6 +12,7 @@
11235  #      sh64 port by Paul Mundt
11236  #      Random bits by Matt Mackall <mpm@selenic.com>
11237  #      M68k port by Geert Uytterhoeven and Andreas Schwab
11238 +#      AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com>
11239  #
11240  #      Usage:
11241  #      objdump -d vmlinux | stackcheck.pl [arch]
11242 @@ -37,6 +38,10 @@
11243         if ($arch eq 'arm') {
11244                 #c0008ffc:      e24dd064        sub     sp, sp, #100    ; 0x64
11245                 $re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
11246 +       } elsif ($arch eq 'avr32') {
11247 +               #8000008a:       20 1d           sub sp,4
11248 +               #80000ca8:       fa cd 05 b0     sub sp,sp,1456
11249 +               $re = qr/^.*sub.*sp.*,([0-9]{1,8})/o;
11250         } elsif ($arch =~ /^i[3456]86$/) {
11251                 #c0105234:       81 ec ac 05 00 00       sub    $0x5ac,%esp
11252                 $re = qr/^.*[as][du][db]    \$(0x$x{1,8}),\%esp$/o;