2 +++ b/src/syscall-m68k.h
4 +#define __NR_io_setup 241
5 +#define __NR_io_destroy 242
6 +#define __NR_io_getevents 243
7 +#define __NR_io_submit 244
8 +#define __NR_io_cancel 245
10 +#define io_syscall1(type,fname,sname,atype,a) \
11 +type fname(atype a) \
13 +register long __res __asm__ ("%d0") = __NR_##sname; \
14 +register long __a __asm__ ("%d1") = (long)(a); \
15 +__asm__ __volatile__ ("trap #0" \
18 +return (type) __res; \
21 +#define io_syscall2(type,fname,sname,atype,a,btype,b) \
22 +type fname(atype a,btype b) \
24 +register long __res __asm__ ("%d0") = __NR_##sname; \
25 +register long __a __asm__ ("%d1") = (long)(a); \
26 +register long __b __asm__ ("%d2") = (long)(b); \
27 +__asm__ __volatile__ ("trap #0" \
29 + : "d" (__a), "d" (__b) \
31 +return (type) __res; \
34 +#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \
35 +type fname(atype a,btype b,ctype c) \
37 +register long __res __asm__ ("%d0") = __NR_##sname; \
38 +register long __a __asm__ ("%d1") = (long)(a); \
39 +register long __b __asm__ ("%d2") = (long)(b); \
40 +register long __c __asm__ ("%d3") = (long)(c); \
41 +__asm__ __volatile__ ("trap #0" \
43 + : "d" (__a), "d" (__b), \
46 +return (type) __res; \
49 +#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \
50 +type fname (atype a, btype b, ctype c, dtype d) \
52 +register long __res __asm__ ("%d0") = __NR_##sname; \
53 +register long __a __asm__ ("%d1") = (long)(a); \
54 +register long __b __asm__ ("%d2") = (long)(b); \
55 +register long __c __asm__ ("%d3") = (long)(c); \
56 +register long __d __asm__ ("%d4") = (long)(d); \
57 +__asm__ __volatile__ ("trap #0" \
59 + : "d" (__a), "d" (__b), \
60 + "d" (__c), "d" (__d) \
62 +return (type) __res; \
65 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
66 +type fname (atype a,btype b,ctype c,dtype d,etype e) \
68 +register long __res __asm__ ("%d0") = __NR_##sname; \
69 +register long __a __asm__ ("%d1") = (long)(a); \
70 +register long __b __asm__ ("%d2") = (long)(b); \
71 +register long __c __asm__ ("%d3") = (long)(c); \
72 +register long __d __asm__ ("%d4") = (long)(d); \
73 +register long __e __asm__ ("%d5") = (long)(e); \
74 +__asm__ __volatile__ ("trap #0" \
76 + : "d" (__a), "d" (__b), \
77 + "d" (__c), "d" (__d), "d" (__e) \
79 +return (type) __res; \
83 +++ b/src/syscall-sparc.h
85 +/* $Id: unistd.h,v 1.74 2002/02/08 03:57:18 davem Exp $ */
88 + * System calls under the Sparc.
90 + * Don't be scared by the ugly clobbers, it is the only way I can
91 + * think of right now to force the arguments into fixed registers
92 + * before the trap into the system call with gcc 'asm' statements.
94 + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
96 + * SunOS compatibility based upon preliminary work which is:
98 + * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
102 +#define __NR_io_setup 268
103 +#define __NR_io_destroy 269
104 +#define __NR_io_submit 270
105 +#define __NR_io_cancel 271
106 +#define __NR_io_getevents 272
109 +#define io_syscall1(type,fname,sname,type1,arg1) \
110 +type fname(type1 arg1) \
113 +register long __g1 __asm__ ("g1") = __NR_##sname; \
114 +register long __o0 __asm__ ("o0") = (long)(arg1); \
115 +__asm__ __volatile__ ("t 0x10\n\t" \
117 + "mov %%o0, %0\n\t" \
118 + "sub %%g0, %%o0, %0\n\t" \
120 + : "=r" (__res), "=&r" (__o0) \
121 + : "1" (__o0), "r" (__g1) \
123 +if (__res < -255 || __res >= 0) \
124 + return (type) __res; \
128 +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
129 +type fname(type1 arg1,type2 arg2) \
132 +register long __g1 __asm__ ("g1") = __NR_##sname; \
133 +register long __o0 __asm__ ("o0") = (long)(arg1); \
134 +register long __o1 __asm__ ("o1") = (long)(arg2); \
135 +__asm__ __volatile__ ("t 0x10\n\t" \
137 + "mov %%o0, %0\n\t" \
138 + "sub %%g0, %%o0, %0\n\t" \
140 + : "=r" (__res), "=&r" (__o0) \
141 + : "1" (__o0), "r" (__o1), "r" (__g1) \
143 +if (__res < -255 || __res >= 0) \
144 + return (type) __res; \
148 +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
149 +type fname(type1 arg1,type2 arg2,type3 arg3) \
152 +register long __g1 __asm__ ("g1") = __NR_##sname; \
153 +register long __o0 __asm__ ("o0") = (long)(arg1); \
154 +register long __o1 __asm__ ("o1") = (long)(arg2); \
155 +register long __o2 __asm__ ("o2") = (long)(arg3); \
156 +__asm__ __volatile__ ("t 0x10\n\t" \
158 + "mov %%o0, %0\n\t" \
159 + "sub %%g0, %%o0, %0\n\t" \
161 + : "=r" (__res), "=&r" (__o0) \
162 + : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__g1) \
164 +if (__res < -255 || __res>=0) \
165 + return (type) __res; \
169 +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
170 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
173 +register long __g1 __asm__ ("g1") = __NR_##sname; \
174 +register long __o0 __asm__ ("o0") = (long)(arg1); \
175 +register long __o1 __asm__ ("o1") = (long)(arg2); \
176 +register long __o2 __asm__ ("o2") = (long)(arg3); \
177 +register long __o3 __asm__ ("o3") = (long)(arg4); \
178 +__asm__ __volatile__ ("t 0x10\n\t" \
180 + "mov %%o0, %0\n\t" \
181 + "sub %%g0, %%o0, %0\n\t" \
183 + : "=r" (__res), "=&r" (__o0) \
184 + : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__g1) \
186 +if (__res < -255 || __res>=0) \
187 + return (type) __res; \
191 +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
193 +type fname(type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \
196 +register long __g1 __asm__ ("g1") = __NR_##sname; \
197 +register long __o0 __asm__ ("o0") = (long)(arg1); \
198 +register long __o1 __asm__ ("o1") = (long)(arg2); \
199 +register long __o2 __asm__ ("o2") = (long)(arg3); \
200 +register long __o3 __asm__ ("o3") = (long)(arg4); \
201 +register long __o4 __asm__ ("o4") = (long)(arg5); \
202 +__asm__ __volatile__ ("t 0x10\n\t" \
204 + "mov %%o0, %0\n\t" \
205 + "sub %%g0, %%o0, %0\n\t" \
207 + : "=r" (__res), "=&r" (__o0) \
208 + : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__o4), "r" (__g1) \
210 +if (__res < -255 || __res>=0) \
211 + return (type) __res; \
218 #include "syscall-s390.h"
219 #elif defined(__alpha__)
220 #include "syscall-alpha.h"
221 +#elif defined(__arm__)
222 +#include "syscall-arm.h"
223 +#elif defined(__m68k__)
224 +#include "syscall-m68k.h"
225 +#elif defined(__sparc__)
226 +#include "syscall-sparc.h"
227 +#elif defined(__hppa__)
228 +#include "syscall-parisc.h"
229 +#elif defined(__mips__)
230 +#include "syscall-mips.h"
232 #error "add syscall-arch.h"
235 +++ b/src/syscall-mips.h
238 + * This file is subject to the terms and conditions of the GNU General Public
239 + * License. See the file "COPYING" in the main directory of this archive
240 + * for more details.
242 + * Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle
243 + * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
245 + * Changed system calls macros _syscall5 - _syscall7 to push args 5 to 7 onto
246 + * the stack. Robin Farine for ACN S.A, Copyright (C) 1996 by ACN S.A
249 +#ifndef _MIPS_SIM_ABI32
250 +#define _MIPS_SIM_ABI32 1
251 +#define _MIPS_SIM_NABI32 2
252 +#define _MIPS_SIM_ABI64 3
255 +#if _MIPS_SIM == _MIPS_SIM_ABI32
258 + * Linux o32 style syscalls are in the range from 4000 to 4999.
260 +#define __NR_Linux 4000
261 +#define __NR_io_setup (__NR_Linux + 241)
262 +#define __NR_io_destroy (__NR_Linux + 242)
263 +#define __NR_io_getevents (__NR_Linux + 243)
264 +#define __NR_io_submit (__NR_Linux + 244)
265 +#define __NR_io_cancel (__NR_Linux + 245)
267 +#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
269 +#if _MIPS_SIM == _MIPS_SIM_ABI64
272 + * Linux 64-bit syscalls are in the range from 5000 to 5999.
274 +#define __NR_Linux 5000
275 +#define __NR_io_setup (__NR_Linux + 200)
276 +#define __NR_io_destroy (__NR_Linux + 201)
277 +#define __NR_io_getevents (__NR_Linux + 202)
278 +#define __NR_io_submit (__NR_Linux + 203)
279 +#define __NR_io_cancel (__NR_Linux + 204)
280 +#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
282 +#if _MIPS_SIM == _MIPS_SIM_NABI32
285 + * Linux N32 syscalls are in the range from 6000 to 6999.
287 +#define __NR_Linux 6000
288 +#define __NR_io_setup (__NR_Linux + 200)
289 +#define __NR_io_destroy (__NR_Linux + 201)
290 +#define __NR_io_getevents (__NR_Linux + 202)
291 +#define __NR_io_submit (__NR_Linux + 203)
292 +#define __NR_io_cancel (__NR_Linux + 204)
293 +#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
295 +#define io_syscall1(type,fname,sname,atype,a) \
296 +type fname(atype a) \
298 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
299 + register unsigned long __a3 asm("$7"); \
300 + unsigned long __v0; \
302 + __asm__ volatile ( \
303 + ".set\tnoreorder\n\t" \
304 + "li\t$2, %3\t\t\t# " #fname "\n\t" \
306 + "move\t%0, $2\n\t" \
308 + : "=&r" (__v0), "=r" (__a3) \
309 + : "r" (__a0), "i" (__NR_##sname) \
310 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
314 + return (type) __v0; \
315 + return (type) -1; \
318 +#define io_syscall2(type,fname,sname,atype,a,btype,b) \
319 +type fname(atype a, btype b) \
321 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
322 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
323 + register unsigned long __a3 asm("$7"); \
324 + unsigned long __v0; \
326 + __asm__ volatile ( \
327 + ".set\tnoreorder\n\t" \
328 + "li\t$2, %4\t\t\t# " #fname "\n\t" \
330 + "move\t%0, $2\n\t" \
332 + : "=&r" (__v0), "=r" (__a3) \
333 + : "r" (__a0), "r" (__a1), "i" (__NR_##sname) \
334 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
338 + return (type) __v0; \
339 + return (type) -1; \
342 +#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \
343 +type fname(atype a, btype b, ctype c) \
345 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
346 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
347 + register unsigned long __a2 asm("$6") = (unsigned long) c; \
348 + register unsigned long __a3 asm("$7"); \
349 + unsigned long __v0; \
351 + __asm__ volatile ( \
352 + ".set\tnoreorder\n\t" \
353 + "li\t$2, %5\t\t\t# " #fname "\n\t" \
355 + "move\t%0, $2\n\t" \
357 + : "=&r" (__v0), "=r" (__a3) \
358 + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \
359 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
363 + return (type) __v0; \
364 + return (type) -1; \
367 +#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \
368 +type fname(atype a, btype b, ctype c, dtype d) \
370 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
371 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
372 + register unsigned long __a2 asm("$6") = (unsigned long) c; \
373 + register unsigned long __a3 asm("$7") = (unsigned long) d; \
374 + unsigned long __v0; \
376 + __asm__ volatile ( \
377 + ".set\tnoreorder\n\t" \
378 + "li\t$2, %5\t\t\t# " #fname "\n\t" \
380 + "move\t%0, $2\n\t" \
382 + : "=&r" (__v0), "+r" (__a3) \
383 + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \
384 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
388 + return (type) __v0; \
389 + return (type) -1; \
392 +#if (_MIPS_SIM == _MIPS_SIM_ABI32)
395 + * Using those means your brain needs more than an oil change ;-)
398 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
399 +type fname(atype a, btype b, ctype c, dtype d, etype e) \
401 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
402 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
403 + register unsigned long __a2 asm("$6") = (unsigned long) c; \
404 + register unsigned long __a3 asm("$7") = (unsigned long) d; \
405 + unsigned long __v0; \
407 + __asm__ volatile ( \
408 + ".set\tnoreorder\n\t" \
410 + "subu\t$29, 32\n\t" \
411 + "sw\t$2, 16($29)\n\t" \
412 + "li\t$2, %5\t\t\t# " #fname "\n\t" \
414 + "move\t%0, $2\n\t" \
415 + "addiu\t$29, 32\n\t" \
417 + : "=&r" (__v0), "+r" (__a3) \
418 + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname), \
419 + "m" ((unsigned long)e) \
420 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
424 + return (type) __v0; \
425 + return (type) -1; \
428 +#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
430 +#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
432 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
433 +type fname (atype a,btype b,ctype c,dtype d,etype e) \
435 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
436 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
437 + register unsigned long __a2 asm("$6") = (unsigned long) c; \
438 + register unsigned long __a3 asm("$7") = (unsigned long) d; \
439 + register unsigned long __a4 asm("$8") = (unsigned long) e; \
440 + unsigned long __v0; \
442 + __asm__ volatile ( \
443 + ".set\tnoreorder\n\t" \
444 + "li\t$2, %6\t\t\t# " #fname "\n\t" \
446 + "move\t%0, $2\n\t" \
448 + : "=&r" (__v0), "+r" (__a3) \
449 + : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##sname) \
450 + : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
454 + return (type) __v0; \
455 + return (type) -1; \
458 +#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
462 @@ -73,6 +73,40 @@ typedef enum io_iocb_cmd {
463 #define PADDED(x, y) unsigned y; x
464 #define PADDEDptr(x, y) unsigned y; x
465 #define PADDEDul(x, y) unsigned y; unsigned long x
466 +#elif defined(__arm__)
467 +# if defined (__ARMEB__) /* big endian, 32 bits */
468 +#define PADDED(x, y) unsigned y; x
469 +#define PADDEDptr(x, y) unsigned y; x
470 +#define PADDEDul(x, y) unsigned y; unsigned long x
471 +# else /* little endian, 32 bits */
472 +#define PADDED(x, y) x; unsigned y
473 +#define PADDEDptr(x, y) x; unsigned y
474 +#define PADDEDul(x, y) unsigned long x; unsigned y
476 +#elif defined(__m68k__) /* big endian, 32 bits */
477 +#define PADDED(x, y) unsigned y; x
478 +#define PADDEDptr(x, y) unsigned y; x
479 +#define PADDEDul(x, y) unsigned y; unsigned long x
480 +#elif defined(__sparc__) /* big endian, 32 bits */
481 +#define PADDED(x, y) unsigned y; x
482 +#define PADDEDptr(x, y) unsigned y; x
483 +#define PADDEDul(x, y) unsigned y; unsigned long x
484 +#elif defined(__hppa__) /* big endian, 32 bits */
485 +#define PADDED(x, y) unsigned y; x
486 +#define PADDEDptr(x, y) unsigned y; x
487 +#define PADDEDul(x, y) unsigned y; unsigned long x
488 +#elif defined(__mips__)
489 +# if defined (__MIPSEB__) /* big endian, 32 bits */
490 +#define PADDED(x, y) unsigned y; x
491 +#define PADDEDptr(x, y) unsigned y; x
492 +#define PADDEDul(x, y) unsigned y; unsigned long x
493 +# elif defined(__MIPSEL__) /* little endian, 32 bits */
494 +#define PADDED(x, y) x; unsigned y
495 +#define PADDEDptr(x, y) x; unsigned y
496 +#define PADDEDul(x, y) unsigned long x; unsigned y
498 +# error "neither mipseb nor mipsel?"
504 +++ b/src/syscall-parisc.h
507 + * Linux system call numbers.
509 + * Cary Coutant says that we should just use another syscall gateway
510 + * page to avoid clashing with the HPUX space, and I think he's right:
511 + * it will would keep a branch out of our syscall entry path, at the
512 + * very least. If we decide to change it later, we can ``just'' tweak
513 + * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be
514 + * 1024 or something. Oh, and recompile libc. =)
516 + * 64-bit HPUX binaries get the syscall gateway address passed in a register
517 + * from the kernel at startup, which seems a sane strategy.
520 +#define __NR_Linux 0
521 +#define __NR_io_setup (__NR_Linux + 215)
522 +#define __NR_io_destroy (__NR_Linux + 216)
523 +#define __NR_io_getevents (__NR_Linux + 217)
524 +#define __NR_io_submit (__NR_Linux + 218)
525 +#define __NR_io_cancel (__NR_Linux + 219)
527 +#define SYS_ify(syscall_name) __NR_##syscall_name
529 +/* Assume all syscalls are done from PIC code just to be
530 + * safe. The worst case scenario is that you lose a register
531 + * and save/restore r19 across the syscall. */
534 +/* Definition taken from glibc 2.3.3
535 + * sysdeps/unix/sysv/linux/hppa/sysdep.h
539 +/* WARNING: CANNOT BE USED IN A NOP! */
540 +# define K_STW_ASM_PIC " copy %%r19, %%r4\n"
541 +# define K_LDW_ASM_PIC " copy %%r4, %%r19\n"
542 +# define K_USING_GR4 "%r4",
544 +# define K_STW_ASM_PIC " \n"
545 +# define K_LDW_ASM_PIC " \n"
546 +# define K_USING_GR4
549 +/* GCC has to be warned that a syscall may clobber all the ABI
550 + registers listed as "caller-saves", see page 8, Table 2
551 + in section 2.2.6 of the PA-RISC RUN-TIME architecture
552 + document. However! r28 is the result and will conflict with
553 + the clobber list so it is left out. Also the input arguments
554 + registers r20 -> r26 will conflict with the list so they
555 + are treated specially. Although r19 is clobbered by the syscall
556 + we cannot say this because it would violate ABI, thus we say
557 + r4 is clobbered and use that register to save/restore r19
558 + across the syscall. */
560 +#define K_CALL_CLOB_REGS "%r1", "%r2", K_USING_GR4 \
561 + "%r20", "%r29", "%r31"
563 +#undef K_INLINE_SYSCALL
564 +#define K_INLINE_SYSCALL(name, nr, args...) ({ \
567 + register unsigned long __res __asm__("r28"); \
568 + K_LOAD_ARGS_##nr(args) \
569 + /* FIXME: HACK stw/ldw r19 around syscall */ \
570 + __asm__ volatile( \
572 + " ble 0x100(%%sr2, %%r0)\n" \
573 + " ldi %1, %%r20\n" \
576 + : "i" (SYS_ify(name)) K_ASM_ARGS_##nr \
577 + : "memory", K_CALL_CLOB_REGS K_CLOB_ARGS_##nr \
579 + __sys_res = (long)__res; \
584 +#define K_LOAD_ARGS_0()
585 +#define K_LOAD_ARGS_1(r26) \
586 + register unsigned long __r26 __asm__("r26") = (unsigned long)(r26); \
588 +#define K_LOAD_ARGS_2(r26,r25) \
589 + register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \
591 +#define K_LOAD_ARGS_3(r26,r25,r24) \
592 + register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \
593 + K_LOAD_ARGS_2(r26,r25)
594 +#define K_LOAD_ARGS_4(r26,r25,r24,r23) \
595 + register unsigned long __r23 __asm__("r23") = (unsigned long)(r23); \
596 + K_LOAD_ARGS_3(r26,r25,r24)
597 +#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \
598 + register unsigned long __r22 __asm__("r22") = (unsigned long)(r22); \
599 + K_LOAD_ARGS_4(r26,r25,r24,r23)
600 +#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \
601 + register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \
602 + K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
604 +/* Even with zero args we use r20 for the syscall number */
605 +#define K_ASM_ARGS_0
606 +#define K_ASM_ARGS_1 K_ASM_ARGS_0, "r" (__r26)
607 +#define K_ASM_ARGS_2 K_ASM_ARGS_1, "r" (__r25)
608 +#define K_ASM_ARGS_3 K_ASM_ARGS_2, "r" (__r24)
609 +#define K_ASM_ARGS_4 K_ASM_ARGS_3, "r" (__r23)
610 +#define K_ASM_ARGS_5 K_ASM_ARGS_4, "r" (__r22)
611 +#define K_ASM_ARGS_6 K_ASM_ARGS_5, "r" (__r21)
613 +/* The registers not listed as inputs but clobbered */
614 +#define K_CLOB_ARGS_6
615 +#define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21"
616 +#define K_CLOB_ARGS_4 K_CLOB_ARGS_5, "%r22"
617 +#define K_CLOB_ARGS_3 K_CLOB_ARGS_4, "%r23"
618 +#define K_CLOB_ARGS_2 K_CLOB_ARGS_3, "%r24"
619 +#define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25"
620 +#define K_CLOB_ARGS_0 K_CLOB_ARGS_1, "%r26"
622 +#define io_syscall1(type,fname,sname,type1,arg1) \
623 +type fname(type1 arg1) \
625 + return K_INLINE_SYSCALL(sname, 1, arg1); \
628 +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
629 +type fname(type1 arg1, type2 arg2) \
631 + return K_INLINE_SYSCALL(sname, 2, arg1, arg2); \
634 +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
635 +type fname(type1 arg1, type2 arg2, type3 arg3) \
637 + return K_INLINE_SYSCALL(sname, 3, arg1, arg2, arg3); \
640 +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
641 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
643 + return K_INLINE_SYSCALL(sname, 4, arg1, arg2, arg3, arg4); \
646 +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
647 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
649 + return K_INLINE_SYSCALL(sname, 5, arg1, arg2, arg3, arg4, arg5); \
653 +++ b/src/syscall-arm.h
656 + * linux/include/asm-arm/unistd.h
658 + * Copyright (C) 2001-2005 Russell King
660 + * This program is free software; you can redistribute it and/or modify
661 + * it under the terms of the GNU General Public License version 2 as
662 + * published by the Free Software Foundation.
664 + * Please forward _all_ changes to this file to rmk@arm.linux.org.uk,
665 + * no matter what the change is. Thanks!
668 +#define __NR_OABI_SYSCALL_BASE 0x900000
670 +#if defined(__thumb__) || defined(__ARM_EABI__)
671 +#define __NR_SYSCALL_BASE 0
673 +#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE
676 +#define __NR_io_setup (__NR_SYSCALL_BASE+243)
677 +#define __NR_io_destroy (__NR_SYSCALL_BASE+244)
678 +#define __NR_io_getevents (__NR_SYSCALL_BASE+245)
679 +#define __NR_io_submit (__NR_SYSCALL_BASE+246)
680 +#define __NR_io_cancel (__NR_SYSCALL_BASE+247)
682 +#define __sys2(x) #x
683 +#define __sys1(x) __sys2(x)
685 +#if defined(__thumb__) || defined(__ARM_EABI__)
686 +#define __SYS_REG(name) register long __sysreg __asm__("r7") = __NR_##name;
687 +#define __SYS_REG_LIST(regs...) "r" (__sysreg) , ##regs
688 +#define __syscall(name) "swi\t0"
690 +#define __SYS_REG(name)
691 +#define __SYS_REG_LIST(regs...) regs
692 +#define __syscall(name) "swi\t" __sys1(__NR_##name) ""
695 +#define io_syscall1(type,fname,sname,type1,arg1) \
696 +type fname(type1 arg1) { \
698 + register long __r0 __asm__("r0") = (long)arg1; \
699 + register long __res_r0 __asm__("r0"); \
700 + __asm__ __volatile__ ( \
702 + : "=r" (__res_r0) \
703 + : __SYS_REG_LIST( "0" (__r0) ) \
705 + return (type) __res_r0; \
708 +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
709 +type fname(type1 arg1,type2 arg2) { \
711 + register long __r0 __asm__("r0") = (long)arg1; \
712 + register long __r1 __asm__("r1") = (long)arg2; \
713 + register long __res_r0 __asm__("r0"); \
714 + __asm__ __volatile__ ( \
716 + : "=r" (__res_r0) \
717 + : __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) \
719 + return (type) __res_r0; \
722 +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
723 +type fname(type1 arg1,type2 arg2,type3 arg3) { \
725 + register long __r0 __asm__("r0") = (long)arg1; \
726 + register long __r1 __asm__("r1") = (long)arg2; \
727 + register long __r2 __asm__("r2") = (long)arg3; \
728 + register long __res_r0 __asm__("r0"); \
729 + __asm__ __volatile__ ( \
731 + : "=r" (__res_r0) \
732 + : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) \
734 + return (type) __res_r0; \
737 +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\
738 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
740 + register long __r0 __asm__("r0") = (long)arg1; \
741 + register long __r1 __asm__("r1") = (long)arg2; \
742 + register long __r2 __asm__("r2") = (long)arg3; \
743 + register long __r3 __asm__("r3") = (long)arg4; \
744 + register long __res_r0 __asm__("r0"); \
745 + __asm__ __volatile__ ( \
747 + : "=r" (__res_r0) \
748 + : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) \
750 + return (type) __res_r0; \
753 +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
754 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) {\
756 + register long __r0 __asm__("r0") = (long)arg1; \
757 + register long __r1 __asm__("r1") = (long)arg2; \
758 + register long __r2 __asm__("r2") = (long)arg3; \
759 + register long __r3 __asm__("r3") = (long)arg4; \
760 + register long __r4 __asm__("r4") = (long)arg5; \
761 + register long __res_r0 __asm__("r0"); \
762 + __asm__ __volatile__ ( \
764 + : "=r" (__res_r0) \
765 + : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \
766 + "r" (__r3), "r" (__r4) ) \
768 + return (type) __res_r0; \