From 3ef7fcfe58500bb9710ae1b4fb2f3c0bfa967c6d Mon Sep 17 00:00:00 2001 From: nbd Date: Fri, 23 May 2014 20:58:43 +0000 Subject: [PATCH] kernel: add a ssb backport required for a new mac80211 update Signed-off-by: Felix Fietkau Backport of r40833 git-svn-id: svn://svn.openwrt.org/openwrt/branches/attitude_adjustment@40835 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../linux/generic/patches-3.3/020-ssb_update.patch | 27 +++++++++++----------- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/target/linux/generic/patches-3.3/020-ssb_update.patch b/target/linux/generic/patches-3.3/020-ssb_update.patch index 8499e81..5db82a5 100644 --- a/target/linux/generic/patches-3.3/020-ssb_update.patch +++ b/target/linux/generic/patches-3.3/020-ssb_update.patch @@ -419,7 +419,7 @@ } if (updown_tab) { -@@ -516,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon +@@ -516,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon pmucap = chipco_read32(cc, SSB_CHIPCO_PMU_CAP); cc->pmu.rev = (pmucap & SSB_CHIPCO_PMU_CAP_REVISION); @@ -886,7 +886,7 @@ } static void dump_irq(struct ssb_bus *bus) -@@ -178,9 +178,9 @@ static void ssb_mips_serial_init(struct +@@ -178,9 +178,9 @@ static void ssb_mips_serial_init(struct { struct ssb_bus *bus = mcore->dev->bus; @@ -1707,7 +1707,7 @@ sprom_extract_r458(out, in); /* TODO - get remaining rev 8 stuff needed */ -@@ -641,7 +753,7 @@ static int sprom_extract(struct ssb_bus +@@ -641,7 +753,7 @@ static int sprom_extract(struct ssb_bus memset(out, 0, sizeof(*out)); out->revision = in[size - 1] & 0x00FF; @@ -1716,7 +1716,7 @@ memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */ memset(out->et1mac, 0xFF, 6); -@@ -650,7 +762,7 @@ static int sprom_extract(struct ssb_bus +@@ -650,7 +762,7 @@ static int sprom_extract(struct ssb_bus * number stored in the SPROM. * Always extract r1. */ out->revision = 1; @@ -1725,7 +1725,7 @@ } switch (out->revision) { -@@ -667,9 +779,8 @@ static int sprom_extract(struct ssb_bus +@@ -667,9 +779,8 @@ static int sprom_extract(struct ssb_bus sprom_extract_r8(out, in); break; default: @@ -2182,7 +2182,7 @@ #include -@@ -16,19 +18,28 @@ struct pcmcia_device; +@@ -16,19 +18,29 @@ struct pcmcia_device; struct ssb_bus; struct ssb_driver; @@ -2204,6 +2204,7 @@ u8 et1phyaddr; /* MII address for enet1 */ u8 et0mdcport; /* MDIO for enet0 */ u8 et1mdcport; /* MDIO for enet1 */ ++ u16 dev_id; /* Device ID overriding e.g. PCI ID */ u16 board_rev; /* Board revision number from SPROM. */ + u16 board_num; /* Board number from SPROM. */ + u16 board_type; /* Board type from SPROM. */ @@ -2216,7 +2217,7 @@ u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */ u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */ u16 pa0b0; -@@ -47,10 +58,10 @@ struct ssb_sprom { +@@ -47,10 +59,10 @@ struct ssb_sprom { u8 gpio1; /* GPIO pin 1 */ u8 gpio2; /* GPIO pin 2 */ u8 gpio3; /* GPIO pin 3 */ @@ -2231,7 +2232,7 @@ u8 itssi_a; /* Idle TSSI Target for A-PHY */ u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */ u8 tri2g; /* 2.4GHz TX isolation */ -@@ -61,8 +72,8 @@ struct ssb_sprom { +@@ -61,8 +73,8 @@ struct ssb_sprom { u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */ u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */ u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */ @@ -2242,7 +2243,7 @@ u8 rssisav2g; /* 2GHz RSSI params */ u8 rssismc2g; u8 rssismf2g; -@@ -82,16 +93,13 @@ struct ssb_sprom { +@@ -82,16 +94,13 @@ struct ssb_sprom { u16 boardflags2_hi; /* Board flags (bits 48-63) */ /* TODO store board flags in a single u64 */ @@ -2262,7 +2263,7 @@ } antenna_gain; struct { -@@ -103,14 +111,85 @@ struct ssb_sprom { +@@ -103,14 +112,85 @@ struct ssb_sprom { } ghz5; } fem; @@ -2350,7 +2351,7 @@ }; -@@ -166,6 +245,7 @@ struct ssb_bus_ops { +@@ -166,6 +246,7 @@ struct ssb_bus_ops { #define SSB_DEV_MINI_MACPHY 0x823 #define SSB_DEV_ARM_1176 0x824 #define SSB_DEV_ARM_7TDMI 0x825 @@ -2358,7 +2359,7 @@ /* Vendor-ID values */ #define SSB_VENDOR_BROADCOM 0x4243 -@@ -260,13 +340,61 @@ enum ssb_bustype { +@@ -260,13 +341,61 @@ enum ssb_bustype { #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */ #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */ /* board_type */ @@ -2423,7 +2424,7 @@ /* chip_package */ #define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */ #define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */ -@@ -354,7 +482,11 @@ struct ssb_bus { +@@ -354,7 +483,11 @@ struct ssb_bus { #ifdef CONFIG_SSB_EMBEDDED /* Lock for GPIO register access. */ spinlock_t gpio_lock; -- 2.11.0