CC: kernel: update kernel 3.18 to version 3.18.36

[15.05/openwrt.git] / target / linux / oxnas / patches-3.18 / 320-oxnas-irqchip.patch

diff --git a/target/linux/oxnas/patches-3.18/320-oxnas-irqchip.patch b/target/linux/oxnas/patches-3.18/320-oxnas-irqchip.patch
index e6262da..c38d6bb 100644 (file)
--- a/target/linux/oxnas/patches-3.18/320-oxnas-irqchip.patch
+++ b/target/linux/oxnas/patches-3.18/320-oxnas-irqchip.patch
@@ -1,7 +1,5 @@
-Index: linux-3.18-rc4/drivers/irqchip/Kconfig
-===================================================================
---- linux-3.18-rc4.orig/drivers/irqchip/Kconfig
-+++ linux-3.18-rc4/drivers/irqchip/Kconfig
+--- a/drivers/irqchip/Kconfig
++++ b/drivers/irqchip/Kconfig
 @@ -15,6 +15,11 @@ config ARM_GIC_V3
        select IRQ_DOMAIN
        select MULTI_IRQ_HANDLER
@@ -14,10 +12,8 @@ Index: linux-3.18-rc4/drivers/irqchip/Kconfig
  config ARM_NVIC
        bool
        select IRQ_DOMAIN
-Index: linux-3.18-rc4/drivers/irqchip/Makefile
-===================================================================
---- linux-3.18-rc4.orig/drivers/irqchip/Makefile
-+++ linux-3.18-rc4/drivers/irqchip/Makefile
+--- a/drivers/irqchip/Makefile
++++ b/drivers/irqchip/Makefile
 @@ -28,6 +28,7 @@ obj-$(CONFIG_IMGPDC_IRQ)             += irq-imgpdc.
  obj-$(CONFIG_SIRF_IRQ)                        += irq-sirfsoc.o
  obj-$(CONFIG_RENESAS_INTC_IRQPIN)     += irq-renesas-intc-irqpin.o
@@ -26,11 +22,9 @@ Index: linux-3.18-rc4/drivers/irqchip/Makefile
  obj-$(CONFIG_VERSATILE_FPGA_IRQ)      += irq-versatile-fpga.o
  obj-$(CONFIG_ARCH_NSPIRE)             += irq-zevio.o
  obj-$(CONFIG_ARCH_VT8500)             += irq-vt8500.o
-Index: linux-3.18-rc4/drivers/irqchip/irq-gic.c
-===================================================================
---- linux-3.18-rc4.orig/drivers/irqchip/irq-gic.c
-+++ linux-3.18-rc4/drivers/irqchip/irq-gic.c
-@@ -1044,6 +1044,7 @@ IRQCHIP_DECLARE(gic_400, "arm,gic-400",
+--- a/drivers/irqchip/irq-gic.c
++++ b/drivers/irqchip/irq-gic.c
+@@ -1052,6 +1052,7 @@ IRQCHIP_DECLARE(gic_400, "arm,gic-400",
  IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init);
  IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init);
  IRQCHIP_DECLARE(cortex_a7_gic, "arm,cortex-a7-gic", gic_of_init);