1ab704bedaa3f5103daf72e41a06f9d88a810da7
[openwrt.git] / target / linux / sunxi / patches-3.13 / 162-2-ahci-plat-manage-sata-phy.patch
1 From 154a670a945c54300749d5ba008f30bbd6089017 Mon Sep 17 00:00:00 2001
2 From: Roger Quadros <rogerq@ti.com>
3 Date: Mon, 27 Jan 2014 16:41:18 +0200
4 Subject: [PATCH] ata: ahci_platform: Manage SATA PHY
5
6 Some platforms have a PHY hooked up to the
7 SATA controller. The PHY needs to be initialized
8 and powered up for SATA to work. We do that
9 using the PHY framework.
10
11 CC: Balaji T K <balajitk@ti.com>
12 Signed-off-by: Roger Quadros <rogerq@ti.com>
13 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
14 ---
15  drivers/ata/ahci.h          |  2 ++
16  drivers/ata/ahci_platform.c | 47 +++++++++++++++++++++++++++++++++++++++++++--
17  2 files changed, 47 insertions(+), 2 deletions(-)
18
19 diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
20 index bf8100c..3ab7ac9 100644
21 --- a/drivers/ata/ahci.h
22 +++ b/drivers/ata/ahci.h
23 @@ -37,6 +37,7 @@
24  
25  #include <linux/clk.h>
26  #include <linux/libata.h>
27 +#include <linux/phy/phy.h>
28  #include <linux/regulator/consumer.h>
29  
30  /* Enclosure Management Control */
31 @@ -325,6 +326,7 @@ struct ahci_host_priv {
32         u32                     em_msg_type;    /* EM message type */
33         struct clk              *clks[AHCI_MAX_CLKS]; /* Optional */
34         struct regulator        *target_pwr;    /* Optional */
35 +       struct phy              *phy;           /* If platform uses phy */
36         void                    *plat_data;     /* Other platform data */
37         /*
38          * Optional ahci_start_engine override, if not set this gets set to the
39 diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
40 index d7e55ba..99d38c1 100644
41 --- a/drivers/ata/ahci_platform.c
42 +++ b/drivers/ata/ahci_platform.c
43 @@ -23,6 +23,7 @@
44  #include <linux/platform_device.h>
45  #include <linux/libata.h>
46  #include <linux/ahci_platform.h>
47 +#include <linux/phy/phy.h>
48  #include "ahci.h"
49  
50  static void ahci_host_stop(struct ata_host *host);
51 @@ -147,6 +148,7 @@ void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
52   *     the following order:
53   *     1) Regulator
54   *     2) Clocks (through ahci_platform_enable_clks)
55 + *     3) Phy
56   *
57   *     If resource enabling fails at any point the previous enabled
58   *     resources are disabled in reverse order.
59 @@ -171,8 +173,23 @@ int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
60         if (rc)
61                 goto disable_regulator;
62  
63 +       if (hpriv->phy) {
64 +               rc = phy_init(hpriv->phy);
65 +               if (rc)
66 +                       goto disable_clks;
67 +
68 +               rc = phy_power_on(hpriv->phy);
69 +               if (rc) {
70 +                       phy_exit(hpriv->phy);
71 +                       goto disable_clks;
72 +               }
73 +       }
74 +
75         return 0;
76  
77 +disable_clks:
78 +       ahci_platform_disable_clks(hpriv);
79 +
80  disable_regulator:
81         if (hpriv->target_pwr)
82                 regulator_disable(hpriv->target_pwr);
83 @@ -186,14 +203,20 @@ int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
84   *
85   *     This function disables all ahci_platform managed resources in
86   *     the following order:
87 - *     1) Clocks (through ahci_platform_disable_clks)
88 - *     2) Regulator
89 + *     1) Phy
90 + *     2) Clocks (through ahci_platform_disable_clks)
91 + *     3) Regulator
92   *
93   *     LOCKING:
94   *     None.
95   */
96  void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
97  {
98 +       if (hpriv->phy) {
99 +               phy_power_off(hpriv->phy);
100 +               phy_exit(hpriv->phy);
101 +       }
102 +
103         ahci_platform_disable_clks(hpriv);
104  
105         if (hpriv->target_pwr)
106 @@ -222,6 +245,7 @@ static void ahci_platform_put_resources(struct device *dev, void *res)
107   *     2) regulator for controlling the targets power (optional)
108   *     3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
109   *        or for non devicetree enabled platforms a single clock
110 + *     4) phy (optional)
111   *
112   *     LOCKING:
113   *     None.
114 @@ -283,6 +307,25 @@ struct ahci_host_priv *ahci_platform_get_resources(
115                 hpriv->clks[i] = clk;
116         }
117  
118 +       hpriv->phy = devm_phy_get(dev, "sata-phy");
119 +       if (IS_ERR(hpriv->phy)) {
120 +               rc = PTR_ERR(hpriv->phy);
121 +               switch (rc) {
122 +               case -ENODEV:
123 +               case -ENOSYS:
124 +                       /* continue normally */
125 +                       hpriv->phy = NULL;
126 +                       break;
127 +
128 +               case -EPROBE_DEFER:
129 +                       goto err_out;
130 +
131 +               default:
132 +                       dev_err(dev, "couldn't get sata-phy\n");
133 +                       goto err_out;
134 +               }
135 +       }
136 +
137         devres_remove_group(dev, NULL);
138         return hpriv;
139  
140 -- 
141 1.8.5.5
142