target/linux/ifxmips/files/drivers/net/ifxmips_mii0.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  15  *
  16  *   Copyright (C) 2005 Wu Qi Ming <Qi-Ming.Wu@infineon.com>
  17  *   Copyright (C) 2008 John Crispin <blogic@openwrt.org>
  18  */
  19
  20 #include <linux/kernel.h>
  21 #include <linux/slab.h>
  22 #include <linux/errno.h>
  23 #include <linux/types.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/uaccess.h>
  26 #include <linux/in.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/etherdevice.h>
  29 #include <linux/ip.h>
  30 #include <linux/tcp.h>
  31 #include <linux/skbuff.h>
  32 #include <linux/mm.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/ethtool.h>
  35 #include <linux/init.h>
  36 #include <linux/delay.h>
  37 #include <asm/checksum.h>
  38 #include <asm/ifxmips/ifxmips.h>
  39 #include <asm/ifxmips/ifxmips_dma.h>
  40 #include <asm/ifxmips/ifxmips_pmu.h>
  41
  42 struct ifxmips_mii_priv {
  43         struct net_device_stats stats;
  44         struct dma_device_info *dma_device;
  45         struct sk_buff *skb;
  46 };
  47
  48 static struct net_device *ifxmips_mii0_dev;
  49 static unsigned char mac_addr[MAX_ADDR_LEN];
  50
  51 void ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data)
  52 {
  53         u32 val = MDIO_ACC_REQUEST |
  54                 ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
  55                 ((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET) |
  56                 phy_data;
  57
  58         while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
  59                 ;
  60         ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
  61 }
  62 EXPORT_SYMBOL(ifxmips_write_mdio);
  63
  64 unsigned short ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
  65 {
  66         u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ |
  67                 ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
  68                 ((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET);
  69
  70         while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
  71                 ;
  72         ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
  73         while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
  74                 ;
  75         val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK;
  76         return val;
  77 }
  78 EXPORT_SYMBOL(ifxmips_read_mdio);
  79
  80 int ifxmips_ifxmips_mii_open(struct net_device *dev)
  81 {
  82         struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
  83         struct dma_device_info *dma_dev = priv->dma_device;
  84         int i;
  85
  86         for (i = 0; i < dma_dev->max_rx_chan_num; i++) {
  87                 if ((dma_dev->rx_chan[i])->control == IFXMIPS_DMA_CH_ON)
  88                         (dma_dev->rx_chan[i])->open(dma_dev->rx_chan[i]);
  89         }
  90         netif_start_queue(dev);
  91         return 0;
  92 }
  93
  94 int ifxmips_mii_release(struct net_device *dev)
  95 {
  96         struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
  97         struct dma_device_info *dma_dev = priv->dma_device;
  98         int i;
  99
 100         for (i = 0; i < dma_dev->max_rx_chan_num; i++)
 101                 dma_dev->rx_chan[i]->close(dma_dev->rx_chan[i]);
 102         netif_stop_queue(dev);
 103         return 0;
 104 }
 105
 106 int ifxmips_mii_hw_receive(struct net_device *dev, struct dma_device_info *dma_dev)
 107 {
 108         struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
 109         unsigned char *buf = NULL;
 110         struct sk_buff *skb = NULL;
 111         int len = 0;
 112
 113         len = dma_device_read(dma_dev, &buf, (void **)&skb);
 114
 115         if (len >= ETHERNET_PACKET_DMA_BUFFER_SIZE) {
 116                 printk(KERN_INFO "ifxmips_mii0: packet too large %d\n", len);
 117                 goto ifxmips_mii_hw_receive_err_exit;
 118         }
 119
 120         /* remove CRC */
 121         len -= 4;
 122         if (skb == NULL) {
 123                 printk(KERN_INFO "ifxmips_mii0: cannot restore pointer\n");
 124                 goto ifxmips_mii_hw_receive_err_exit;
 125         }
 126
 127         if (len > (skb->end - skb->tail)) {
 128                 printk(KERN_INFO "ifxmips_mii0: BUG, len:%d end:%p tail:%p\n",
 129                         (len+4), skb->end, skb->tail);
 130                 goto ifxmips_mii_hw_receive_err_exit;
 131         }
 132
 133         skb_put(skb, len);
 134         skb->dev = dev;
 135         skb->protocol = eth_type_trans(skb, dev);
 136         netif_rx(skb);
 137
 138         priv->stats.rx_packets++;
 139         priv->stats.rx_bytes += len;
 140         return 0;
 141
 142 ifxmips_mii_hw_receive_err_exit:
 143         if (len == 0) {
 144                 if (skb)
 145                         dev_kfree_skb_any(skb);
 146                 priv->stats.rx_errors++;
 147                 priv->stats.rx_dropped++;
 148                 return -EIO;
 149         } else {
 150                 return len;
 151         }
 152 }
 153
 154 int ifxmips_mii_hw_tx(char *buf, int len, struct net_device *dev)
 155 {
 156         int ret = 0;
 157         struct ifxmips_mii_priv *priv = netdev_priv(dev);
 158         struct dma_device_info *dma_dev = priv->dma_device;
 159         ret = dma_device_write(dma_dev, buf, len, priv->skb);
 160         return ret;
 161 }
 162
 163 int ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
 164 {
 165         int len;
 166         char *data;
 167         struct ifxmips_mii_priv *priv = netdev_priv(dev);
 168         struct dma_device_info *dma_dev = priv->dma_device;
 169
 170         len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
 171         data = skb->data;
 172         priv->skb = skb;
 173         dev->trans_start = jiffies;
 174         /* TODO: we got more than 1 dma channel,
 175            so we should do something intelligent here to select one */
 176         dma_dev->current_tx_chan = 0;
 177
 178         wmb();
 179
 180         if (ifxmips_mii_hw_tx(data, len, dev) != len) {
 181                 dev_kfree_skb_any(skb);
 182                 priv->stats.tx_errors++;
 183                 priv->stats.tx_dropped++;
 184         } else {
 185                 priv->stats.tx_packets++;
 186                 priv->stats.tx_bytes += len;
 187         }
 188
 189         return 0;
 190 }
 191
 192 void ifxmips_mii_tx_timeout(struct net_device *dev)
 193 {
 194         int i;
 195         struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
 196
 197         priv->stats.tx_errors++;
 198         for (i = 0; i < priv->dma_device->max_tx_chan_num; i++)
 199                 priv->dma_device->tx_chan[i]->disable_irq(priv->dma_device->tx_chan[i]);
 200         netif_wake_queue(dev);
 201         return;
 202 }
 203
 204 int dma_intr_handler(struct dma_device_info *dma_dev, int status)
 205 {
 206         int i;
 207
 208         switch (status) {
 209         case RCV_INT:
 210                 ifxmips_mii_hw_receive(ifxmips_mii0_dev, dma_dev);
 211                 break;
 212
 213         case TX_BUF_FULL_INT:
 214                 printk(KERN_INFO "ifxmips_mii0: tx buffer full\n");
 215                 netif_stop_queue(ifxmips_mii0_dev);
 216                 for (i = 0; i < dma_dev->max_tx_chan_num; i++) {
 217                         if ((dma_dev->tx_chan[i])->control == IFXMIPS_DMA_CH_ON)
 218                                 dma_dev->tx_chan[i]->enable_irq(dma_dev->tx_chan[i]);
 219                 }
 220                 break;
 221
 222         case TRANSMIT_CPT_INT:
 223                 for (i = 0; i < dma_dev->max_tx_chan_num; i++)
 224                         dma_dev->tx_chan[i]->disable_irq(dma_dev->tx_chan[i]);
 225
 226                 netif_wake_queue(ifxmips_mii0_dev);
 227                 break;
 228         }
 229
 230         return 0;
 231 }
 232
 233 unsigned char *ifxmips_etop_dma_buffer_alloc(int len, int *byte_offset, void **opt)
 234 {
 235         unsigned char *buffer = NULL;
 236         struct sk_buff *skb = NULL;
 237
 238         skb = dev_alloc_skb(ETHERNET_PACKET_DMA_BUFFER_SIZE);
 239         if (skb == NULL)
 240                 return NULL;
 241
 242         buffer = (unsigned char *)(skb->data);
 243         skb_reserve(skb, 2);
 244         *(int *)opt = (int)skb;
 245         *byte_offset = 2;
 246
 247         return buffer;
 248 }
 249
 250 void ifxmips_etop_dma_buffer_free(unsigned char *dataptr, void *opt)
 251 {
 252         struct sk_buff *skb = NULL;
 253
 254         if (opt == NULL) {
 255                 kfree(dataptr);
 256         } else {
 257                 skb = (struct sk_buff *)opt;
 258                 dev_kfree_skb_any(skb);
 259         }
 260 }
 261
 262 static struct net_device_stats *ifxmips_get_stats(struct net_device *dev)
 263 {
 264         return &((struct ifxmips_mii_priv *)netdev_priv(dev))->stats;
 265 }
 266
 267 static int ifxmips_mii_dev_init(struct net_device *dev)
 268 {
 269         int i;
 270         struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
 271         ether_setup(dev);
 272         printk(KERN_INFO "ifxmips_mii0: %s is up\n", dev->name);
 273         dev->open = ifxmips_ifxmips_mii_open;
 274         dev->stop = ifxmips_mii_release;
 275         dev->hard_start_xmit = ifxmips_mii_tx;
 276         dev->get_stats = ifxmips_get_stats;
 277         dev->tx_timeout = ifxmips_mii_tx_timeout;
 278         dev->watchdog_timeo = 10 * HZ;
 279         memset(priv, 0, sizeof(struct ifxmips_mii_priv));
 280         priv->dma_device = dma_device_reserve("PPE");
 281         if (!priv->dma_device) {
 282                 BUG();
 283                 return -ENODEV;
 284         }
 285         priv->dma_device->buffer_alloc = &ifxmips_etop_dma_buffer_alloc;
 286         priv->dma_device->buffer_free = &ifxmips_etop_dma_buffer_free;
 287         priv->dma_device->intr_handler = &dma_intr_handler;
 288         priv->dma_device->max_rx_chan_num = 4;
 289
 290         for (i = 0; i < priv->dma_device->max_rx_chan_num; i++) {
 291                 priv->dma_device->rx_chan[i]->packet_size = ETHERNET_PACKET_DMA_BUFFER_SIZE;
 292                 priv->dma_device->rx_chan[i]->control = IFXMIPS_DMA_CH_ON;
 293         }
 294
 295         for (i = 0; i < priv->dma_device->max_tx_chan_num; i++)
 296                 if (i == 0)
 297                         priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_ON;
 298                 else
 299                         priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_OFF;
 300
 301         dma_device_register(priv->dma_device);
 302
 303         printk(KERN_INFO "ifxmips_mii0: using mac=");
 304         for (i = 0; i < 6; i++) {
 305                 dev->dev_addr[i] = mac_addr[i];
 306                 printk("%02X%c", dev->dev_addr[i], (i == 5) ? ('\n') : (':'));
 307         }
 308         return 0;
 309 }
 310
 311 static void ifxmips_mii_chip_init(int mode)
 312 {
 313         ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
 314         ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
 315
 316         if (mode == REV_MII_MODE)
 317                 ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_REVERSE, IFXMIPS_PPE32_CFG);
 318         else if (mode == MII_MODE)
 319                 ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_NORMAL, IFXMIPS_PPE32_CFG);
 320         ifxmips_w32(PPE32_PLEN_UNDER | PPE32_PLEN_OVER, IFXMIPS_PPE32_IG_PLEN_CTRL);
 321         ifxmips_w32(PPE32_CGEN, IFXMIPS_PPE32_ENET_MAC_CFG);
 322         wmb();
 323 }
 324
 325 static int ifxmips_mii_probe(struct platform_device *dev)
 326 {
 327         int result = 0;
 328         unsigned char *mac = (unsigned char *)dev->dev.platform_data;
 329         ifxmips_mii0_dev = alloc_etherdev(sizeof(struct ifxmips_mii_priv));
 330         ifxmips_mii0_dev->init = ifxmips_mii_dev_init;
 331         memcpy(mac_addr, mac, 6);
 332         strcpy(ifxmips_mii0_dev->name, "eth%d");
 333         ifxmips_mii_chip_init(REV_MII_MODE);
 334         result = register_netdev(ifxmips_mii0_dev);
 335         if (result) {
 336                 printk(KERN_INFO "ifxmips_mii0: error %i registering device \"%s\"\n", result, ifxmips_mii0_dev->name);
 337                 goto out;
 338         }
 339
 340         printk(KERN_INFO "ifxmips_mii0: driver loaded!\n");
 341
 342 out:
 343         return result;
 344 }
 345
 346 static int ifxmips_mii_remove(struct platform_device *dev)
 347 {
 348         struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(ifxmips_mii0_dev);
 349
 350         printk(KERN_INFO "ifxmips_mii0: ifxmips_mii0 cleanup\n");
 351
 352         dma_device_unregister(priv->dma_device);
 353         dma_device_release(priv->dma_device);
 354         kfree(priv->dma_device);
 355         unregister_netdev(ifxmips_mii0_dev);
 356         return 0;
 357 }
 358
 359 static struct platform_driver ifxmips_mii_driver = {
 360         .probe = ifxmips_mii_probe,
 361         .remove = ifxmips_mii_remove,
 362         .driver = {
 363                 .name = "ifxmips_mii0",
 364                 .owner = THIS_MODULE,
 365         },
 366 };
 367
 368 int __init ifxmips_mii_init(void)
 369 {
 370         int ret = platform_driver_register(&ifxmips_mii_driver);
 371         if (ret)
 372                 printk(KERN_INFO "ifxmips_mii0: Error registering platfom driver!");
 373         return ret;
 374 }
 375
 376 static void __exit ifxmips_mii_cleanup(void)
 377 {
 378         platform_driver_unregister(&ifxmips_mii_driver);
 379 }
 380
 381 module_init(ifxmips_mii_init);
 382 module_exit(ifxmips_mii_cleanup);
 383
 384 MODULE_LICENSE("GPL");
 385 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
 386 MODULE_DESCRIPTION("ethernet driver for IFXMIPS boards");
 387